target/ppc: implement vcntmb[bhwd]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220225210936.1749575-18-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -63,6 +63,9 @@
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&VX_bf bf vra vrb
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@VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf
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&VX_mp rt mp:bool vrb
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@VX_mp ...... rt:5 .... mp:1 vrb:5 ........... &VX_mp
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&VX_tb_rc vrt vrb rc:bool
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@VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc
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@ -489,6 +492,11 @@ VEXTRACTWM 000100 ..... 01010 ..... 11001000010 @VX_tb
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VEXTRACTDM 000100 ..... 01011 ..... 11001000010 @VX_tb
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VEXTRACTQM 000100 ..... 01100 ..... 11001000010 @VX_tb
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VCNTMBB 000100 ..... 1100 . ..... 11001000010 @VX_mp
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VCNTMBH 000100 ..... 1101 . ..... 11001000010 @VX_mp
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VCNTMBW 000100 ..... 1110 . ..... 11001000010 @VX_mp
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VCNTMBD 000100 ..... 1111 . ..... 11001000010 @VX_mp
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## Vector Multiply Instruction
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VMULESB 000100 ..... ..... ..... 01100001000 @VX
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@ -1910,6 +1910,38 @@ static bool trans_MTVSRBMI(DisasContext *ctx, arg_DX_b *a)
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return true;
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}
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static bool do_vcntmb(DisasContext *ctx, arg_VX_mp *a, int vece)
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{
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TCGv_i64 rt, vrb, mask;
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rt = tcg_const_i64(0);
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vrb = tcg_temp_new_i64();
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mask = tcg_constant_i64(dup_const(vece, 1ULL << ((8 << vece) - 1)));
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for (int i = 0; i < 2; i++) {
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get_avr64(vrb, a->vrb, i);
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if (a->mp) {
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tcg_gen_and_i64(vrb, mask, vrb);
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} else {
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tcg_gen_andc_i64(vrb, mask, vrb);
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}
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tcg_gen_ctpop_i64(vrb, vrb);
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tcg_gen_add_i64(rt, rt, vrb);
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}
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tcg_gen_shli_i64(rt, rt, TARGET_LONG_BITS - 8 + vece);
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tcg_gen_trunc_i64_tl(cpu_gpr[a->rt], rt);
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tcg_temp_free_i64(vrb);
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tcg_temp_free_i64(rt);
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return true;
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}
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TRANS(VCNTMBB, do_vcntmb, MO_8)
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TRANS(VCNTMBH, do_vcntmb, MO_16)
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TRANS(VCNTMBW, do_vcntmb, MO_32)
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TRANS(VCNTMBD, do_vcntmb, MO_64)
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static bool do_vstri(DisasContext *ctx, arg_VX_tb_rc *a,
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void (*gen_helper)(TCGv_i32, TCGv_ptr, TCGv_ptr))
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{
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