target/arm: Normalize aarch64 gdbstub get/set function names
Make the form of the function names between fp and sve the same: - arm_gdb_*_svereg -> aarch64_gdb_*_sve_reg. - aarch64_fpu_gdb_*_reg -> aarch64_gdb_*_fpu_reg. Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230227213329.793795-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -466,12 +466,13 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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*/
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#ifdef TARGET_AARCH64
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if (isar_feature_aa64_sve(&cpu->isar)) {
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gdb_register_coprocessor(cs, arm_gdb_get_svereg, arm_gdb_set_svereg,
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arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs),
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int nreg = arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs);
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gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg,
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aarch64_gdb_set_sve_reg, nreg,
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"sve-registers.xml", 0);
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} else {
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gdb_register_coprocessor(cs, aarch64_fpu_gdb_get_reg,
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aarch64_fpu_gdb_set_reg,
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gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg,
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aarch64_gdb_set_fpu_reg,
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34, "aarch64-fpu.xml", 0);
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}
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#endif
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@ -72,7 +72,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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return 0;
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}
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int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
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int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg)
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{
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switch (reg) {
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case 0 ... 31:
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@ -92,7 +92,7 @@ int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
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}
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}
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int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
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int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg)
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{
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switch (reg) {
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case 0 ... 31:
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@ -116,7 +116,7 @@ int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
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}
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}
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int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg)
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int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg)
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{
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ARMCPU *cpu = env_archcpu(env);
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@ -164,7 +164,7 @@ int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg)
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return 0;
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}
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int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg)
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int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg)
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{
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ARMCPU *cpu = env_archcpu(env);
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@ -1344,10 +1344,10 @@ static inline uint64_t pmu_counter_mask(CPUARMState *env)
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}
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#ifdef TARGET_AARCH64
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int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg);
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int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg);
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int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg);
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int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg);
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int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg);
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int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg);
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int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg);
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int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg);
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void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
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void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp);
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void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
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