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target-mips: log bad coprocessor0 register accesses with LOG_UNIMP

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Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
This commit is contained in:
Philippe Mathieu-Daudé 2017-03-04 15:56:50 -03:00 committed by Yongbok Kim
parent 989f2aa9af
commit 965447eecb
1 changed files with 6 additions and 6 deletions
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12
target/mips/translate.c
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@ -4872,7 +4872,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
return;
cp0_unimplemented:
LOG_DISAS("mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
qemu_log_mask(LOG_UNIMP, "mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
tcg_gen_movi_tl(arg, 0);
}
@ -4944,7 +4944,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
(void)rn; /* avoid a compiler warning */
cp0_unimplemented:
LOG_DISAS("mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
}
static inline void gen_mfc0_unimplemented(DisasContext *ctx, TCGv arg)
@ -5627,7 +5627,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
return;
cp0_unimplemented:
LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
qemu_log_mask(LOG_UNIMP, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
gen_mfc0_unimplemented(ctx, arg);
}
@ -6294,7 +6294,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
return;
cp0_unimplemented:
LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
qemu_log_mask(LOG_UNIMP, "mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
}
#if defined(TARGET_MIPS64)
@ -6928,7 +6928,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
return;
cp0_unimplemented:
LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
qemu_log_mask(LOG_UNIMP, "dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
gen_mfc0_unimplemented(ctx, arg);
}
@ -7593,7 +7593,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
return;
cp0_unimplemented:
LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
qemu_log_mask(LOG_UNIMP, "dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
}
#endif /* TARGET_MIPS64 */