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esp.c: don't raise INTR_BS interrupt in DATA IN phase until TI command issued

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In the case where a SCSI command with a DATA IN phase has been issued, the host
may preload the FIFO with unaligned bytes before issuing the main DMA transfer.

When accumulating data in the FIFO don't raise the INTR_BS interrupt until the
TI command is issued, otherwise the unexpected interrupt can confuse the host.
In particular this is needed to prevent the MacOS Disk Utility from failing
when switching non-DMA transfers to use esp_do_nodma().

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Helge Deller <deller@gmx.de>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20240112125420.514425-65-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2024-01-12 12:53:56 +00:00
parent 8200345066
commit 9655f72c20
1 changed files with 5 additions and 0 deletions
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5
hw/scsi/esp.c
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@ -786,6 +786,11 @@ static void esp_do_nodma(ESPState *s)
return; return;
} }
/* If preloading the FIFO, defer until TI command issued */
if (s->rregs[ESP_CMD] != CMD_TI) {
return;
}
s->rregs[ESP_RINTR] |= INTR_BS; s->rregs[ESP_RINTR] |= INTR_BS;
esp_raise_irq(s); esp_raise_irq(s);
break; break;