OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

i386: hvf: Drop rflags from HVFX86EmulatorState

Browse Source 
HVFX86EmulatorState carries it's own copy of x86 flags. It can be
dropped in favor of eflags in generic CPUX86State.

Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
Message-Id: <20200528193758.51454-9-r.bolshakov@yadro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Roman Bolshakov 2020-05-28 22:37:53 +03:00 committed by Paolo Bonzini
parent 2d5f696cb7
commit 967f4da2af
7 changed files with 24 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
target/i386/hvf/hvf.c
View File

@ -723,8 +723,7 @@ int hvf_vcpu_exec(CPUState *cpu)
hvf_store_events(cpu, ins_len, idtvec_info);
rip = rreg(cpu->hvf_fd, HV_X86_RIP);
RFLAGS(env) = rreg(cpu->hvf_fd, HV_X86_RFLAGS);
env->eflags = RFLAGS(env);
env->eflags = rreg(cpu->hvf_fd, HV_X86_RFLAGS);
qemu_mutex_lock_iothread();
@ -736,7 +735,7 @@ int hvf_vcpu_exec(CPUState *cpu)
case EXIT_REASON_HLT: {
macvm_set_rip(cpu, rip + ins_len);
if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(EFLAGS(env) & IF_MASK))
(env->eflags & IF_MASK))
&& !(cpu->interrupt_request & CPU_INTERRUPT_NMI) &&
!(idtvec_info & VMCS_IDT_VEC_VALID)) {
cpu->halted = 1;

2
target/i386/hvf/x86.c
View File

@ -131,7 +131,7 @@ bool x86_is_v8086(struct CPUState *cpu)
{
X86CPU *x86_cpu = X86_CPU(cpu);
CPUX86State *env = &x86_cpu->env;
return x86_is_protected(cpu) && (RFLAGS(env) & RFLAGS_VM);
return x86_is_protected(cpu) && (env->eflags & RFLAGS_VM);
}
bool x86_is_long_mode(struct CPUState *cpu)

42
target/i386/hvf/x86.h
View File

@ -62,44 +62,6 @@ typedef enum x86_rflags {
RFLAGS_ID = (1L << 21),
} x86_rflags;
/* rflags register */
typedef struct x86_reg_flags {
union {
struct {
uint64_t rflags;
};
struct {
uint32_t eflags;
uint32_t hi32_unused1;
};
struct {
uint32_t cf:1;
uint32_t unused1:1;
uint32_t pf:1;
uint32_t unused2:1;
uint32_t af:1;
uint32_t unused3:1;
uint32_t zf:1;
uint32_t sf:1;
uint32_t tf:1;
uint32_t ief:1;
uint32_t df:1;
uint32_t of:1;
uint32_t iopl:2;
uint32_t nt:1;
uint32_t unused4:1;
uint32_t rf:1;
uint32_t vm:1;
uint32_t ac:1;
uint32_t vif:1;
uint32_t vip:1;
uint32_t id:1;
uint32_t unused5:10;
uint32_t hi32_unused2;
};
};
} __attribute__ ((__packed__)) x86_reg_flags;
typedef enum x86_reg_cr0 {
CR0_PE = (1L << 0),
CR0_MP = (1L << 1),
@ -294,15 +256,11 @@ typedef struct lazy_flags {
/* Definition of hvf_x86_state is here */
struct HVFX86EmulatorState {
struct x86_register regs[16];
struct x86_reg_flags rflags;
struct lazy_flags lflags;
uint8_t mmio_buf[4096];
};
/* useful register access macros */
#define RFLAGS(cpu) (cpu->hvf_emul->rflags.rflags)
#define EFLAGS(cpu) (cpu->hvf_emul->rflags.eflags)
#define RRX(cpu, reg) (cpu->hvf_emul->regs[reg].rrx)
#define RAX(cpu) RRX(cpu, R_EAX)
#define RCX(cpu) RRX(cpu, R_ECX)

6
target/i386/hvf/x86_emu.c
View File

@ -459,7 +459,7 @@ static inline void string_increment_reg(struct CPUX86State *env, int reg,
struct x86_decode *decode)
{
target_ulong val = read_reg(env, reg, decode->addressing_size);
if (env->hvf_emul->rflags.df) {
if (env->eflags & DF_MASK) {
val -= decode->operand_size;
} else {
val += decode->operand_size;
@ -1432,7 +1432,7 @@ void load_regs(struct CPUState *cpu)
RRX(env, i) = rreg(cpu->hvf_fd, HV_X86_RAX + i);
}
RFLAGS(env) = rreg(cpu->hvf_fd, HV_X86_RFLAGS);
env->eflags = rreg(cpu->hvf_fd, HV_X86_RFLAGS);
rflags_to_lflags(env);
env->eip = rreg(cpu->hvf_fd, HV_X86_RIP);
}
@ -1456,7 +1456,7 @@ void store_regs(struct CPUState *cpu)
}
lflags_to_rflags(env);
wreg(cpu->hvf_fd, HV_X86_RFLAGS, RFLAGS(env));
wreg(cpu->hvf_fd, HV_X86_RFLAGS, env->eflags);
macvm_set_rip(cpu, env->eip);
}

24
target/i386/hvf/x86_flags.c
View File

@ -295,21 +295,21 @@ void set_SF(CPUX86State *env, bool val)
void lflags_to_rflags(CPUX86State *env)
{
env->hvf_emul->rflags.cf = get_CF(env);
env->hvf_emul->rflags.pf = get_PF(env);
env->hvf_emul->rflags.af = get_AF(env);
env->hvf_emul->rflags.zf = get_ZF(env);
env->hvf_emul->rflags.sf = get_SF(env);
env->hvf_emul->rflags.of = get_OF(env);
env->eflags |= get_CF(env) ? CC_C : 0;
env->eflags |= get_PF(env) ? CC_P : 0;
env->eflags |= get_AF(env) ? CC_A : 0;
env->eflags |= get_ZF(env) ? CC_Z : 0;
env->eflags |= get_SF(env) ? CC_S : 0;
env->eflags |= get_OF(env) ? CC_O : 0;
}
void rflags_to_lflags(CPUX86State *env)
{
env->hvf_emul->lflags.auxbits = env->hvf_emul->lflags.result = 0;
set_OF(env, env->hvf_emul->rflags.of);
set_SF(env, env->hvf_emul->rflags.sf);
set_ZF(env, env->hvf_emul->rflags.zf);
set_AF(env, env->hvf_emul->rflags.af);
set_PF(env, env->hvf_emul->rflags.pf);
set_CF(env, env->hvf_emul->rflags.cf);
set_OF(env, env->eflags & CC_O);
set_SF(env, env->eflags & CC_S);
set_ZF(env, env->eflags & CC_Z);
set_AF(env, env->eflags & CC_A);
set_PF(env, env->eflags & CC_P);
set_CF(env, env->eflags & CC_C);
}

6
target/i386/hvf/x86_task.c
View File

@ -39,7 +39,7 @@ static void save_state_to_tss32(CPUState *cpu, struct x86_tss_segment32 *tss)
/* CR3 and ldt selector are not saved intentionally */
tss->eip = (uint32_t)env->eip;
tss->eflags = EFLAGS(env);
tss->eflags = (uint32_t)env->eflags;
tss->eax = EAX(env);
tss->ecx = ECX(env);
tss->edx = EDX(env);
@ -65,7 +65,7 @@ static void load_state_from_tss32(CPUState *cpu, struct x86_tss_segment32 *tss)
wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, tss->cr3);
env->eip = tss->eip;
EFLAGS(env) = tss->eflags | 2;
env->eflags = tss->eflags | 2;
/* General purpose registers */
RAX(env) = tss->eax;
@ -158,7 +158,7 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int rea
}
if (reason == TSR_IRET)
EFLAGS(env) &= ~RFLAGS_NT;
env->eflags &= ~RFLAGS_NT;
if (reason != TSR_CALL && reason != TSR_IDT_GATE)
old_tss_sel.sel = 0xffff;

6
target/i386/hvf/x86hvf.c
View File

@ -412,7 +412,7 @@ bool hvf_inject_interrupts(CPUState *cpu_state)
if (!(env->hflags & HF_INHIBIT_IRQ_MASK) &&
(cpu_state->interrupt_request & CPU_INTERRUPT_HARD) &&
(EFLAGS(env) & IF_MASK) && !(info & VMCS_INTR_VALID)) {
(env->eflags & IF_MASK) && !(info & VMCS_INTR_VALID)) {
int line = cpu_get_pic_interrupt(&x86cpu->env);
cpu_state->interrupt_request &= ~CPU_INTERRUPT_HARD;
if (line >= 0) {
@ -432,7 +432,7 @@ int hvf_process_events(CPUState *cpu_state)
X86CPU *cpu = X86_CPU(cpu_state);
CPUX86State *env = &cpu->env;
EFLAGS(env) = rreg(cpu_state->hvf_fd, HV_X86_RFLAGS);
env->eflags = rreg(cpu_state->hvf_fd, HV_X86_RFLAGS);
if (cpu_state->interrupt_request & CPU_INTERRUPT_INIT) {
hvf_cpu_synchronize_state(cpu_state);
@ -444,7 +444,7 @@ int hvf_process_events(CPUState *cpu_state)
apic_poll_irq(cpu->apic_state);
}
if (((cpu_state->interrupt_request & CPU_INTERRUPT_HARD) &&
(EFLAGS(env) & IF_MASK)) ||
(env->eflags & IF_MASK)) ||
(cpu_state->interrupt_request & CPU_INTERRUPT_NMI)) {
cpu_state->halted = 0;
}