aspeed/smc: rename aspeed_smc_flash_send_addr() to aspeed_smc_flash_setup()
Also handle the fake transfers for dummy bytes in this setup routine. It will be useful when we activate MMIO execution. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20180612065716.10587-4-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -503,10 +503,11 @@ static int aspeed_smc_flash_dummies(const AspeedSMCFlash *fl)
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return dummies;
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return dummies;
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}
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}
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static void aspeed_smc_flash_send_addr(AspeedSMCFlash *fl, uint32_t addr)
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static void aspeed_smc_flash_setup(AspeedSMCFlash *fl, uint32_t addr)
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{
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{
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const AspeedSMCState *s = fl->controller;
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const AspeedSMCState *s = fl->controller;
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uint8_t cmd = aspeed_smc_flash_cmd(fl);
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uint8_t cmd = aspeed_smc_flash_cmd(fl);
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int i;
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/* Flash access can not exceed CS segment */
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/* Flash access can not exceed CS segment */
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addr = aspeed_smc_check_segment_addr(fl, addr);
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addr = aspeed_smc_check_segment_addr(fl, addr);
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@ -519,6 +520,18 @@ static void aspeed_smc_flash_send_addr(AspeedSMCFlash *fl, uint32_t addr)
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ssi_transfer(s->spi, (addr >> 16) & 0xff);
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ssi_transfer(s->spi, (addr >> 16) & 0xff);
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ssi_transfer(s->spi, (addr >> 8) & 0xff);
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ssi_transfer(s->spi, (addr >> 8) & 0xff);
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ssi_transfer(s->spi, (addr & 0xff));
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ssi_transfer(s->spi, (addr & 0xff));
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/*
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* Use fake transfers to model dummy bytes. The value should
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* be configured to some non-zero value in fast read mode and
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* zero in read mode. But, as the HW allows inconsistent
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* settings, let's check for fast read mode.
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*/
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if (aspeed_smc_flash_mode(fl) == CTRL_FREADMODE) {
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for (i = 0; i < aspeed_smc_flash_dummies(fl); i++) {
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ssi_transfer(fl->controller->spi, 0xFF);
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}
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}
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}
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}
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static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned size)
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static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned size)
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@ -537,19 +550,7 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr addr, unsigned size)
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case CTRL_READMODE:
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case CTRL_READMODE:
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case CTRL_FREADMODE:
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case CTRL_FREADMODE:
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aspeed_smc_flash_select(fl);
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aspeed_smc_flash_select(fl);
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aspeed_smc_flash_send_addr(fl, addr);
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aspeed_smc_flash_setup(fl, addr);
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/*
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* Use fake transfers to model dummy bytes. The value should
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* be configured to some non-zero value in fast read mode and
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* zero in read mode. But, as the HW allows inconsistent
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* settings, let's check for fast read mode.
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*/
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if (aspeed_smc_flash_mode(fl) == CTRL_FREADMODE) {
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for (i = 0; i < aspeed_smc_flash_dummies(fl); i++) {
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ssi_transfer(fl->controller->spi, 0xFF);
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}
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}
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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ret |= ssi_transfer(s->spi, 0x0) << (8 * i);
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ret |= ssi_transfer(s->spi, 0x0) << (8 * i);
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@ -586,7 +587,7 @@ static void aspeed_smc_flash_write(void *opaque, hwaddr addr, uint64_t data,
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break;
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break;
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case CTRL_WRITEMODE:
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case CTRL_WRITEMODE:
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aspeed_smc_flash_select(fl);
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aspeed_smc_flash_select(fl);
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aspeed_smc_flash_send_addr(fl, addr);
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aspeed_smc_flash_setup(fl, addr);
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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ssi_transfer(s->spi, (data >> (8 * i)) & 0xff);
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ssi_transfer(s->spi, (data >> (8 * i)) & 0xff);
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