target-i386: Remove confusing X86_64_DEF macro
The X86_64_DEF macro is a confusing way of making some terms in a conditional only appear if TARGET_X86_64 is defined. We only use it in two places, and in both cases this is for making the same test, so abstract that check out into a function where we can use a more conventional #ifdef. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -38,12 +38,10 @@
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#define PREFIX_ADR 0x10
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#ifdef TARGET_X86_64
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#define X86_64_DEF(...) __VA_ARGS__
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#define CODE64(s) ((s)->code64)
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#define REX_X(s) ((s)->rex_x)
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#define REX_B(s) ((s)->rex_b)
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#else
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#define X86_64_DEF(...)
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#define CODE64(s) 0
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#define REX_X(s) 0
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#define REX_B(s) 0
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@ -265,11 +263,30 @@ static inline void gen_op_andl_A0_ffff(void)
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#define REG_LH_OFFSET 4
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#endif
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/* In instruction encodings for byte register accesses the
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* register number usually indicates "low 8 bits of register N";
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* however there are some special cases where N 4..7 indicates
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* [AH, CH, DH, BH], ie "bits 15..8 of register N-4". Return
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* true for this special case, false otherwise.
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*/
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static inline bool byte_reg_is_xH(int reg)
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{
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if (reg < 4) {
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return false;
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}
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#ifdef TARGET_X86_64
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if (reg >= 8 || x86_64_hregs) {
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return false;
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}
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#endif
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return true;
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}
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static inline void gen_op_mov_reg_v(int ot, int reg, TCGv t0)
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{
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switch(ot) {
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case OT_BYTE:
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if (reg < 4 X86_64_DEF( || reg >= 8 || x86_64_hregs)) {
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if (!byte_reg_is_xH(reg)) {
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tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], t0, 0, 8);
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} else {
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tcg_gen_deposit_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], t0, 8, 8);
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@ -324,19 +341,11 @@ static inline void gen_op_mov_reg_A0(int size, int reg)
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static inline void gen_op_mov_v_reg(int ot, TCGv t0, int reg)
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{
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switch(ot) {
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case OT_BYTE:
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if (reg < 4 X86_64_DEF( || reg >= 8 || x86_64_hregs)) {
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goto std_case;
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} else {
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tcg_gen_shri_tl(t0, cpu_regs[reg - 4], 8);
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tcg_gen_ext8u_tl(t0, t0);
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}
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break;
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default:
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std_case:
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if (ot == OT_BYTE && byte_reg_is_xH(reg)) {
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tcg_gen_shri_tl(t0, cpu_regs[reg - 4], 8);
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tcg_gen_ext8u_tl(t0, t0);
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} else {
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tcg_gen_mov_tl(t0, cpu_regs[reg]);
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break;
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}
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}
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