target-arm: lpae: Rename granule_sz to stride
Rename granule_sz to stride to better match the reference manuals. No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-7-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -6488,7 +6488,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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uint32_t tableattrs;
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target_ulong page_size;
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uint32_t attrs;
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int32_t granule_sz = 9;
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int32_t stride = 9;
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int32_t va_size = 32;
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int inputsize;
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int32_t tbi = 0;
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@ -6597,10 +6597,10 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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tg = extract32(tcr->raw_tcr, 14, 2);
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if (tg == 1) { /* 64KB pages */
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granule_sz = 13;
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stride = 13;
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}
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if (tg == 2) { /* 16KB pages */
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granule_sz = 11;
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stride = 11;
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}
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} else {
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/* We should only be here if TTBR1 is valid */
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@ -6612,15 +6612,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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tg = extract32(tcr->raw_tcr, 30, 2);
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if (tg == 3) { /* 64KB pages */
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granule_sz = 13;
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stride = 13;
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}
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if (tg == 1) { /* 16KB pages */
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granule_sz = 11;
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stride = 11;
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}
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}
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/* Here we should have set up all the parameters for the translation:
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* va_size, inputsize, ttbr, epd, granule_sz, tbi
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* va_size, inputsize, ttbr, epd, stride, tbi
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*/
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if (epd) {
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@ -6632,16 +6632,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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/* The starting level depends on the virtual address size (which can be
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* up to 48 bits) and the translation granule size. It indicates the number
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* of strides (granule_sz bits at a time) needed to consume the bits
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* of strides (stride bits at a time) needed to consume the bits
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* of the input address. In the pseudocode this is:
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* level = 4 - RoundUp((inputsize - grainsize) / stride)
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* where their 'inputsize' is our 'inputsize', 'grainsize' is
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* our 'granule_sz + 3' and 'stride' is our 'granule_sz'.
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* our 'stride + 3' and 'stride' is our 'stride'.
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* Applying the usual "rounded up m/n is (m+n-1)/n" and simplifying:
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* = 4 - (inputsize - granule_sz - 3 + granule_sz - 1) / granule_sz
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* = 4 - (inputsize - 4) / granule_sz;
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* = 4 - (inputsize - stride - 3 + stride - 1) / stride
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* = 4 - (inputsize - 4) / stride;
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*/
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level = 4 - (inputsize - 4) / granule_sz;
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level = 4 - (inputsize - 4) / stride;
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/* Clear the vaddr bits which aren't part of the within-region address,
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* so that we don't have to special case things when calculating the
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@ -6651,11 +6651,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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address &= (1ULL << inputsize) - 1;
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}
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descmask = (1ULL << (granule_sz + 3)) - 1;
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descmask = (1ULL << (stride + 3)) - 1;
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/* Now we can extract the actual base address from the TTBR */
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descaddr = extract64(ttbr, 0, 48);
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descaddr &= ~((1ULL << (inputsize - (granule_sz * (4 - level)))) - 1);
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descaddr &= ~((1ULL << (inputsize - (stride * (4 - level)))) - 1);
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/* Secure accesses start with the page table in secure memory and
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* can be downgraded to non-secure at any step. Non-secure accesses
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@ -6667,7 +6667,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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uint64_t descriptor;
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bool nstable;
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descaddr |= (address >> (granule_sz * (4 - level))) & descmask;
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descaddr |= (address >> (stride * (4 - level))) & descmask;
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descaddr &= ~7ULL;
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nstable = extract32(tableattrs, 4, 1);
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descriptor = arm_ldq_ptw(cs, descaddr, !nstable);
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@ -6692,7 +6692,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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* These are basically the same thing, although the number
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* of bits we pull in from the vaddr varies.
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*/
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page_size = (1ULL << ((granule_sz * (4 - level)) + 3));
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page_size = (1ULL << ((stride * (4 - level)) + 3));
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descaddr |= (address & (page_size - 1));
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/* Extract attributes from the descriptor and merge with table attrs */
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attrs = extract64(descriptor, 2, 10)
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