target/arm: Consistently use ARMFPRounding during translation
In preparation for extracting new helpers, ensure that the rounding mode is represented as ARMFPRounding and not FloatRoundMode. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -6202,7 +6202,7 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
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case 0xa: /* FRINTM */
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case 0xb: /* FRINTZ */
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case 0xc: /* FRINTA */
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rmode = arm_rmode_to_sf(opcode & 7);
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rmode = opcode & 7;
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gen_fpst = gen_helper_rints;
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break;
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case 0xe: /* FRINTX */
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@ -6212,14 +6212,14 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
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gen_fpst = gen_helper_rints;
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break;
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case 0x10: /* FRINT32Z */
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rmode = float_round_to_zero;
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rmode = FPROUNDING_ZERO;
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gen_fpst = gen_helper_frint32_s;
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break;
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case 0x11: /* FRINT32X */
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gen_fpst = gen_helper_frint32_s;
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break;
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case 0x12: /* FRINT64Z */
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rmode = float_round_to_zero;
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rmode = FPROUNDING_ZERO;
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gen_fpst = gen_helper_frint64_s;
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break;
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case 0x13: /* FRINT64X */
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@ -6231,7 +6231,7 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
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fpst = fpstatus_ptr(FPST_FPCR);
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if (rmode >= 0) {
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TCGv_i32 tcg_rmode = tcg_const_i32(rmode);
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TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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gen_fpst(tcg_res, tcg_op, fpst);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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@ -6275,7 +6275,7 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
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case 0xa: /* FRINTM */
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case 0xb: /* FRINTZ */
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case 0xc: /* FRINTA */
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rmode = arm_rmode_to_sf(opcode & 7);
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rmode = opcode & 7;
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gen_fpst = gen_helper_rintd;
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break;
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case 0xe: /* FRINTX */
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@ -6285,14 +6285,14 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
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gen_fpst = gen_helper_rintd;
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break;
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case 0x10: /* FRINT32Z */
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rmode = float_round_to_zero;
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rmode = FPROUNDING_ZERO;
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gen_fpst = gen_helper_frint32_d;
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break;
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case 0x11: /* FRINT32X */
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gen_fpst = gen_helper_frint32_d;
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break;
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case 0x12: /* FRINT64Z */
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rmode = float_round_to_zero;
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rmode = FPROUNDING_ZERO;
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gen_fpst = gen_helper_frint64_d;
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break;
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case 0x13: /* FRINT64X */
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@ -6304,7 +6304,7 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
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fpst = fpstatus_ptr(FPST_FPCR);
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if (rmode >= 0) {
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TCGv_i32 tcg_rmode = tcg_const_i32(rmode);
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TCGv_i32 tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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gen_fpst(tcg_res, tcg_op, fpst);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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@ -4082,7 +4082,7 @@ TRANS_FEAT(FRINTX, aa64_sve, gen_gvec_fpst_arg_zpz, frintx_fns[a->esz],
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a, 0, a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
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static bool do_frint_mode(DisasContext *s, arg_rpr_esz *a,
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int mode, gen_helper_gvec_3_ptr *fn)
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ARMFPRounding mode, gen_helper_gvec_3_ptr *fn)
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{
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unsigned vsz;
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TCGv_i32 tmode;
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@ -4096,7 +4096,7 @@ static bool do_frint_mode(DisasContext *s, arg_rpr_esz *a,
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}
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vsz = vec_full_reg_size(s);
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tmode = tcg_const_i32(mode);
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tmode = tcg_const_i32(arm_rmode_to_sf(mode));
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status = fpstatus_ptr(a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
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gen_helper_set_rmode(tmode, tmode, status);
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@ -4111,15 +4111,15 @@ static bool do_frint_mode(DisasContext *s, arg_rpr_esz *a,
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}
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TRANS_FEAT(FRINTN, aa64_sve, do_frint_mode, a,
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float_round_nearest_even, frint_fns[a->esz])
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FPROUNDING_TIEEVEN, frint_fns[a->esz])
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TRANS_FEAT(FRINTP, aa64_sve, do_frint_mode, a,
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float_round_up, frint_fns[a->esz])
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FPROUNDING_POSINF, frint_fns[a->esz])
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TRANS_FEAT(FRINTM, aa64_sve, do_frint_mode, a,
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float_round_down, frint_fns[a->esz])
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FPROUNDING_NEGINF, frint_fns[a->esz])
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TRANS_FEAT(FRINTZ, aa64_sve, do_frint_mode, a,
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float_round_to_zero, frint_fns[a->esz])
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FPROUNDING_ZERO, frint_fns[a->esz])
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TRANS_FEAT(FRINTA, aa64_sve, do_frint_mode, a,
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float_round_ties_away, frint_fns[a->esz])
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FPROUNDING_TIEAWAY, frint_fns[a->esz])
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static gen_helper_gvec_3_ptr * const frecpx_fns[] = {
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NULL, gen_helper_sve_frecpx_h,
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@ -7145,9 +7145,9 @@ TRANS_FEAT(FCVTLT_sd, aa64_sve2, gen_gvec_fpst_arg_zpz,
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gen_helper_sve2_fcvtlt_sd, a, 0, FPST_FPCR)
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TRANS_FEAT(FCVTX_ds, aa64_sve2, do_frint_mode, a,
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float_round_to_odd, gen_helper_sve_fcvt_ds)
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FPROUNDING_ODD, gen_helper_sve_fcvt_ds)
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TRANS_FEAT(FCVTXNT_ds, aa64_sve2, do_frint_mode, a,
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float_round_to_odd, gen_helper_sve2_fcvtnt_ds)
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FPROUNDING_ODD, gen_helper_sve2_fcvtnt_ds)
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static gen_helper_gvec_3_ptr * const flogb_fns[] = {
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NULL, gen_helper_flogb_h,
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@ -2783,7 +2783,7 @@ static bool trans_VRINTZ_hp(DisasContext *s, arg_VRINTZ_sp *a)
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tmp = tcg_temp_new_i32();
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vfp_load_reg32(tmp, a->vm);
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fpst = fpstatus_ptr(FPST_FPCR_F16);
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tcg_rmode = tcg_const_i32(float_round_to_zero);
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tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO));
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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gen_helper_rinth(tmp, tmp, fpst);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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@ -2808,7 +2808,7 @@ static bool trans_VRINTZ_sp(DisasContext *s, arg_VRINTZ_sp *a)
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tmp = tcg_temp_new_i32();
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vfp_load_reg32(tmp, a->vm);
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fpst = fpstatus_ptr(FPST_FPCR);
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tcg_rmode = tcg_const_i32(float_round_to_zero);
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tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO));
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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gen_helper_rints(tmp, tmp, fpst);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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@ -2842,7 +2842,7 @@ static bool trans_VRINTZ_dp(DisasContext *s, arg_VRINTZ_dp *a)
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tmp = tcg_temp_new_i64();
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vfp_load_reg64(tmp, a->vm);
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fpst = fpstatus_ptr(FPST_FPCR);
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tcg_rmode = tcg_const_i32(float_round_to_zero);
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tcg_rmode = tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO));
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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gen_helper_rintd(tmp, tmp, fpst);
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gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
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