hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}()
Read or write to uart registers when unclocked or in reset should be ignored. Add the check there, and as a result of this, the check in uart_write_tx_fifo() is now unnecessary. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210901124521.30599-6-bmeng.cn@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -335,11 +335,6 @@ static gboolean cadence_uart_xmit(void *do_not_use, GIOCondition cond,
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static void uart_write_tx_fifo(CadenceUARTState *s, const uint8_t *buf,
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int size)
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{
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/* ignore characters when unclocked or in reset */
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if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
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return;
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}
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if ((s->r[R_CR] & UART_CR_TX_DIS) || !(s->r[R_CR] & UART_CR_TX_EN)) {
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return;
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}
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@ -416,6 +411,11 @@ static MemTxResult uart_write(void *opaque, hwaddr offset,
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{
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CadenceUARTState *s = opaque;
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/* ignore access when unclocked or in reset */
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if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
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return MEMTX_ERROR;
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}
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DB_PRINT(" offset:%x data:%08x\n", (unsigned)offset, (unsigned)value);
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offset >>= 2;
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if (offset >= CADENCE_UART_R_MAX) {
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@ -476,6 +476,11 @@ static MemTxResult uart_read(void *opaque, hwaddr offset,
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CadenceUARTState *s = opaque;
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uint32_t c = 0;
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/* ignore access when unclocked or in reset */
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if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
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return MEMTX_ERROR;
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}
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offset >>= 2;
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if (offset >= CADENCE_UART_R_MAX) {
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return MEMTX_DECODE_ERROR;
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