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hw/arm/exynos4210: QOM'ify the Exynos4210 SoC

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Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2019-05-23 14:47:44 +01:00 committed by Peter Maydell
parent 59520dc65e
commit 98e4f4fdb8
3 changed files with 37 additions and 9 deletions
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28
hw/arm/exynos4210.c
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@ -178,9 +178,10 @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
sysbus_connect_irq(busdev, 0, irq);
}
Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
static void exynos4210_realize(DeviceState *socdev, Error **errp)
{
Exynos4210State *s = g_new0(Exynos4210State, 1);
Exynos4210State *s = EXYNOS4210_SOC(socdev);
MemoryRegion *system_mem = get_system_memory();
qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];
SysBusDevice *busdev;
DeviceState *dev;
@ -435,6 +436,25 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
return s;
}
static void exynos4210_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = exynos4210_realize;
}
static const TypeInfo exynos4210_info = {
.name = TYPE_EXYNOS4210_SOC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210State),
.class_init = exynos4210_class_init,
};
static void exynos4210_register_types(void)
{
type_register_static(&exynos4210_info);
}
type_init(exynos4210_register_types)

9
hw/arm/exynos4_boards.c
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@ -45,7 +45,7 @@ typedef enum Exynos4BoardType {
} Exynos4BoardType;
typedef struct Exynos4BoardState {
Exynos4210State *soc;
Exynos4210State soc;
MemoryRegion dram0_mem;
MemoryRegion dram1_mem;
} Exynos4BoardState;
@ -130,7 +130,10 @@ exynos4_boards_init_common(MachineState *machine,
exynos4_boards_init_ram(s, get_system_memory(),
exynos4_board_ram_size[board_type]);
s->soc = exynos4210_init(get_system_memory());
object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC);
qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default());
object_property_set_bool(OBJECT(&s->soc), true, "realized",
&error_fatal);
return s;
}
@ -148,7 +151,7 @@ static void smdkc210_init(MachineState *machine)
EXYNOS4_BOARD_SMDKC210);
lan9215_init(SMDK_LAN9118_BASE_ADDR,
qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)]));
qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo);
}

9
include/hw/arm/exynos4210.h
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@ -85,6 +85,9 @@ typedef struct Exynos4210Irq {
} Exynos4210Irq;
typedef struct Exynos4210State {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
ARMCPU *cpu[EXYNOS4210_NCPUS];
Exynos4210Irq irqs;
qemu_irq *irq_table;
@ -98,11 +101,13 @@ typedef struct Exynos4210State {
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
} Exynos4210State;
#define TYPE_EXYNOS4210_SOC "exynos4210"
#define EXYNOS4210_SOC(obj) \
OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC)
void exynos4210_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info);
Exynos4210State *exynos4210_init(MemoryRegion *system_mem);
/* Initialize exynos4210 IRQ subsystem stub */
qemu_irq *exynos4210_init_irq(Exynos4210Irq *env);