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hw/net/can: Introduce Xilinx ZynqMP CAN controller 

The Xilinx ZynqMP CAN controller is developed based on SocketCAN, QEMU CAN bus
implementation. Bus connection and socketCAN connection for each CAN module
can be set through command lines.

Example for using single CAN:
    -object can-bus,id=canbus0 \
    -machine xlnx-zcu102.canbus0=canbus0 \
    -object can-host-socketcan,id=socketcan0,if=vcan0,canbus=canbus0

Example for connecting both CAN to same virtual CAN on host machine:
    -object can-bus,id=canbus0 -object can-bus,id=canbus1 \
    -machine xlnx-zcu102.canbus0=canbus0 \
    -machine xlnx-zcu102.canbus1=canbus1 \
    -object can-host-socketcan,id=socketcan0,if=vcan0,canbus=canbus0 \
    -object can-host-socketcan,id=socketcan1,if=vcan0,canbus=canbus1

To create virtual CAN on the host machine, please check the QEMU CAN docs:
https://github.com/qemu/qemu/blob/master/docs/can.txt

Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-id: 1605728926-352690-2-git-send-email-fnu.vikram@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Vikram Garhwal 2020-11-18 11:48:43 -08:00 committed by Peter Maydell
parent d9aad887e8
commit 98e5d7a2b7
7 changed files with 1252 additions and 0 deletions
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1
hw/Kconfig
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@ -80,3 +80,4 @@ config XILINX_AXI
config XLNX_ZYNQMP
bool
select REGISTER
select CAN_BUS

1
hw/net/can/meson.build
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@ -4,3 +4,4 @@ softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_pcm3680_pci.c'))
softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_mioe3680_pci.c'))
softmmu_ss.add(when: 'CONFIG_CAN_CTUCANFD', if_true: files('ctucan_core.c'))
softmmu_ss.add(when: 'CONFIG_CAN_CTUCANFD_PCI', if_true: files('ctucan_pci.c'))
softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-can.c'))

9
hw/net/can/trace-events Normal file
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@ -0,0 +1,9 @@
# xlnx-zynqmp-can.c
xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) "ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x"
xlnx_can_reset(uint32_t val) "Resetting controller with value = 0x%08x"
xlnx_can_rx_fifo_filter_reject(uint32_t id, uint8_t dlc) "Frame: ID: 0x%08x DLC: 0x%02x"
xlnx_can_filter_id_pre_write(uint8_t filter_num, uint32_t value) "Filter%d ID: 0x%08x"
xlnx_can_filter_mask_pre_write(uint8_t filter_num, uint32_t value) "Filter%d MASK: 0x%08x"
xlnx_can_tx_data(uint32_t id, uint8_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x"
xlnx_can_rx_data(uint32_t id, uint32_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x"
xlnx_can_rx_discard(uint32_t status) "Controller is not enabled for bus communication. Status Register: 0x%08x"

1
hw/net/can/trace.h Normal file
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@ -0,0 +1 @@
#include "trace/trace-hw_net_can.h"

1161
hw/net/can/xlnx-zynqmp-can.c Normal file
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File diff suppressed because it is too large Load Diff

78
include/hw/net/xlnx-zynqmp-can.h Normal file
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@ -0,0 +1,78 @@
/*
* QEMU model of the Xilinx ZynqMP CAN controller.
*
* Copyright (c) 2020 Xilinx Inc.
*
* Written-by: Vikram Garhwal<fnu.vikram@xilinx.com>
*
* Based on QEMU CAN Device emulation implemented by Jin Yang, Deniz Eren and
* Pavel Pisa.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef XLNX_ZYNQMP_CAN_H
#define XLNX_ZYNQMP_CAN_H
#include "hw/register.h"
#include "net/can_emu.h"
#include "net/can_host.h"
#include "qemu/fifo32.h"
#include "hw/ptimer.h"
#include "hw/qdev-clock.h"
#define TYPE_XLNX_ZYNQMP_CAN "xlnx.zynqmp-can"
#define XLNX_ZYNQMP_CAN(obj) \
OBJECT_CHECK(XlnxZynqMPCANState, (obj), TYPE_XLNX_ZYNQMP_CAN)
#define MAX_CAN_CTRLS 2
#define XLNX_ZYNQMP_CAN_R_MAX (0x84 / 4)
#define MAILBOX_CAPACITY 64
#define CAN_TIMER_MAX 0XFFFFUL
#define CAN_DEFAULT_CLOCK (24 * 1000 * 1000)
/* Each CAN_FRAME will have 4 * 32bit size. */
#define CAN_FRAME_SIZE 4
#define RXFIFO_SIZE (MAILBOX_CAPACITY * CAN_FRAME_SIZE)
typedef struct XlnxZynqMPCANState {
SysBusDevice parent_obj;
MemoryRegion iomem;
qemu_irq irq;
CanBusClientState bus_client;
CanBusState *canbus;
struct {
uint32_t ext_clk_freq;
} cfg;
RegisterInfo reg_info[XLNX_ZYNQMP_CAN_R_MAX];
uint32_t regs[XLNX_ZYNQMP_CAN_R_MAX];
Fifo32 rx_fifo;
Fifo32 tx_fifo;
Fifo32 txhpb_fifo;
ptimer_state *can_timer;
} XlnxZynqMPCANState;
#endif

1
meson.build
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@ -1433,6 +1433,7 @@ if have_system
'hw/misc',
'hw/misc/macio',
'hw/net',
'hw/net/can',
'hw/nvram',
'hw/pci',
'hw/pci-host',