From 9988c7b50e0ebd93a8ac10d7da6890d05971e98e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 27 Mar 2024 15:48:04 +0100 Subject: [PATCH] fpu/softfloat: Remove mention of TILE-Gx target MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TILE-Gx has been removed during the v6.0 release (see commit 2cc1a90166 "Remove deprecated target tilegx"), no need to mention it in the list of "supported targets". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Reviewed-by: Michael Tokarev Signed-off-by: Michael Tokarev --- fpu/softfloat-specialize.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 1610472cfc..1c85c48a73 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -152,7 +152,7 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status) /* * This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V, * S390, SH4, TriCore, and Xtensa. Our other supported targets, - * CRIS, Nios2, and Tile, do not have floating-point. + * CRIS and Nios2, do not have floating-point. */ if (snan_bit_is_one(status)) { /* set all bits other than msb */