hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models
Add an orgate and 'or' the interrupts from the BBRAM and RTC models. Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Message-id: 20220121161141.14389-3-francisco.iglesias@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -365,7 +365,7 @@ static void fdt_add_bbram_node(VersalVirt *s)
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qemu_fdt_add_subnode(s->fdt, name);
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qemu_fdt_add_subnode(s->fdt, name);
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qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
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qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
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GIC_FDT_IRQ_TYPE_SPI, VERSAL_BBRAM_APB_IRQ_0,
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GIC_FDT_IRQ_TYPE_SPI, VERSAL_PMC_APB_IRQ,
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GIC_FDT_IRQ_FLAGS_LEVEL_HI);
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GIC_FDT_IRQ_FLAGS_LEVEL_HI);
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qemu_fdt_setprop(s->fdt, name, "interrupt-names",
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qemu_fdt_setprop(s->fdt, name, "interrupt-names",
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interrupt_names, sizeof(interrupt_names));
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interrupt_names, sizeof(interrupt_names));
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@ -25,6 +25,8 @@
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#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
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#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
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#define GEM_REVISION 0x40070106
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#define GEM_REVISION 0x40070106
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#define VERSAL_NUM_PMC_APB_IRQS 2
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static void versal_create_apu_cpus(Versal *s)
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static void versal_create_apu_cpus(Versal *s)
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{
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{
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int i;
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int i;
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@ -260,6 +262,25 @@ static void versal_create_sds(Versal *s, qemu_irq *pic)
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}
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}
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}
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}
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static void versal_create_pmc_apb_irq_orgate(Versal *s, qemu_irq *pic)
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{
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DeviceState *orgate;
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/*
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* The VERSAL_PMC_APB_IRQ is an 'or' of the interrupts from the following
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* models:
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* - RTC
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* - BBRAM
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*/
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object_initialize_child(OBJECT(s), "pmc-apb-irq-orgate",
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&s->pmc.apb_irq_orgate, TYPE_OR_IRQ);
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orgate = DEVICE(&s->pmc.apb_irq_orgate);
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object_property_set_int(OBJECT(orgate),
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"num-lines", VERSAL_NUM_PMC_APB_IRQS, &error_fatal);
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qdev_realize(orgate, NULL, &error_fatal);
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qdev_connect_gpio_out(orgate, 0, pic[VERSAL_PMC_APB_IRQ]);
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}
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static void versal_create_rtc(Versal *s, qemu_irq *pic)
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static void versal_create_rtc(Versal *s, qemu_irq *pic)
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{
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{
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SysBusDevice *sbd;
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SysBusDevice *sbd;
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@ -277,7 +298,8 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)
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* TODO: Connect the ALARM and SECONDS interrupts once our RTC model
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* TODO: Connect the ALARM and SECONDS interrupts once our RTC model
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* supports them.
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* supports them.
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*/
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*/
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sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]);
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sysbus_connect_irq(sbd, 1,
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qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 0));
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}
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}
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static void versal_create_xrams(Versal *s, qemu_irq *pic)
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static void versal_create_xrams(Versal *s, qemu_irq *pic)
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@ -328,7 +350,8 @@ static void versal_create_bbram(Versal *s, qemu_irq *pic)
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sysbus_realize(sbd, &error_fatal);
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sysbus_realize(sbd, &error_fatal);
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memory_region_add_subregion(&s->mr_ps, MM_PMC_BBRAM_CTRL,
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memory_region_add_subregion(&s->mr_ps, MM_PMC_BBRAM_CTRL,
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sysbus_mmio_get_region(sbd, 0));
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sysbus_mmio_get_region(sbd, 0));
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sysbus_connect_irq(sbd, 0, pic[VERSAL_BBRAM_APB_IRQ_0]);
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sysbus_connect_irq(sbd, 0,
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qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 1));
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}
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}
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static void versal_realize_efuse_part(Versal *s, Object *dev, hwaddr base)
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static void versal_realize_efuse_part(Versal *s, Object *dev, hwaddr base)
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@ -455,6 +478,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
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versal_create_gems(s, pic);
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versal_create_gems(s, pic);
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versal_create_admas(s, pic);
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versal_create_admas(s, pic);
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versal_create_sds(s, pic);
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versal_create_sds(s, pic);
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versal_create_pmc_apb_irq_orgate(s, pic);
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versal_create_rtc(s, pic);
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versal_create_rtc(s, pic);
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versal_create_xrams(s, pic);
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versal_create_xrams(s, pic);
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versal_create_bbram(s, pic);
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versal_create_bbram(s, pic);
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@ -85,6 +85,8 @@ struct Versal {
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XlnxEFuse efuse;
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XlnxEFuse efuse;
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XlnxVersalEFuseCtrl efuse_ctrl;
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XlnxVersalEFuseCtrl efuse_ctrl;
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XlnxVersalEFuseCache efuse_cache;
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XlnxVersalEFuseCache efuse_cache;
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qemu_or_irq apb_irq_orgate;
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} pmc;
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} pmc;
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struct {
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struct {
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@ -111,8 +113,7 @@ struct Versal {
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#define VERSAL_GEM1_WAKE_IRQ_0 59
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#define VERSAL_GEM1_WAKE_IRQ_0 59
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#define VERSAL_ADMA_IRQ_0 60
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#define VERSAL_ADMA_IRQ_0 60
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#define VERSAL_XRAM_IRQ_0 79
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#define VERSAL_XRAM_IRQ_0 79
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#define VERSAL_BBRAM_APB_IRQ_0 121
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#define VERSAL_PMC_APB_IRQ 121
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#define VERSAL_RTC_APB_ERR_IRQ 121
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#define VERSAL_SD0_IRQ_0 126
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#define VERSAL_SD0_IRQ_0 126
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#define VERSAL_EFUSE_IRQ 139
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#define VERSAL_EFUSE_IRQ 139
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#define VERSAL_RTC_ALARM_IRQ 142
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#define VERSAL_RTC_ALARM_IRQ 142
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