OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

target-alpha: Convert gen_ext_h/l to source/sink 

Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2014-03-19 11:26:57 -07:00
parent 9a8fa1bdad
commit 9a734d64f9
1 changed files with 26 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

66
target-alpha/translate.c
View File

@ -1202,50 +1202,36 @@ static inline void gen_zap(int ra, int rb, int rc, int islit, uint8_t lit)
/* EXTWH, EXTLH, EXTQH */ /* EXTWH, EXTLH, EXTQH */
static void gen_ext_h(int ra, int rb, int rc, int islit, static void gen_ext_h(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
uint8_t lit, uint8_t byte_mask) uint8_t lit, uint8_t byte_mask)
{ {
if (unlikely(rc == 31)) { if (islit) {
return; tcg_gen_shli_i64(vc, va, (64 - lit * 8) & 0x3f);
} else if (unlikely(ra == 31)) {
tcg_gen_movi_i64(cpu_ir[rc], 0);
} else { } else {
if (islit) { TCGv tmp = tcg_temp_new();
lit = (64 - (lit & 7) * 8) & 0x3f; tcg_gen_shli_i64(tmp, load_gpr(ctx, rb), 3);
tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], lit); tcg_gen_neg_i64(tmp, tmp);
} else { tcg_gen_andi_i64(tmp, tmp, 0x3f);
TCGv tmp1 = tcg_temp_new(); tcg_gen_shl_i64(vc, va, tmp);
tcg_gen_andi_i64(tmp1, cpu_ir[rb], 7); tcg_temp_free(tmp);
tcg_gen_shli_i64(tmp1, tmp1, 3);
tcg_gen_neg_i64(tmp1, tmp1);
tcg_gen_andi_i64(tmp1, tmp1, 0x3f);
tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1);
tcg_temp_free(tmp1);
}
gen_zapnoti(cpu_ir[rc], cpu_ir[rc], byte_mask);
} }
gen_zapnoti(vc, vc, byte_mask);
} }
/* EXTBL, EXTWL, EXTLL, EXTQL */ /* EXTBL, EXTWL, EXTLL, EXTQL */
static void gen_ext_l(int ra, int rb, int rc, int islit, static void gen_ext_l(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
uint8_t lit, uint8_t byte_mask) uint8_t lit, uint8_t byte_mask)
{ {
if (unlikely(rc == 31)) { if (islit) {
return; tcg_gen_shri_i64(vc, va, (lit & 7) * 8);
} else if (unlikely(ra == 31)) {
tcg_gen_movi_i64(cpu_ir[rc], 0);
} else { } else {
if (islit) { TCGv tmp = tcg_temp_new();
tcg_gen_shri_i64(cpu_ir[rc], cpu_ir[ra], (lit & 7) * 8); tcg_gen_andi_i64(tmp, load_gpr(ctx, rb), 7);
} else { tcg_gen_shli_i64(tmp, tmp, 3);
TCGv tmp = tcg_temp_new(); tcg_gen_shr_i64(vc, va, tmp);
tcg_gen_andi_i64(tmp, cpu_ir[rb], 7); tcg_temp_free(tmp);
tcg_gen_shli_i64(tmp, tmp, 3);
tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], tmp);
tcg_temp_free(tmp);
}
gen_zapnoti(cpu_ir[rc], cpu_ir[rc], byte_mask);
} }
gen_zapnoti(vc, vc, byte_mask);
} }
/* INSWH, INSLH, INSQH */ /* INSWH, INSLH, INSQH */
@ -2104,7 +2090,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x06: case 0x06:
/* EXTBL */ /* EXTBL */
gen_ext_l(ra, rb, rc, islit, lit, 0x01); gen_ext_l(ctx, vc, va, rb, islit, lit, 0x01);
break; break;
case 0x0B: case 0x0B:
/* INSBL */ /* INSBL */
@ -2116,7 +2102,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x16: case 0x16:
/* EXTWL */ /* EXTWL */
gen_ext_l(ra, rb, rc, islit, lit, 0x03); gen_ext_l(ctx, vc, va, rb, islit, lit, 0x03);
break; break;
case 0x1B: case 0x1B:
/* INSWL */ /* INSWL */
@ -2128,7 +2114,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x26: case 0x26:
/* EXTLL */ /* EXTLL */
gen_ext_l(ra, rb, rc, islit, lit, 0x0f); gen_ext_l(ctx, vc, va, rb, islit, lit, 0x0f);
break; break;
case 0x2B: case 0x2B:
/* INSLL */ /* INSLL */
@ -2160,7 +2146,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x36: case 0x36:
/* EXTQL */ /* EXTQL */
gen_ext_l(ra, rb, rc, islit, lit, 0xff); gen_ext_l(ctx, vc, va, rb, islit, lit, 0xff);
break; break;
case 0x39: case 0x39:
/* SLL */ /* SLL */
@ -2200,7 +2186,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x5A: case 0x5A:
/* EXTWH */ /* EXTWH */
gen_ext_h(ra, rb, rc, islit, lit, 0x03); gen_ext_h(ctx, vc, va, rb, islit, lit, 0x03);
break; break;
case 0x62: case 0x62:
/* MSKLH */ /* MSKLH */
@ -2212,7 +2198,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x6A: case 0x6A:
/* EXTLH */ /* EXTLH */
gen_ext_h(ra, rb, rc, islit, lit, 0x0f); gen_ext_h(ctx, vc, va, rb, islit, lit, 0x0f);
break; break;
case 0x72: case 0x72:
/* MSKQH */ /* MSKQH */
@ -2224,7 +2210,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
break; break;
case 0x7A: case 0x7A:
/* EXTQH */ /* EXTQH */
gen_ext_h(ra, rb, rc, islit, lit, 0xff); gen_ext_h(ctx, vc, va, rb, islit, lit, 0xff);
break; break;
default: default:
goto invalid_opc; goto invalid_opc;