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target-xxx: Use fprintf_function (format checking)

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fprintf_function uses format checking with GCC_FMT_ATTR.

Format errors were fixed in
* target-i386/helper.c
* target-mips/translate.c
* target-ppc/translate.c

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Stefan Weil 2010-10-22 23:03:33 +02:00 committed by Blue Swirl
parent 055403b2a7
commit 9a78eead0c
26 changed files with 54 additions and 67 deletions
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8
cpu-all.h
View File

@ -765,12 +765,10 @@ int page_check_range(target_ulong start, target_ulong len, int flags);
CPUState *cpu_copy(CPUState *env);
CPUState *qemu_get_cpu(int cpu);
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags);
void cpu_dump_statistics (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
int flags);
void cpu_dump_statistics(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags);
void QEMU_NORETURN cpu_abort(CPUState *env, const char *fmt, ...)
GCC_FMT_ATTR(2, 3);

3
cpus.c
View File

@ -978,8 +978,7 @@ int64_t cpu_get_icount(void)
return qemu_icount_bias + (icount << icount_time_shift);
}
void list_cpus(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
const char *optarg)
void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
{
/* XXX: implement xxx_cpu_list for targets that still miss it */
#if defined(cpu_list_id)

3
cpus.h
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@ -16,7 +16,6 @@ void vm_state_notify(int running, int reason);
bool cpu_exec_all(void);
void set_numa_modes(void);
void set_cpu_log(const char *optarg);
void list_cpus(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
const char *optarg);
void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg);
#endif

3
target-alpha/helper.c
View File

@ -537,8 +537,7 @@ void do_interrupt (CPUState *env)
}
#endif
void cpu_dump_state (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
static const char *linux_reg_names[] = {

4
target-arm/cpu.h
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@ -25,6 +25,8 @@
#define CPUState struct CPUARMState
#include "config.h"
#include "qemu-common.h"
#include "cpu-defs.h"
#include "softfloat.h"
@ -353,7 +355,7 @@ static inline int arm_feature(CPUARMState *env, int feature)
return (env->features & (1u << feature)) != 0;
}
void arm_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
/* Interface between CPU and Interrupt controller. */
void armv7m_nvic_set_pending(void *opaque, int irq);

2
target-arm/helper.c
View File

@ -348,7 +348,7 @@ static const struct arm_cpu_t arm_cpu_names[] = {
{ 0, NULL}
};
void arm_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
int i;

3
target-arm/translate.c
View File

@ -9262,8 +9262,7 @@ static const char *cpu_mode_names[16] = {
"???", "???", "???", "und", "???", "???", "???", "sys"
};
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i;

2
target-cris/cpu.h
View File

@ -263,6 +263,6 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
}
#define cpu_list cris_cpu_list
void cris_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
#endif

5
target-cris/translate.c
View File

@ -3426,8 +3426,7 @@ void gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb)
gen_intermediate_code_internal(env, tb, 1);
}
void cpu_dump_state (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i;
@ -3480,7 +3479,7 @@ struct
{32, "crisv32"},
};
void cris_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
unsigned int i;

4
target-i386/cpu.h
View File

@ -20,6 +20,7 @@
#define CPU_I386_H
#include "config.h"
#include "qemu-common.h"
#ifdef TARGET_X86_64
#define TARGET_LONG_BITS 64
@ -756,8 +757,7 @@ typedef struct CPUX86State {
CPUX86State *cpu_x86_init(const char *cpu_model);
int cpu_x86_exec(CPUX86State *s);
void cpu_x86_close(CPUX86State *s);
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
const char *optarg);
void x86_cpu_list (FILE *f, fprintf_function cpu_fprintf, const char *optarg);
void x86_cpudef_setup(void);
int cpu_get_pic_interrupt(CPUX86State *s);

3
target-i386/cpuid.c
View File

@ -762,8 +762,7 @@ static void listflags(char *buf, int bufsize, uint32_t fbits,
* -?dump output all model (x86_def_t) data
* -?cpuid list all recognized cpuid flag names
*/
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
const char *optarg)
void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
{
unsigned char model = !strcmp("?model", optarg);
unsigned char dump = !strcmp("?dump", optarg);

14
target-i386/helper.c
View File

@ -169,8 +169,7 @@ static const char *cc_op_str[] = {
};
static void
cpu_x86_dump_seg_cache(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
cpu_x86_dump_seg_cache(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
const char *name, struct SegmentCache *sc)
{
#ifdef TARGET_X86_64
@ -224,8 +223,7 @@ done:
cpu_fprintf(f, "\n");
}
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int eflags, i, nb;
@ -335,9 +333,11 @@ void cpu_dump_state(CPUState *env, FILE *f,
(uint32_t)env->cr[2],
(uint32_t)env->cr[3],
(uint32_t)env->cr[4]);
for(i = 0; i < 4; i++)
cpu_fprintf(f, "DR%d=%08x ", i, env->dr[i]);
cpu_fprintf(f, "\nDR6=%08x DR7=%08x\n", env->dr[6], env->dr[7]);
for(i = 0; i < 4; i++) {
cpu_fprintf(f, "DR%d=" TARGET_FMT_lx " ", i, env->dr[i]);
}
cpu_fprintf(f, "\nDR6=" TARGET_FMT_lx " DR7=" TARGET_FMT_lx "\n",
env->dr[6], env->dr[7]);
}
if (flags & X86_DUMP_CCOP) {
if ((unsigned)env->cc_op < CC_OP_NB)

3
target-m68k/cpu.h
View File

@ -24,6 +24,7 @@
#define CPUState struct CPUM68KState
#include "qemu-common.h"
#include "cpu-defs.h"
#include "softfloat.h"
@ -198,7 +199,7 @@ static inline int m68k_feature(CPUM68KState *env, int feature)
return (env->features & (1u << feature)) != 0;
}
void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
void register_m68k_insns (CPUM68KState *env);

2
target-m68k/helper.c
View File

@ -53,7 +53,7 @@ static m68k_def_t m68k_cpu_defs[] = {
{NULL, 0},
};
void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
unsigned int i;

3
target-m68k/translate.c
View File

@ -3092,8 +3092,7 @@ void gen_intermediate_code_pc(CPUState *env, TranslationBlock *tb)
gen_intermediate_code_internal(env, tb, 1);
}
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i;

3
target-microblaze/translate.c
View File

@ -1534,8 +1534,7 @@ void gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb)
gen_intermediate_code_internal(env, tb, 1);
}
void cpu_dump_state (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i;

3
target-mips/cpu.h
View File

@ -8,6 +8,7 @@
#define CPUState struct CPUMIPSState
#include "config.h"
#include "qemu-common.h"
#include "mips-defs.h"
#include "cpu-defs.h"
#include "softfloat.h"
@ -496,7 +497,7 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
int unused, int size);
#endif
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
#define cpu_init cpu_mips_init
#define cpu_exec cpu_mips_exec

12
target-mips/translate.c
View File

@ -12450,8 +12450,7 @@ void gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb)
gen_intermediate_code_internal(env, tb, 1);
}
static void fpu_dump_state(CPUState *env, FILE *f,
int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
static void fpu_dump_state(CPUState *env, FILE *f, fprintf_function fpu_fprintf,
int flags)
{
int i;
@ -12480,8 +12479,8 @@ static void fpu_dump_state(CPUState *env, FILE *f,
} while(0)
fpu_fprintf(f, "CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%08x(0x%02x)\n",
env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64, env->active_fpu.fp_status,
fpu_fprintf(f, "CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%02x\n",
env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64,
get_float_exception_flags(&env->active_fpu.fp_status));
for (i = 0; i < 32; (is_fpu64) ? i++ : (i += 2)) {
fpu_fprintf(f, "%3s: ", fregnames[i]);
@ -12499,7 +12498,7 @@ static void fpu_dump_state(CPUState *env, FILE *f,
static void
cpu_mips_check_sign_extensions (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
fprintf_function cpu_fprintf,
int flags)
{
int i;
@ -12525,8 +12524,7 @@ cpu_mips_check_sign_extensions (CPUState *env, FILE *f,
}
#endif
void cpu_dump_state (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i;

2
target-mips/translate_init.c
View File

@ -500,7 +500,7 @@ static const mips_def_t *cpu_mips_find_by_name (const char *name)
return NULL;
}
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
{
int i;

4
target-ppc/cpu.h
View File

@ -20,7 +20,7 @@
#define __CPU_PPC_H__
#include "config.h"
#include <inttypes.h>
#include "qemu-common.h"
//#define PPC_EMULATE_32BITS_HYPV
@ -761,7 +761,7 @@ void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value);
#endif /* !defined(CONFIG_USER_ONLY) */
void ppc_store_msr (CPUPPCState *env, target_ulong value);
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf);
const ppc_def_t *cpu_ppc_find_by_name (const char *name);
int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def);

14
target-ppc/translate.c
View File

@ -8830,8 +8830,7 @@ GEN_SPEOP_LDST(evstwwo, 0x1E, 2),
/*****************************************************************************/
/* Misc PowerPC helpers */
void cpu_dump_state (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
#define RGPL 4
@ -8840,15 +8839,15 @@ void cpu_dump_state (CPUState *env, FILE *f,
int i;
cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR "
TARGET_FMT_lx " XER %08x\n", env->nip, env->lr, env->ctr,
env->xer);
TARGET_FMT_lx " XER " TARGET_FMT_lx "\n",
env->nip, env->lr, env->ctr, env->xer);
cpu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF "
TARGET_FMT_lx " idx %d\n", env->msr, env->spr[SPR_HID0],
env->hflags, env->mmu_idx);
#if !defined(NO_TIMER_DUMP)
cpu_fprintf(f, "TB %08x %08x "
cpu_fprintf(f, "TB %08" PRIu32 " %08" PRIu64
#if !defined(CONFIG_USER_ONLY)
"DECR %08x"
" DECR %08" PRIu32
#endif
"\n",
cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env)
@ -8898,8 +8897,7 @@ void cpu_dump_state (CPUState *env, FILE *f,
#undef RFPL
}
void cpu_dump_statistics (CPUState *env, FILE*f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_statistics (CPUState *env, FILE*f, fprintf_function cpu_fprintf,
int flags)
{
#if defined(DO_PPC_STATISTICS)

2
target-ppc/translate_init.c
View File

@ -9756,7 +9756,7 @@ const ppc_def_t *cpu_ppc_find_by_name (const char *name)
return ret;
}
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf)
{
int i, max;

3
target-s390x/translate.c
View File

@ -23,8 +23,7 @@
#include "tcg-op.h"
#include "qemu-log.h"
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i;

3
target-sh4/cpu.h
View File

@ -20,6 +20,7 @@
#define _CPU_SH4_H
#include "config.h"
#include "qemu-common.h"
#define TARGET_LONG_BITS 32
#define TARGET_HAS_ICE 1
@ -168,7 +169,7 @@ int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw,
#define cpu_handle_mmu_fault cpu_sh4_handle_mmu_fault
void do_interrupt(CPUSH4State * env);
void sh4_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf);
#if !defined(CONFIG_USER_ONLY)
void cpu_sh4_invalidate_tlb(CPUSH4State *s);
void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,

2
target-sh4/translate.c
View File

@ -257,7 +257,7 @@ static const sh4_def_t *cpu_sh4_find_by_name(const char *name)
return NULL;
}
void sh4_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
int i;

11
target-sparc/helper.c
View File

@ -1323,8 +1323,7 @@ static const char * const feature_name[] = {
"gl",
};
static void print_features(FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
static void print_features(FILE *f, fprintf_function cpu_fprintf,
uint32_t features, const char *prefix)
{
unsigned int i;
@ -1452,7 +1451,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
return -1;
}
void sparc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
unsigned int i;
@ -1479,8 +1478,7 @@ void sparc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
"fpu_version mmu_version nwindows\n");
}
static void cpu_print_cc(FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf,
uint32_t cc)
{
cpu_fprintf(f, "%c%c%c%c", cc & PSR_NEG? 'N' : '-',
@ -1494,8 +1492,7 @@ static void cpu_print_cc(FILE *f,
#define REGS_PER_LINE 8
#endif
void cpu_dump_state(CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
int i, x;