target/i386: Fix BZHI instruction
We did not correctly handle N >= operand size. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1374 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230114233206.3118472-1-richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1147,20 +1147,20 @@ static void gen_BLSR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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static void gen_BZHI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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{
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MemOp ot = decode->op[0].ot;
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TCGv bound;
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TCGv bound = tcg_constant_tl(ot == MO_64 ? 63 : 31);
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TCGv zero = tcg_constant_tl(0);
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TCGv mone = tcg_constant_tl(-1);
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tcg_gen_ext8u_tl(s->T1, cpu_regs[s->vex_v]);
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bound = tcg_constant_tl(ot == MO_64 ? 63 : 31);
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tcg_gen_ext8u_tl(s->T1, s->T1);
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/*
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* Note that since we're using BMILG (in order to get O
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* cleared) we need to store the inverse into C.
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*/
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tcg_gen_setcond_tl(TCG_COND_LT, cpu_cc_src, s->T1, bound);
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tcg_gen_movcond_tl(TCG_COND_GT, s->T1, s->T1, bound, bound, s->T1);
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tcg_gen_setcond_tl(TCG_COND_LEU, cpu_cc_src, s->T1, bound);
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tcg_gen_movi_tl(s->A0, -1);
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tcg_gen_shl_tl(s->A0, s->A0, s->T1);
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tcg_gen_shl_tl(s->A0, mone, s->T1);
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tcg_gen_movcond_tl(TCG_COND_LEU, s->A0, s->T1, bound, s->A0, zero);
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tcg_gen_andc_tl(s->T0, s->T0, s->A0);
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gen_op_update1_cc(s);
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@ -123,6 +123,9 @@ int main(int argc, char *argv[]) {
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result = bzhiq(mask, 0x1f);
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assert(result == (mask & ~(-1 << 30)));
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result = bzhiq(mask, 0x40);
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assert(result == mask);
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result = rorxq(0x2132435465768798, 8);
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assert(result == 0x9821324354657687);
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