pc-bios: s390x: Save iplb location in lowcore
The POP states that for a list directed IPL the IPLB is stored into memory by the machine loader and its address is stored at offset 0x14 of the lowcore. ZIPL currently uses the address in offset 0x14 to access the IPLB and acquire flags about secure boot. If the IPLB address points into memory which has an unsupported mix of flags set, ZIPL will panic instead of booting the OS. As the lowcore can have quite a high entropy for a guest that did drop out of protected mode (i.e. rebooted) we encountered the ZIPL panic quite often. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Tested-by: Marc Hartmayer <mhartmay@linux.ibm.com> Message-Id: <20200304114231.23493-19-frankja@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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@ -35,6 +35,7 @@ void jump_to_IPL_code(uint64_t address)
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{
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/* store the subsystem information _after_ the bootmap was loaded */
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write_subsystem_identification();
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write_iplb_location();
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/* prevent unknown IPL types in the guest */
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if (iplb.pbt == S390_IPL_TYPE_QEMU_SCSI) {
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@ -9,6 +9,7 @@
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*/
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#include "libc.h"
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#include "helper.h"
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#include "s390-arch.h"
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#include "s390-ccw.h"
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#include "cio.h"
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@ -22,7 +23,7 @@ QemuIplParameters qipl;
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IplParameterBlock iplb __attribute__((__aligned__(PAGE_SIZE)));
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static bool have_iplb;
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static uint16_t cutype;
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LowCore const *lowcore; /* Yes, this *is* a pointer to address 0 */
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LowCore *lowcore; /* Yes, this *is* a pointer to address 0 */
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#define LOADPARM_PROMPT "PROMPT "
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#define LOADPARM_EMPTY " "
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@ -42,6 +43,11 @@ void write_subsystem_identification(void)
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*zeroes = 0;
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}
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void write_iplb_location(void)
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{
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lowcore->ptr_iplb = ptr2u32(&iplb);
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}
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void panic(const char *string)
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{
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sclp_print(string);
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@ -40,6 +40,7 @@
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#define DEFAULT_TFTP_RETRIES 20
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extern char _start[];
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void write_iplb_location(void) {}
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#define KERNEL_ADDR ((void *)0L)
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#define KERNEL_MAX_SIZE ((long)_start)
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@ -36,7 +36,13 @@ typedef struct LowCore {
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/* prefix area: defined by architecture */
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PSWLegacy ipl_psw; /* 0x000 */
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uint32_t ccw1[2]; /* 0x008 */
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union {
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uint32_t ccw2[2]; /* 0x010 */
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struct {
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uint32_t reserved10;
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uint32_t ptr_iplb;
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};
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};
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uint8_t pad1[0x80 - 0x18]; /* 0x018 */
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uint32_t ext_params; /* 0x080 */
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uint16_t cpu_addr; /* 0x084 */
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@ -85,7 +91,7 @@ typedef struct LowCore {
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PSW io_new_psw; /* 0x1f0 */
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} __attribute__((packed, aligned(8192))) LowCore;
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extern LowCore const *lowcore;
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extern LowCore *lowcore;
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static inline void set_prefix(uint32_t address)
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{
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@ -57,6 +57,7 @@ void consume_io_int(void);
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/* main.c */
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void panic(const char *string);
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void write_subsystem_identification(void);
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void write_iplb_location(void);
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extern char stack[PAGE_SIZE * 8] __attribute__((__aligned__(PAGE_SIZE)));
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unsigned int get_loadparm_index(void);
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