mips cleanup (Thiemo Seufer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1934 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -561,6 +561,8 @@ int cpu_exec(CPUState *env1)
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#elif defined(TARGET_SH4)
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/* XXXXX */
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#endif
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/* Don't use the cached interupt_request value,
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do_interrupt may have updated the EXITTB flag. */
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if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
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env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
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/* ensure that no TB jump will be modified as
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@ -219,7 +219,6 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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exception = EXCP_TLBS;
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else
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exception = EXCP_TLBL;
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error_code = 0;
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break;
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case -4:
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/* TLB match but 'D' bit is cleared */
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@ -350,7 +349,6 @@ void do_interrupt (CPUState *env)
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cause = 4;
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goto set_EPC;
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case EXCP_TLBL:
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case EXCP_TLBF:
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cause = 2;
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if (env->error_code == 1 && !(env->hflags & MIPS_HFLAG_EXL))
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offset = 0x000;
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