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hw/char/pl011: refactor FIFO depth handling code 

PL011 can be in either of 2 modes depending guest config: FIFO and
single register. The last mode could be viewed as a 1-element-deep FIFO.

Current code open-codes a bunch of depth-dependent logic. Refactor FIFO
depth handling code to isolate calculating current FIFO depth.

One functional (albeit guest-invisible) side-effect of this change is
that previously we would always increment s->read_pos in UARTDR read
handler even if FIFO was disabled, now we are limiting read_pos to not
exceed FIFO depth (read_pos itself is reset to 0 if user disables FIFO).

Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230123162304.26254-2-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Evgeny Iakovlev 2023-01-23 17:23:00 +01:00 committed by Peter Maydell
parent 9d2617ac7d
commit 9d88935cb1
2 changed files with 22 additions and 13 deletions
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30
hw/char/pl011.c
View File

@ -81,6 +81,17 @@ static void pl011_update(PL011State *s)
}
}
static bool pl011_is_fifo_enabled(PL011State *s)
{
return (s->lcr & 0x10) != 0;
}
static inline unsigned pl011_get_fifo_depth(PL011State *s)
{
/* Note: FIFO depth is expected to be power-of-2 */
return pl011_is_fifo_enabled(s) ? PL011_FIFO_DEPTH : 1;
}
static uint64_t pl011_read(void *opaque, hwaddr offset,
unsigned size)
{
@ -94,8 +105,7 @@ static uint64_t pl011_read(void *opaque, hwaddr offset,
c = s->read_fifo[s->read_pos];
if (s->read_count > 0) {
s->read_count--;
if (++s->read_pos == 16)
s->read_pos = 0;
s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1);
}
if (s->read_count == 0) {
s->flags |= PL011_FLAG_RXFE;
@ -273,11 +283,7 @@ static int pl011_can_receive(void *opaque)
PL011State *s = (PL011State *)opaque;
int r;
if (s->lcr & 0x10) {
r = s->read_count < 16;
} else {
r = s->read_count < 1;
}
r = s->read_count < pl011_get_fifo_depth(s);
trace_pl011_can_receive(s->lcr, s->read_count, r);
return r;
}
@ -286,15 +292,15 @@ static void pl011_put_fifo(void *opaque, uint32_t value)
{
PL011State *s = (PL011State *)opaque;
int slot;
unsigned pipe_depth;
slot = s->read_pos + s->read_count;
if (slot >= 16)
slot -= 16;
pipe_depth = pl011_get_fifo_depth(s);
slot = (s->read_pos + s->read_count) & (pipe_depth - 1);
s->read_fifo[slot] = value;
s->read_count++;
s->flags &= ~PL011_FLAG_RXFE;
trace_pl011_put_fifo(value, s->read_count);
if (!(s->lcr & 0x10) || s->read_count == 16) {
if (s->read_count == pipe_depth) {
trace_pl011_put_fifo_full();
s->flags |= PL011_FLAG_RXFF;
}
@ -359,7 +365,7 @@ static const VMStateDescription vmstate_pl011 = {
VMSTATE_UINT32(dmacr, PL011State),
VMSTATE_UINT32(int_enabled, PL011State),
VMSTATE_UINT32(int_level, PL011State),
VMSTATE_UINT32_ARRAY(read_fifo, PL011State, 16),
VMSTATE_UINT32_ARRAY(read_fifo, PL011State, PL011_FIFO_DEPTH),
VMSTATE_UINT32(ilpr, PL011State),
VMSTATE_UINT32(ibrd, PL011State),
VMSTATE_UINT32(fbrd, PL011State),

5
include/hw/char/pl011.h
View File

@ -27,6 +27,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
/* This shares the same struct (and cast macro) as the base pl011 device */
#define TYPE_PL011_LUMINARY "pl011_luminary"
/* Depth of UART FIFO in bytes, when FIFO mode is enabled (else depth == 1) */
#define PL011_FIFO_DEPTH 16
struct PL011State {
SysBusDevice parent_obj;
@ -39,7 +42,7 @@ struct PL011State {
uint32_t dmacr;
uint32_t int_enabled;
uint32_t int_level;
uint32_t read_fifo[16];
uint32_t read_fifo[PL011_FIFO_DEPTH];
uint32_t ilpr;
uint32_t ibrd;
uint32_t fbrd;