tcg/tci: Merge mov, not and neg operations

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-01-29 12:29:22 -10:00
parent fe2b13bb7c
commit 9e9acb7b34

View File

@ -387,7 +387,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
tci_write_reg(regs, t0, tci_compare64(t1, t2, condition)); tci_write_reg(regs, t0, tci_compare64(t1, t2, condition));
break; break;
#endif #endif
case INDEX_op_mov_i32: CASE_32_64(mov)
t0 = *tb_ptr++; t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, t1); tci_write_reg(regs, t0, t1);
@ -649,26 +649,21 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
tci_write_reg(regs, t0, bswap32(t1)); tci_write_reg(regs, t0, bswap32(t1));
break; break;
#endif #endif
#if TCG_TARGET_HAS_not_i32 #if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64
case INDEX_op_not_i32: CASE_32_64(not)
t0 = *tb_ptr++; t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, ~t1); tci_write_reg(regs, t0, ~t1);
break; break;
#endif #endif
#if TCG_TARGET_HAS_neg_i32 #if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64
case INDEX_op_neg_i32: CASE_32_64(neg)
t0 = *tb_ptr++; t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr); t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, -t1); tci_write_reg(regs, t0, -t1);
break; break;
#endif #endif
#if TCG_TARGET_REG_BITS == 64 #if TCG_TARGET_REG_BITS == 64
case INDEX_op_mov_i64:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, t1);
break;
case INDEX_op_tci_movi_i64: case INDEX_op_tci_movi_i64:
t0 = *tb_ptr++; t0 = *tb_ptr++;
t1 = tci_read_i64(&tb_ptr); t1 = tci_read_i64(&tb_ptr);
@ -802,20 +797,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
tci_write_reg(regs, t0, bswap64(t1)); tci_write_reg(regs, t0, bswap64(t1));
break; break;
#endif #endif
#if TCG_TARGET_HAS_not_i64
case INDEX_op_not_i64:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, ~t1);
break;
#endif
#if TCG_TARGET_HAS_neg_i64
case INDEX_op_neg_i64:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, -t1);
break;
#endif
#endif /* TCG_TARGET_REG_BITS == 64 */ #endif /* TCG_TARGET_REG_BITS == 64 */
/* QEMU specific operations. */ /* QEMU specific operations. */