Merge remote-tracking branch 'qemu-kvm-tmp/uq/master' into staging
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commit
9f047b8948
@ -283,6 +283,7 @@
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#define MSR_IA32_APICBASE_BSP (1<<8)
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#define MSR_IA32_APICBASE_ENABLE (1<<11)
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#define MSR_IA32_APICBASE_BASE (0xfffff<<12)
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#define MSR_IA32_TSCDEADLINE 0x6e0
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#define MSR_MTRRcap 0xfe
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#define MSR_MTRRcap_VCNT 8
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@ -687,6 +688,7 @@ typedef struct CPUX86State {
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uint64_t async_pf_en_msr;
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uint64_t tsc;
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uint64_t tsc_deadline;
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uint64_t mcg_status;
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@ -947,7 +949,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
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#define cpu_list_id x86_cpu_list
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#define cpudef_setup x86_cpudef_setup
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#define CPU_SAVE_VERSION 12
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#define CPU_SAVE_VERSION 13
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/* MMU modes definitions */
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#define MMU_MODE0_SUFFIX _kernel
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@ -59,6 +59,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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static bool has_msr_star;
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static bool has_msr_hsave_pa;
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static bool has_msr_tsc_deadline;
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static bool has_msr_async_pf_en;
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static int lm_capable_kernel;
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@ -568,6 +569,10 @@ static int kvm_get_supported_msrs(KVMState *s)
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has_msr_hsave_pa = true;
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continue;
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}
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if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
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has_msr_tsc_deadline = true;
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continue;
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}
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}
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}
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@ -881,6 +886,9 @@ static int kvm_put_msrs(CPUState *env, int level)
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if (has_msr_hsave_pa) {
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kvm_msr_entry_set(&msrs[n++], MSR_VM_HSAVE_PA, env->vm_hsave);
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}
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if (has_msr_tsc_deadline) {
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kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
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}
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#ifdef TARGET_X86_64
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if (lm_capable_kernel) {
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kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
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@ -1127,6 +1135,9 @@ static int kvm_get_msrs(CPUState *env)
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if (has_msr_hsave_pa) {
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msrs[n++].index = MSR_VM_HSAVE_PA;
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}
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if (has_msr_tsc_deadline) {
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msrs[n++].index = MSR_IA32_TSCDEADLINE;
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}
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if (!env->tsc_valid) {
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msrs[n++].index = MSR_IA32_TSC;
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@ -1195,6 +1206,9 @@ static int kvm_get_msrs(CPUState *env)
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case MSR_IA32_TSC:
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env->tsc = msrs[i].data;
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break;
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case MSR_IA32_TSCDEADLINE:
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env->tsc_deadline = msrs[i].data;
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break;
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case MSR_VM_HSAVE_PA:
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env->vm_hsave = msrs[i].data;
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break;
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@ -410,6 +410,7 @@ static const VMStateDescription vmstate_cpu = {
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VMSTATE_UINT64_V(xcr0, CPUState, 12),
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VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
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VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
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VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
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VMSTATE_END_OF_LIST()
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/* The above list is not sorted /wrt version numbers, watch out! */
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},
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