Spelling fixes, thanks to Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2232 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -398,7 +398,7 @@ int cpu_exec(CPUState *env1)
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break;
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} else if (env->user_mode_only) {
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/* if user mode only, we simulate a fake exception
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which will be hanlded outside the cpu execution
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which will be handled outside the cpu execution
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loop */
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#if defined(TARGET_I386)
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do_interrupt_user(env->exception_index,
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@ -312,7 +312,7 @@ static void ne2000_receive(void *opaque, const uint8_t *buf, int size)
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}
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s->curpag = next >> 8;
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/* now we can signal we have receive something */
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/* now we can signal we have received something */
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s->isr |= ENISR_RX;
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ne2000_update_irq(s);
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}
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@ -615,7 +615,7 @@ static void smc91c111_receive(void *opaque, const uint8_t *buf, int size)
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if ((s->rcr & RCR_RXEN) == 0 || (s->rcr & RCR_SOFT_RST))
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return;
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/* Short packets are padded with zeros. Recieveing a packet
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/* Short packets are padded with zeros. Receiving a packet
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< 64 bytes long is considered an error condition. */
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if (size < 64)
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packetsize = 64;
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@ -183,7 +183,7 @@ PCIBus *pci_pmac_init(void *pic)
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d->config[0x0E] = 0x00; // header_type
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d->config[0x34] = 0x00; // capabilities_pointer
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#if 0 // XXX: not activated as PPC BIOS doesn't handle mutiple buses properly
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#if 0 // XXX: not activated as PPC BIOS doesn't handle multiple buses properly
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/* pci-to-pci bridge */
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d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 13 << 3,
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NULL, NULL);
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@ -113,7 +113,7 @@ GDB remote target support has been implemented and lightly tested.
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Files
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-----
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File names are harcoded at this time. The bootloader must be stored in
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File names are hardcoded at this time. The bootloader must be stored in
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shix_bios.bin in the current directory. The initial Linux image must
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be stored in shix_linux_nand.bin in the current directory in NAND
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format. Test files can be obtained from
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