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Fix disabling interrupts in sun4u

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clear interrupt request if the interrupt priority < CPU pil
clear hardware interrupt request if interrupts are disabled

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
[blauwirbel@gmail.com: added a comment about magic 2]
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Artyom Tarasenko 2011-07-25 19:22:38 +02:00 committed by Blue Swirl
parent 010f3f5fbd
commit 9f94778c16
1 changed files with 6 additions and 2 deletions
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8
hw/sun4u.c
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@ -261,7 +261,9 @@ void cpu_check_irqs(CPUState *env)
pil |= 1 << 14; pil |= 1 << 14;
} }
if (!pil) { /* The bit corresponding to psrpil is (1<< psrpil), the next bit
is (2 << psrpil). */
if (pil < (2 << env->psrpil)){
if (env->interrupt_request & CPU_INTERRUPT_HARD) { if (env->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n", CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n",
env->interrupt_index); env->interrupt_index);
@ -293,10 +295,12 @@ void cpu_check_irqs(CPUState *env)
break; break;
} }
} }
} else { } else if (env->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x " CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x "
"current interrupt %x\n", "current interrupt %x\n",
pil, env->pil_in, env->softint, env->interrupt_index); pil, env->pil_in, env->softint, env->interrupt_index);
env->interrupt_index = 0;
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
} }
} }