tcg/ppc: Clobber r5 for 64-bit qemu_ld
This accounts for the additional addr_reg2 register. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -244,6 +244,9 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
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tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4);
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#if TARGET_LONG_BITS == 64
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R5);
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#endif
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break;
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break;
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case 'K': /* qemu_st[8..32] constraint */
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case 'K': /* qemu_st[8..32] constraint */
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ct->ct |= TCG_CT_REG;
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ct->ct |= TCG_CT_REG;
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