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misc fixes and cleanups

Browse Source 
A bunch of fixes all over the place, some of the
 bugs fixed are actually regressions.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

misc fixes and cleanups

A bunch of fixes all over the place, some of the
bugs fixed are actually regressions.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Wed Mar 11 17:48:30 2015 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (25 commits)
  virtio-scsi: remove empty wrapper for cmd
  virtio-scsi: clean out duplicate cdb field
  virtio-scsi: fix cdb/sense size
  uapi/virtio_scsi: allow overriding CDB/SENSE size
  virtio-scsi: drop duplicate CDB/SENSE SIZE
  exec: don't include hw/boards for linux-user
  acpi: specify format for build_append_namestring
  MAINTAINERS: drop aliguori@amazon.com
  tpm: Move memory subregion function into realize function
  virtio-pci: Convert to realize()
  pci: Convert pci_nic_init() to Error to avoid qdev_init()
  machine: query mem-merge machine property
  machine: query dump-guest-core machine property
  hw/boards: make it safe to include for linux-user
  machine: query phandle-start machine property
  machine: query kvm-shadow-mem machine property
  kvm: add machine state to kvm_arch_init
  machine: query kernel-irqchip property
  machine: allowed/required kernel-irqchip support
  machine: replace qemu opts with iommu property
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2015-03-12 09:13:06 +00:00
commit a195fdd028
28 changed files with 170 additions and 147 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
MAINTAINERS
View File

@ -50,14 +50,12 @@ Descriptions of section entries:
General Project Administration
------------------------------
M: Anthony Liguori <aliguori@amazon.com>
M: Peter Maydell <peter.maydell@linaro.org>
Responsible Disclosure, Reporting Security Issues
------------------------------
W: http://wiki.qemu.org/SecurityProcess
M: Michael S. Tsirkin <mst@redhat.com>
M: Anthony Liguori <aliguori@amazon.com>
L: secalert@redhat.com
Guest CPU cores (TCG):
@ -568,7 +566,6 @@ F: hw/unicore32/
X86 Machines
------------
PC
M: Anthony Liguori <aliguori@amazon.com>
M: Michael S. Tsirkin <mst@redhat.com>
S: Supported
F: include/hw/i386/
@ -693,7 +690,6 @@ S: Supported
F: hw/*/*vhost*
virtio
M: Anthony Liguori <aliguori@amazon.com>
M: Michael S. Tsirkin <mst@redhat.com>
S: Supported
F: hw/*/virtio*
@ -800,7 +796,6 @@ F: block/mirror.c
T: git git://github.com/codyprime/qemu-kvm-jtc.git block
Character Devices
M: Anthony Liguori <aliguori@amazon.com>
M: Paolo Bonzini <pbonzini@redhat.com>
S: Maintained
F: qemu-char.c
@ -861,7 +856,6 @@ F: audio/spiceaudio.c
F: hw/display/qxl*
Graphics
M: Anthony Liguori <aliguori@amazon.com>
M: Gerd Hoffmann <kraxel@redhat.com>
S: Odd Fixes
F: ui/
@ -873,7 +867,6 @@ S: Odd Fixes
F: ui/cocoa.m
Main loop
M: Anthony Liguori <aliguori@amazon.com>
M: Paolo Bonzini <pbonzini@redhat.com>
S: Maintained
F: cpus.c
@ -890,7 +883,6 @@ F: hmp-commands.hx
T: git git://repo.or.cz/qemu/qmp-unstable.git queue/qmp
Network device layer
M: Anthony Liguori <aliguori@amazon.com>
M: Stefan Hajnoczi <stefanha@redhat.com>
M: Jason Wang <jasowang@redhat.com>
S: Maintained
@ -942,7 +934,6 @@ F: qga/
T: git git://github.com/mdroth/qemu.git qga
QOM
M: Anthony Liguori <aliguori@amazon.com>
M: Andreas Färber <afaerber@suse.de>
S: Supported
T: git git://github.com/afaerber/qemu-cpu.git qom-next

5
device_tree.c
View File

@ -24,7 +24,7 @@
#include "sysemu/device_tree.h"
#include "sysemu/sysemu.h"
#include "hw/loader.h"
#include "qemu/option.h"
#include "hw/boards.h"
#include "qemu/config-file.h"
#include <libfdt.h>
@ -245,8 +245,7 @@ uint32_t qemu_fdt_alloc_phandle(void *fdt)
* which phandle id to start allocting phandles.
*/
if (!phandle) {
phandle = qemu_opt_get_number(qemu_get_machine_opts(),
"phandle_start", 0);
phandle = machine_phandle_start(current_machine);
}
if (!phandle) {

8
exec.c
View File

@ -26,6 +26,9 @@
#include "cpu.h"
#include "tcg.h"
#include "hw/hw.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/boards.h"
#endif
#include "hw/qdev.h"
#include "qemu/osdep.h"
#include "sysemu/kvm.h"
@ -1251,8 +1254,7 @@ static void qemu_ram_setup_dump(void *addr, ram_addr_t size)
int ret;
/* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
if (!qemu_opt_get_bool(qemu_get_machine_opts(),
"dump-guest-core", true)) {
if (!machine_dump_guest_core(current_machine)) {
ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP);
if (ret) {
perror("qemu_madvise");
@ -1327,7 +1329,7 @@ void qemu_ram_unset_idstr(ram_addr_t addr)
static int memory_try_enable_merging(void *addr, size_t len)
{
if (!qemu_opt_get_bool(qemu_get_machine_opts(), "mem-merge", true)) {
if (!machine_mem_merge(current_machine)) {
/* disabled by the user */
return 0;
}

22
hw/acpi/aml-build.c
View File

@ -112,7 +112,7 @@ build_append_namestringv(GArray *array, const char *format, va_list ap)
switch (seg_count) {
case 1:
if (!*s) {
build_append_byte(array, 0x0); /* NullName */
build_append_byte(array, 0x00); /* NullName */
} else {
build_append_nameseg(array, s);
}
@ -141,6 +141,7 @@ build_append_namestringv(GArray *array, const char *format, va_list ap)
g_strfreev(segs);
}
GCC_FMT_ATTR(2, 3)
static void build_append_namestring(GArray *array, const char *format, ...)
{
va_list ap;
@ -335,26 +336,29 @@ static void build_buffer(GArray *array, uint8_t op)
void aml_append(Aml *parent_ctx, Aml *child)
{
GArray *buf = build_alloc_array();
build_append_array(buf, child->buf);
switch (child->block_flags) {
case AML_OPCODE:
build_append_byte(parent_ctx->buf, child->op);
break;
case AML_EXT_PACKAGE:
build_extop_package(child->buf, child->op);
build_extop_package(buf, child->op);
break;
case AML_PACKAGE:
build_package(child->buf, child->op);
build_package(buf, child->op);
break;
case AML_RES_TEMPLATE:
build_append_byte(child->buf, 0x79); /* EndTag */
build_append_byte(buf, 0x79); /* EndTag */
/*
* checksum operations are treated as succeeded if checksum
* field is zero. [ACPI Spec 1.0b, 6.4.2.8 End Tag]
*/
build_append_byte(child->buf, 0);
build_append_byte(buf, 0);
/* fall through, to pack resources in buffer */
case AML_BUFFER:
build_buffer(child->buf, child->op);
build_buffer(buf, child->op);
break;
case AML_NO_OPCODE:
break;
@ -362,7 +366,8 @@ void aml_append(Aml *parent_ctx, Aml *child)
assert(0);
break;
}
build_append_array(parent_ctx->buf, child->buf);
build_append_array(parent_ctx->buf, buf);
build_free_array(buf);
}
/* ACPI 1.0b: 16.2.5.1 Namespace Modifier Objects Encoding: DefScope */
@ -444,7 +449,7 @@ Aml *aml_and(Aml *arg1, Aml *arg2)
Aml *var = aml_opcode(0x7B /* AndOp */);
aml_append(var, arg1);
aml_append(var, arg2);
build_append_int(var->buf, 0x00 /* NullNameOp */);
build_append_byte(var->buf, 0x00 /* NullNameOp */);
return var;
}
@ -542,7 +547,6 @@ Aml *aml_equal(Aml *arg1, Aml *arg2)
Aml *var = aml_opcode(0x93 /* LequalOp */);
aml_append(var, arg1);
aml_append(var, arg2);
build_append_int(var->buf, 0x00); /* NullNameOp */
return var;
}

52
hw/core/machine.c
View File

@ -31,18 +31,12 @@ static void machine_set_accel(Object *obj, const char *value, Error **errp)
ms->accel = g_strdup(value);
}
static bool machine_get_kernel_irqchip(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
return ms->kernel_irqchip;
}
static void machine_set_kernel_irqchip(Object *obj, bool value, Error **errp)
{
MachineState *ms = MACHINE(obj);
ms->kernel_irqchip = value;
ms->kernel_irqchip_allowed = value;
ms->kernel_irqchip_required = value;
}
static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v,
@ -289,13 +283,18 @@ static void machine_initfn(Object *obj)
{
MachineState *ms = MACHINE(obj);
ms->kernel_irqchip_allowed = true;
ms->kvm_shadow_mem = -1;
ms->dump_guest_core = true;
ms->mem_merge = true;
object_property_add_str(obj, "accel",
machine_get_accel, machine_set_accel, NULL);
object_property_set_description(obj, "accel",
"Accelerator list",
NULL);
object_property_add_bool(obj, "kernel-irqchip",
machine_get_kernel_irqchip,
NULL,
machine_set_kernel_irqchip,
NULL);
object_property_set_description(obj, "kernel-irqchip",
@ -403,6 +402,41 @@ bool machine_usb(MachineState *machine)
return machine->usb;
}
bool machine_iommu(MachineState *machine)
{
return machine->iommu;
}
bool machine_kernel_irqchip_allowed(MachineState *machine)
{
return machine->kernel_irqchip_allowed;
}
bool machine_kernel_irqchip_required(MachineState *machine)
{
return machine->kernel_irqchip_required;
}
int machine_kvm_shadow_mem(MachineState *machine)
{
return machine->kvm_shadow_mem;
}
int machine_phandle_start(MachineState *machine)
{
return machine->phandle_start;
}
bool machine_dump_guest_core(MachineState *machine)
{
return machine->dump_guest_core;
}
bool machine_mem_merge(MachineState *machine)
{
return machine->mem_merge;
}
static const TypeInfo machine_info = {
.name = TYPE_MACHINE,
.parent = TYPE_OBJECT,

2
hw/pci-host/q35.c
View File

@ -415,7 +415,7 @@ static void mch_realize(PCIDevice *d, Error **errp)
PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
}
/* Intel IOMMU (VT-d) */
if (qemu_opt_get_bool(qemu_get_machine_opts(), "iommu", false)) {
if (machine_iommu(current_machine)) {
mch_init_dmar(mch);
}
}

18
hw/pci/pci.c
View File

@ -1613,9 +1613,11 @@ static const char * const pci_nic_names[] = {
/* Initialize a PCI NIC. */
static PCIDevice *pci_nic_init(NICInfo *nd, PCIBus *rootbus,
const char *default_model,
const char *default_devaddr)
const char *default_devaddr,
Error **errp)
{
const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr;
Error *err = NULL;
PCIBus *bus;
int devfn;
PCIDevice *pci_dev;
@ -1636,8 +1638,13 @@ static PCIDevice *pci_nic_init(NICInfo *nd, PCIBus *rootbus,
pci_dev = pci_create(bus, devfn, pci_nic_names[i]);
dev = &pci_dev->qdev;
qdev_set_nic_properties(dev, nd);
if (qdev_init(dev) < 0)
object_property_set_bool(OBJECT(dev), true, "realized", &err);
if (err) {
error_propagate(errp, err);
object_unparent(OBJECT(dev));
return NULL;
}
return pci_dev;
}
@ -1645,14 +1652,17 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
const char *default_model,
const char *default_devaddr)
{
Error *err = NULL;
PCIDevice *res;
if (qemu_show_nic_models(nd->model, pci_nic_models))
exit(0);
res = pci_nic_init(nd, rootbus, default_model, default_devaddr);
if (!res)
res = pci_nic_init(nd, rootbus, default_model, default_devaddr, &err);
if (!res) {
error_report_err(err);
exit(1);
}
return res;
}

2
hw/pci/shpc.c
View File

@ -159,7 +159,7 @@ static void shpc_interrupt_update(PCIDevice *d)
for (slot = 0; slot < shpc->nslots; ++slot) {
uint8_t event = shpc->config[SHPC_SLOT_EVENT_LATCH(slot)];
uint8_t disable = shpc->config[SHPC_SLOT_EVENT_SERR_INT_DIS(d, slot)];
uint32_t mask = 1 << SHPC_IDX_TO_LOGICAL(slot);
uint32_t mask = 1U << SHPC_IDX_TO_LOGICAL(slot);
if (event & ~disable) {
int_locator |= mask;
}

15
hw/ppc/e500.c
View File

@ -734,8 +734,8 @@ static DeviceState *ppce500_init_mpic_kvm(PPCE500Params *params,
return dev;
}
static qemu_irq *ppce500_init_mpic(PPCE500Params *params, MemoryRegion *ccsr,
qemu_irq **irqs)
static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params,
MemoryRegion *ccsr, qemu_irq **irqs)
{
qemu_irq *mpic;
DeviceState *dev = NULL;
@ -745,17 +745,12 @@ static qemu_irq *ppce500_init_mpic(PPCE500Params *params, MemoryRegion *ccsr,
mpic = g_new0(qemu_irq, 256);
if (kvm_enabled()) {
QemuOpts *machine_opts = qemu_get_machine_opts();
bool irqchip_allowed = qemu_opt_get_bool(machine_opts,
"kernel_irqchip", true);
bool irqchip_required = qemu_opt_get_bool(machine_opts,
"kernel_irqchip", false);
Error *err = NULL;
if (irqchip_allowed) {
if (machine_kernel_irqchip_allowed(machine)) {
dev = ppce500_init_mpic_kvm(params, irqs, &err);
}
if (irqchip_required && !dev) {
if (machine_kernel_irqchip_required(machine) && !dev) {
error_report("kernel_irqchip requested but unavailable: %s",
error_get_pretty(err));
exit(1);
@ -879,7 +874,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
memory_region_add_subregion(address_space_mem, params->ccsrbar_base,
ccsr_addr_space);
mpic = ppce500_init_mpic(params, ccsr_addr_space, irqs);
mpic = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs);
/* Serial */
if (serial_hds[0]) {

15
hw/ppc/spapr.c
View File

@ -127,22 +127,18 @@ static XICSState *try_create_xics(const char *type, int nr_servers,
return XICS_COMMON(dev);
}
static XICSState *xics_system_init(int nr_servers, int nr_irqs)
static XICSState *xics_system_init(MachineState *machine,
int nr_servers, int nr_irqs)
{
XICSState *icp = NULL;
if (kvm_enabled()) {
QemuOpts *machine_opts = qemu_get_machine_opts();
bool irqchip_allowed = qemu_opt_get_bool(machine_opts,
"kernel_irqchip", true);
bool irqchip_required = qemu_opt_get_bool(machine_opts,
"kernel_irqchip", false);
Error *err = NULL;
if (irqchip_allowed) {
if (machine_kernel_irqchip_allowed(machine)) {
icp = try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs, &err);
}
if (irqchip_required && !icp) {
if (machine_kernel_irqchip_required(machine) && !icp) {
error_report("kernel_irqchip requested but unavailable: %s",
error_get_pretty(err));
}
@ -1455,7 +1451,8 @@ static void ppc_spapr_init(MachineState *machine)
}
/* Set up Interrupt Controller before we create the VCPUs */
spapr->icp = xics_system_init(smp_cpus * kvmppc_smt_threads() / smp_threads,
spapr->icp = xics_system_init(machine,
smp_cpus * kvmppc_smt_threads() / smp_threads,
XICS_IRQS);
/* init CPUs */

12
hw/scsi/virtio-scsi.c
View File

@ -476,7 +476,7 @@ static int virtio_scsi_parse_cdb(SCSIDevice *dev, SCSICommand *cmd,
VirtIOSCSIReq *req = hba_private;
if (cmd->len == 0) {
cmd->len = MIN(VIRTIO_SCSI_CDB_SIZE, SCSI_CMD_BUF_SIZE);
cmd->len = MIN(VIRTIO_SCSI_CDB_DEFAULT_SIZE, SCSI_CMD_BUF_SIZE);
memcpy(cmd->buf, buf, cmd->len);
}
@ -544,7 +544,7 @@ bool virtio_scsi_handle_cmd_req_prepare(VirtIOSCSI *s, VirtIOSCSIReq *req)
}
req->sreq = scsi_req_new(d, req->req.cmd.tag,
virtio_scsi_get_lun(req->req.cmd.lun),
req->req.cdb, req);
req->req.cmd.cdb, req);
if (req->sreq->cmd.mode != SCSI_XFER_NONE
&& (req->sreq->cmd.mode != req->mode ||
@ -642,8 +642,8 @@ static void virtio_scsi_reset(VirtIODevice *vdev)
qbus_reset_all(&s->bus.qbus);
s->resetting--;
vs->sense_size = VIRTIO_SCSI_SENSE_SIZE;
vs->cdb_size = VIRTIO_SCSI_CDB_SIZE;
vs->sense_size = VIRTIO_SCSI_SENSE_DEFAULT_SIZE;
vs->cdb_size = VIRTIO_SCSI_CDB_DEFAULT_SIZE;
s->events_dropped = false;
}
@ -830,8 +830,8 @@ void virtio_scsi_common_realize(DeviceState *dev, Error **errp,
return;
}
s->cmd_vqs = g_new0(VirtQueue *, s->conf.num_queues);
s->sense_size = VIRTIO_SCSI_SENSE_SIZE;
s->cdb_size = VIRTIO_SCSI_CDB_SIZE;
s->sense_size = VIRTIO_SCSI_SENSE_DEFAULT_SIZE;
s->cdb_size = VIRTIO_SCSI_CDB_DEFAULT_SIZE;
s->ctrl_vq = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE,
ctrl);

6
hw/tpm/tpm_tis.c
View File

@ -959,18 +959,18 @@ static void tpm_tis_realizefn(DeviceState *dev, Error **errp)
tis->bh = qemu_bh_new(tpm_tis_receive_bh, s);
isa_init_irq(&s->busdev, &tis->irq, tis->irq_num);
memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
TPM_TIS_ADDR_BASE, &s->mmio);
}
static void tpm_tis_initfn(Object *obj)
{
ISADevice *dev = ISA_DEVICE(obj);
TPMState *s = TPM(obj);
memory_region_init_io(&s->mmio, OBJECT(s), &tpm_tis_memory_ops,
s, "tpm-tis-mmio",
TPM_TIS_NUM_LOCALITIES << TPM_TIS_LOCALITY_SHIFT);
memory_region_add_subregion(isa_address_space(dev), TPM_TIS_ADDR_BASE,
&s->mmio);
}
static void tpm_tis_class_init(ObjectClass *klass, void *data)

88
hw/virtio/virtio-pci.c
View File

@ -856,16 +856,13 @@ static void virtio_pci_vmstate_change(DeviceState *d, bool running)
}
#ifdef CONFIG_VIRTFS
static int virtio_9p_init_pci(VirtIOPCIProxy *vpci_dev)
static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static Property virtio_9p_pci_properties[] = {
@ -881,7 +878,7 @@ static void virtio_9p_pci_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
k->init = virtio_9p_init_pci;
k->realize = virtio_9p_pci_realize;
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P;
pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
@ -965,15 +962,15 @@ static void virtio_pci_device_unplugged(DeviceState *d)
virtio_pci_stop_ioeventfd(proxy);
}
static int virtio_pci_init(PCIDevice *pci_dev)
static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
{
VirtIOPCIProxy *dev = VIRTIO_PCI(pci_dev);
VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
virtio_pci_bus_new(&dev->bus, sizeof(dev->bus), dev);
if (k->init != NULL) {
return k->init(dev);
if (k->realize) {
k->realize(dev, errp);
}
return 0;
}
static void virtio_pci_exit(PCIDevice *pci_dev)
@ -1003,7 +1000,7 @@ static void virtio_pci_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
dc->props = virtio_pci_properties;
k->init = virtio_pci_init;
k->realize = virtio_pci_realize;
k->exit = virtio_pci_exit;
k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
k->revision = VIRTIO_PCI_ABI_VERSION;
@ -1030,15 +1027,13 @@ static Property virtio_blk_pci_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static int virtio_blk_pci_init(VirtIOPCIProxy *vpci_dev)
static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
@ -1049,7 +1044,7 @@ static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->props = virtio_blk_pci_properties;
k->init = virtio_blk_pci_init;
k->realize = virtio_blk_pci_realize;
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
@ -1087,7 +1082,7 @@ static Property virtio_scsi_pci_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static int virtio_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev)
static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
@ -1110,10 +1105,7 @@ static int virtio_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev)
}
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
@ -1121,7 +1113,8 @@ static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
k->init = virtio_scsi_pci_init_pci;
k->realize = virtio_scsi_pci_realize;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->props = virtio_scsi_pci_properties;
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
@ -1157,7 +1150,7 @@ static Property vhost_scsi_pci_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static int vhost_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev)
static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
@ -1168,10 +1161,7 @@ static int vhost_scsi_pci_init_pci(VirtIOPCIProxy *vpci_dev)
}
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data)
@ -1179,7 +1169,7 @@ static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
k->init = vhost_scsi_pci_init_pci;
k->realize = vhost_scsi_pci_realize;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->props = vhost_scsi_pci_properties;
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
@ -1240,7 +1230,7 @@ static Property virtio_balloon_pci_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static int virtio_balloon_pci_init(VirtIOPCIProxy *vpci_dev)
static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
@ -1251,10 +1241,7 @@ static int virtio_balloon_pci_init(VirtIOPCIProxy *vpci_dev)
}
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data)
@ -1262,7 +1249,7 @@ static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
k->init = virtio_balloon_pci_init;
k->realize = virtio_balloon_pci_realize;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->props = virtio_balloon_pci_properties;
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
@ -1296,7 +1283,7 @@ static const TypeInfo virtio_balloon_pci_info = {
/* virtio-serial-pci */
static int virtio_serial_pci_init(VirtIOPCIProxy *vpci_dev)
static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
@ -1326,10 +1313,7 @@ static int virtio_serial_pci_init(VirtIOPCIProxy *vpci_dev)
}
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static Property virtio_serial_pci_properties[] = {
@ -1345,7 +1329,7 @@ static void virtio_serial_pci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
k->init = virtio_serial_pci_init;
k->realize = virtio_serial_pci_realize;
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->props = virtio_serial_pci_properties;
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
@ -1380,7 +1364,7 @@ static Property virtio_net_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static int virtio_net_pci_init(VirtIOPCIProxy *vpci_dev)
static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
DeviceState *qdev = DEVICE(vpci_dev);
VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev);
@ -1390,10 +1374,7 @@ static int virtio_net_pci_init(VirtIOPCIProxy *vpci_dev)
virtio_net_set_netclient_name(&dev->vdev, qdev->id,
object_get_typename(OBJECT(qdev)));
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
}
return 0;
object_property_set_bool(OBJECT(vdev), true, "realized", errp);
}
static void virtio_net_pci_class_init(ObjectClass *klass, void *data)
@ -1409,7 +1390,7 @@ static void virtio_net_pci_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->props = virtio_net_properties;
vpciklass->init = virtio_net_pci_init;
vpciklass->realize = virtio_net_pci_realize;
}
static void virtio_net_pci_instance_init(Object *obj)
@ -1436,21 +1417,22 @@ static Property virtio_rng_pci_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static int virtio_rng_pci_init(VirtIOPCIProxy *vpci_dev)
static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&vrng->vdev);
Error *err = NULL;
qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus));
if (qdev_init(vdev) < 0) {
return -1;
object_property_set_bool(OBJECT(vdev), true, "realized", &err);
if (err) {
error_propagate(errp, err);
return;
}
object_property_set_link(OBJECT(vrng),
OBJECT(vrng->vdev.conf.rng), "rng",
NULL);
return 0;
}
static void virtio_rng_pci_class_init(ObjectClass *klass, void *data)
@ -1459,7 +1441,7 @@ static void virtio_rng_pci_class_init(ObjectClass *klass, void *data)
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
k->init = virtio_rng_pci_init;
k->realize = virtio_rng_pci_realize;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->props = virtio_rng_pci_properties;

2
hw/virtio/virtio-pci.h
View File

@ -82,7 +82,7 @@ typedef struct {
typedef struct VirtioPCIClass {
PCIDeviceClass parent_class;
int (*init)(VirtIOPCIProxy *vpci_dev);
void (*realize)(VirtIOPCIProxy *vpci_dev, Error **errp);
} VirtioPCIClass;
struct VirtIOPCIProxy {

10
include/hw/boards.h
View File

@ -66,6 +66,13 @@ MachineClass *find_default_machine(void);
extern MachineState *current_machine;
bool machine_usb(MachineState *machine);
bool machine_iommu(MachineState *machine);
bool machine_kernel_irqchip_allowed(MachineState *machine);
bool machine_kernel_irqchip_required(MachineState *machine);
int machine_kvm_shadow_mem(MachineState *machine);
int machine_phandle_start(MachineState *machine);
bool machine_dump_guest_core(MachineState *machine);
bool machine_mem_merge(MachineState *machine);
/**
* MachineClass:
@ -124,7 +131,8 @@ struct MachineState {
/*< public >*/
char *accel;
bool kernel_irqchip;
bool kernel_irqchip_allowed;
bool kernel_irqchip_required;
int kvm_shadow_mem;
char *dtb;
char *dumpdtb;

16
include/hw/virtio/virtio-scsi.h
View File

@ -14,6 +14,9 @@
#ifndef _QEMU_VIRTIO_SCSI_H
#define _QEMU_VIRTIO_SCSI_H
/* Override CDB/sense data size: they are dynamic (guest controlled) in QEMU */
#define VIRTIO_SCSI_CDB_SIZE 0
#define VIRTIO_SCSI_SENSE_SIZE 0
#include "standard-headers/linux/virtio_scsi.h"
#include "hw/virtio/virtio.h"
#include "hw/pci/pci.h"
@ -30,8 +33,6 @@
OBJECT_CHECK(VirtIOSCSI, (obj), TYPE_VIRTIO_SCSI)
#define VIRTIO_SCSI_VQ_SIZE 128
#define VIRTIO_SCSI_CDB_SIZE 32
#define VIRTIO_SCSI_SENSE_SIZE 96
#define VIRTIO_SCSI_MAX_CHANNEL 0
#define VIRTIO_SCSI_MAX_TARGET 255
#define VIRTIO_SCSI_MAX_LUN 16383
@ -108,8 +109,7 @@ typedef struct VirtIOSCSIReq {
/* Note:
* - fields before elem are initialized by virtio_scsi_init_req;
* - elem is uninitialized at the time of allocation.
* - fields after elem (except the ending cdb[]) are zeroed by
* virtio_scsi_init_req.
* - fields after elem are zeroed by virtio_scsi_init_req.
* */
VirtQueueElement elem;
@ -134,18 +134,12 @@ typedef struct VirtIOSCSIReq {
VirtIOSCSIEvent event;
} resp;
union {
struct {
VirtIOSCSICmdReq cmd;
uint8_t cdb[];
} QEMU_PACKED;
VirtIOSCSICmdReq cmd;
VirtIOSCSICtrlTMFReq tmf;
VirtIOSCSICtrlANReq an;
} req;
} VirtIOSCSIReq;
QEMU_BUILD_BUG_ON(offsetof(VirtIOSCSIReq, req.cdb) !=
offsetof(VirtIOSCSIReq, req.cmd) + sizeof(VirtIOSCSICmdReq));
#define DEFINE_VIRTIO_SCSI_PROPERTIES(_state, _conf_field) \
DEFINE_PROP_UINT32("num_queues", _state, _conf_field.num_queues, 1), \
DEFINE_PROP_UINT32("max_sectors", _state, _conf_field.max_sectors, 0xFFFF),\

12
include/standard-headers/linux/virtio_scsi.h
View File

@ -29,8 +29,16 @@
#include "standard-headers/linux/virtio_types.h"
#define VIRTIO_SCSI_CDB_SIZE 32
#define VIRTIO_SCSI_SENSE_SIZE 96
/* Default values of the CDB and sense data size configuration fields */
#define VIRTIO_SCSI_CDB_DEFAULT_SIZE 32
#define VIRTIO_SCSI_SENSE_DEFAULT_SIZE 96
#ifndef VIRTIO_SCSI_CDB_SIZE
#define VIRTIO_SCSI_CDB_SIZE VIRTIO_SCSI_CDB_DEFAULT_SIZE
#endif
#ifndef VIRTIO_SCSI_SENSE_SIZE
#define VIRTIO_SCSI_SENSE_SIZE VIRTIO_SCSI_SENSE_DEFAULT_SIZE
#endif
/* SCSI command request, followed by data-out */
struct virtio_scsi_cmd_req {

2
include/sysemu/kvm.h
View File

@ -259,7 +259,7 @@ int kvm_arch_get_registers(CPUState *cpu);
int kvm_arch_put_registers(CPUState *cpu, int level);
int kvm_arch_init(KVMState *s);
int kvm_arch_init(MachineState *ms, KVMState *s);
int kvm_arch_init_vcpu(CPUState *cpu);

8
kvm-all.c
View File

@ -1360,11 +1360,11 @@ int kvm_irqchip_remove_irqfd_notifier(KVMState *s, EventNotifier *n, int virq)
false);
}
static int kvm_irqchip_create(KVMState *s)
static int kvm_irqchip_create(MachineState *machine, KVMState *s)
{
int ret;
if (!qemu_opt_get_bool(qemu_get_machine_opts(), "kernel_irqchip", true) ||
if (!machine_kernel_irqchip_allowed(machine) ||
(!kvm_check_extension(s, KVM_CAP_IRQCHIP) &&
(kvm_vm_enable_cap(s, KVM_CAP_S390_IRQCHIP, 0) < 0))) {
return 0;
@ -1598,12 +1598,12 @@ static int kvm_init(MachineState *ms)
kvm_resamplefds_allowed =
(kvm_check_extension(s, KVM_CAP_IRQFD_RESAMPLE) > 0);
ret = kvm_arch_init(s);
ret = kvm_arch_init(ms, s);
if (ret < 0) {
goto err;
}
ret = kvm_irqchip_create(s);
ret = kvm_irqchip_create(ms, s);
if (ret < 0) {
goto err;
}

2
target-arm/kvm.c
View File

@ -150,7 +150,7 @@ static const TypeInfo host_arm_cpu_type_info = {
.class_size = sizeof(ARMHostCPUClass),
};
int kvm_arch_init(KVMState *s)
int kvm_arch_init(MachineState *ms, KVMState *s)
{
/* For ARM interrupt delivery is always asynchronous,
* whether we are using an in-kernel VGIC or not.

5
target-i386/kvm.c
View File

@ -840,7 +840,7 @@ static int kvm_get_supported_msrs(KVMState *s)
return ret;
}
int kvm_arch_init(KVMState *s)
int kvm_arch_init(MachineState *ms, KVMState *s)
{
uint64_t identity_base = 0xfffbc000;
uint64_t shadow_mem;
@ -890,8 +890,7 @@ int kvm_arch_init(KVMState *s)
}
qemu_register_reset(kvm_unpoison_all, NULL);
shadow_mem = qemu_opt_get_size(qemu_get_machine_opts(),
"kvm_shadow_mem", -1);
shadow_mem = machine_kvm_shadow_mem(ms);
if (shadow_mem != -1) {
shadow_mem /= 4096;
ret = kvm_vm_ioctl(s, KVM_SET_NR_MMU_PAGES, shadow_mem);

2
target-mips/kvm.c
View File

@ -40,7 +40,7 @@ unsigned long kvm_arch_vcpu_id(CPUState *cs)
return cs->cpu_index;
}
int kvm_arch_init(KVMState *s)
int kvm_arch_init(MachineState *ms, KVMState *s)
{
/* MIPS has 128 signals */
kvm_set_sigmask_len(s, 16);

2
target-ppc/kvm.c
View File

@ -95,7 +95,7 @@ static void kvm_kick_cpu(void *opaque)
static int kvm_ppc_register_host_cpu_type(void);
int kvm_arch_init(KVMState *s)
int kvm_arch_init(MachineState *ms, KVMState *s)
{
cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ);
cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL);

2
target-s390x/kvm.c
View File

@ -219,7 +219,7 @@ static void kvm_s390_enable_cmma(KVMState *s)
trace_kvm_enable_cmma(rc);
}
int kvm_arch_init(KVMState *s)
int kvm_arch_init(MachineState *ms, KVMState *s)
{
cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS);
cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF);

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tests/acpi-test-data/pc/SSDT
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tests/acpi-test-data/pc/SSDT.bridge
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tests/acpi-test-data/q35/SSDT
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tests/acpi-test-data/q35/SSDT.bridge
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