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target/mips: Fix emulation of nanoMIPS MTHLIP instruction 

The field ac in nanoMIPS instruction MTHLIP rs, ac is specified in
nanoMIPS documentation as opcode[15..14] (2 bits). However, in the
current QEMU code, the corresponding argument passed to the helper
gen_helper_mthlip() has the value of opcode[15..11] (5 bits). Right
shift the value of this argument by three bits to fix this.

Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-2-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Stefan Pejic 2022-05-04 13:03:57 +02:00 committed by Philippe Mathieu-Daudé
parent 1d29f899e7
commit a1b092537a
1 changed files with 1 additions and 1 deletions
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2
target/mips/tcg/nanomips_translate.c.inc
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@ -1597,7 +1597,7 @@ static void gen_pool32axf_1_nanomips_insn(DisasContext *ctx, uint32_t opc,
check_dsp(ctx);
switch (extract32(ctx->opcode, 12, 2)) {
case NM_MTHLIP:
tcg_gen_movi_tl(t0, v2);
tcg_gen_movi_tl(t0, v2 >> 3);
gen_helper_mthlip(t0, v0_t, cpu_env);
break;
case NM_SHILOV: