spapr: move the interrupt presenters under machine_data
Next step is to remove them from under the PowerPCCPU Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -16,6 +16,7 @@
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#include "monitor/monitor.h"
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#include "monitor/monitor.h"
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#include "hw/ppc/fdt.h"
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#include "hw/ppc/fdt.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "hw/ppc/spapr_xive.h"
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#include "hw/ppc/spapr_xive.h"
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#include "hw/ppc/xive.h"
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#include "hw/ppc/xive.h"
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#include "hw/ppc/xive_regs.h"
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#include "hw/ppc/xive_regs.h"
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@ -394,7 +395,7 @@ static XiveTCTX *spapr_xive_get_tctx(XiveRouter *xrtr, CPUState *cs)
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{
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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return cpu->tctx;
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return spapr_cpu_state(cpu)->tctx;
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}
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}
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static const VMStateDescription vmstate_spapr_xive_end = {
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static const VMStateDescription vmstate_spapr_xive_end = {
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@ -31,6 +31,7 @@
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#include "trace.h"
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#include "trace.h"
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#include "qemu/timer.h"
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#include "qemu/timer.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "hw/ppc/xics.h"
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#include "hw/ppc/xics.h"
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#include "hw/ppc/xics_spapr.h"
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#include "hw/ppc/xics_spapr.h"
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#include "hw/ppc/fdt.h"
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#include "hw/ppc/fdt.h"
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@ -45,7 +46,7 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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{
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{
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target_ulong cppr = args[0];
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target_ulong cppr = args[0];
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icp_set_cppr(cpu->icp, cppr);
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icp_set_cppr(spapr_cpu_state(cpu)->icp, cppr);
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return H_SUCCESS;
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return H_SUCCESS;
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}
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}
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@ -66,7 +67,7 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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target_ulong opcode, target_ulong *args)
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target_ulong opcode, target_ulong *args)
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{
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{
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uint32_t xirr = icp_accept(cpu->icp);
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uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp);
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args[0] = xirr;
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args[0] = xirr;
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return H_SUCCESS;
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return H_SUCCESS;
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@ -75,7 +76,7 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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target_ulong opcode, target_ulong *args)
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target_ulong opcode, target_ulong *args)
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{
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{
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uint32_t xirr = icp_accept(cpu->icp);
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uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp);
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args[0] = xirr;
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args[0] = xirr;
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args[1] = cpu_get_host_ticks();
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args[1] = cpu_get_host_ticks();
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@ -87,7 +88,7 @@ static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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{
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{
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target_ulong xirr = args[0];
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target_ulong xirr = args[0];
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icp_eoi(cpu->icp, xirr);
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icp_eoi(spapr_cpu_state(cpu)->icp, xirr);
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return H_SUCCESS;
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return H_SUCCESS;
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}
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}
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@ -95,7 +96,7 @@ static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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target_ulong opcode, target_ulong *args)
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target_ulong opcode, target_ulong *args)
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{
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{
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uint32_t mfrr;
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uint32_t mfrr;
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uint32_t xirr = icp_ipoll(cpu->icp, &mfrr);
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uint32_t xirr = icp_ipoll(spapr_cpu_state(cpu)->icp, &mfrr);
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args[0] = xirr;
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args[0] = xirr;
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args[1] = mfrr;
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args[1] = mfrr;
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@ -3902,7 +3902,7 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int vcpu_id)
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{
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{
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PowerPCCPU *cpu = spapr_find_cpu(vcpu_id);
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PowerPCCPU *cpu = spapr_find_cpu(vcpu_id);
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return cpu ? cpu->icp : NULL;
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return cpu ? spapr_cpu_state(cpu)->icp : NULL;
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}
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}
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static void spapr_pic_print_info(InterruptStatsProvider *obj,
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static void spapr_pic_print_info(InterruptStatsProvider *obj,
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@ -194,11 +194,11 @@ static void spapr_unrealize_vcpu(PowerPCCPU *cpu, sPAPRCPUCore *sc)
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vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_data);
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vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_data);
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}
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}
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qemu_unregister_reset(spapr_cpu_reset, cpu);
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qemu_unregister_reset(spapr_cpu_reset, cpu);
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if (cpu->icp) {
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if (spapr_cpu_state(cpu)->icp) {
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object_unparent(OBJECT(cpu->icp));
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object_unparent(OBJECT(spapr_cpu_state(cpu)->icp));
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}
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}
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if (cpu->tctx) {
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if (spapr_cpu_state(cpu)->tctx) {
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object_unparent(OBJECT(cpu->tctx));
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object_unparent(OBJECT(spapr_cpu_state(cpu)->tctx));
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}
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}
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cpu_remove_sync(CPU(cpu));
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cpu_remove_sync(CPU(cpu));
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object_unparent(OBJECT(cpu));
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object_unparent(OBJECT(cpu));
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@ -12,6 +12,7 @@
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#include "qemu/error-report.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "hw/ppc/spapr_xive.h"
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#include "hw/ppc/spapr_xive.h"
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#include "hw/ppc/xics.h"
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#include "hw/ppc/xics.h"
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#include "hw/ppc/xics_spapr.h"
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#include "hw/ppc/xics_spapr.h"
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@ -185,7 +186,7 @@ static void spapr_irq_print_info_xics(sPAPRMachineState *spapr, Monitor *mon)
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CPU_FOREACH(cs) {
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CPU_FOREACH(cs) {
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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icp_pic_print_info(cpu->icp, mon);
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icp_pic_print_info(spapr_cpu_state(cpu)->icp, mon);
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}
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}
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ics_pic_print_info(spapr->ics, mon);
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ics_pic_print_info(spapr->ics, mon);
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@ -196,6 +197,7 @@ static void spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr,
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{
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{
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Error *local_err = NULL;
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Error *local_err = NULL;
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Object *obj;
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Object *obj;
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sPAPRCPUState *spapr_cpu = spapr_cpu_state(cpu);
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obj = icp_create(OBJECT(cpu), spapr->icp_type, XICS_FABRIC(spapr),
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obj = icp_create(OBJECT(cpu), spapr->icp_type, XICS_FABRIC(spapr),
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&local_err);
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&local_err);
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@ -204,7 +206,7 @@ static void spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr,
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return;
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return;
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}
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}
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cpu->icp = ICP(obj);
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spapr_cpu->icp = ICP(obj);
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}
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}
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static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id)
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static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id)
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@ -213,7 +215,7 @@ static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id)
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CPUState *cs;
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CPUState *cs;
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CPU_FOREACH(cs) {
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CPU_FOREACH(cs) {
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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icp_resend(cpu->icp);
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icp_resend(spapr_cpu_state(cpu)->icp);
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}
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}
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}
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}
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return 0;
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return 0;
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@ -334,7 +336,7 @@ static void spapr_irq_print_info_xive(sPAPRMachineState *spapr,
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CPU_FOREACH(cs) {
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CPU_FOREACH(cs) {
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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xive_tctx_pic_print_info(cpu->tctx, mon);
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xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, mon);
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}
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}
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spapr_xive_pic_print_info(spapr->xive, mon);
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spapr_xive_pic_print_info(spapr->xive, mon);
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@ -345,6 +347,7 @@ static void spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr,
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{
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{
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Error *local_err = NULL;
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Error *local_err = NULL;
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Object *obj;
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Object *obj;
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sPAPRCPUState *spapr_cpu = spapr_cpu_state(cpu);
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obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(spapr->xive), &local_err);
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obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(spapr->xive), &local_err);
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if (local_err) {
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if (local_err) {
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@ -352,13 +355,13 @@ static void spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr,
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return;
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return;
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}
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}
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cpu->tctx = XIVE_TCTX(obj);
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spapr_cpu->tctx = XIVE_TCTX(obj);
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/*
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/*
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* (TCG) Early setting the OS CAM line for hotplugged CPUs as they
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* (TCG) Early setting the OS CAM line for hotplugged CPUs as they
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* don't beneficiate from the reset of the XIVE IRQ backend
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* don't beneficiate from the reset of the XIVE IRQ backend
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*/
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*/
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spapr_xive_set_tctx_os_cam(cpu->tctx);
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spapr_xive_set_tctx_os_cam(spapr_cpu->tctx);
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}
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}
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static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_id)
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static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_id)
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@ -374,7 +377,7 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp)
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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/* (TCG) Set the OS CAM line of the thread interrupt context. */
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/* (TCG) Set the OS CAM line of the thread interrupt context. */
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spapr_xive_set_tctx_os_cam(cpu->tctx);
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spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx);
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}
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}
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/* Activate the XIVE MMIOs */
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/* Activate the XIVE MMIOs */
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@ -46,6 +46,8 @@ typedef struct sPAPRCPUState {
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uint64_t vpa_addr;
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uint64_t vpa_addr;
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uint64_t slb_shadow_addr, slb_shadow_size;
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uint64_t slb_shadow_addr, slb_shadow_size;
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uint64_t dtl_addr, dtl_size;
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uint64_t dtl_addr, dtl_size;
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struct ICPState *icp;
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struct XiveTCTX *tctx;
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} sPAPRCPUState;
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} sPAPRCPUState;
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static inline sPAPRCPUState *spapr_cpu_state(PowerPCCPU *cpu)
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static inline sPAPRCPUState *spapr_cpu_state(PowerPCCPU *cpu)
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