target/m68k: Drop free_cond
Translators are no longer required to free tcg temporaries. Remove the g1 and g2 members of DisasCompare, as they were used to track which temps needed to be freed. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1249,8 +1249,6 @@ static int gen_ea_fp(CPUM68KState *env, DisasContext *s, uint16_t insn,
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typedef struct {
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TCGCond tcond;
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bool g1;
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bool g2;
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TCGv v1;
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TCGv v2;
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} DisasCompare;
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@ -1263,7 +1261,6 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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/* The CC_OP_CMP form can handle most normal comparisons directly. */
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if (op == CC_OP_CMPB || op == CC_OP_CMPW || op == CC_OP_CMPL) {
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c->g1 = c->g2 = 1;
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c->v1 = QREG_CC_N;
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c->v2 = QREG_CC_V;
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switch (cond) {
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@ -1281,7 +1278,6 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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goto done;
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case 10: /* PL */
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case 11: /* MI */
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c->g1 = c->g2 = 0;
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c->v2 = tcg_const_i32(0);
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c->v1 = tmp = tcg_temp_new();
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tcg_gen_sub_i32(tmp, QREG_CC_N, QREG_CC_V);
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@ -1298,8 +1294,6 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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}
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}
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c->g1 = 1;
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c->g2 = 0;
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c->v2 = tcg_const_i32(0);
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switch (cond) {
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@ -1383,7 +1377,6 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 2: /* HI (!C && !Z) -> !(C || Z)*/
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case 3: /* LS (C || Z) */
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c->v1 = tmp = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_setcond_i32(TCG_COND_EQ, tmp, QREG_CC_Z, c->v2);
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tcg_gen_or_i32(tmp, tmp, QREG_CC_C);
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tcond = TCG_COND_NE;
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@ -1411,14 +1404,12 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 12: /* GE (!(N ^ V)) */
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case 13: /* LT (N ^ V) */
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c->v1 = tmp = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_xor_i32(tmp, QREG_CC_N, QREG_CC_V);
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tcond = TCG_COND_LT;
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break;
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case 14: /* GT (!(Z || (N ^ V))) */
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case 15: /* LE (Z || (N ^ V)) */
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c->v1 = tmp = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_setcond_i32(TCG_COND_EQ, tmp, QREG_CC_Z, c->v2);
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tcg_gen_neg_i32(tmp, tmp);
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tmp2 = tcg_temp_new();
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@ -1436,16 +1427,6 @@ static void gen_cc_cond(DisasCompare *c, DisasContext *s, int cond)
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c->tcond = tcond;
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}
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static void free_cond(DisasCompare *c)
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{
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if (!c->g1) {
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tcg_temp_free(c->v1);
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}
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if (!c->g2) {
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tcg_temp_free(c->v2);
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}
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}
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static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
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{
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DisasCompare c;
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@ -1453,7 +1434,6 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
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gen_cc_cond(&c, s, cond);
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update_cc_op(s);
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tcg_gen_brcond_i32(c.tcond, c.v1, c.v2, l1);
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free_cond(&c);
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}
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/* Force a TB lookup after an instruction that changes the CPU state. */
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@ -1512,7 +1492,6 @@ DISAS_INSN(scc)
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tmp = tcg_temp_new();
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tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2);
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free_cond(&c);
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tcg_gen_neg_i32(tmp, tmp);
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DEST_EA(env, insn, OS_BYTE, tmp, NULL);
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@ -4887,7 +4866,6 @@ static void do_trapcc(DisasContext *s, DisasCompare *c)
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s->base.is_jmp = DISAS_NEXT;
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}
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}
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free_cond(c);
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}
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DISAS_INSN(trapcc)
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@ -5383,9 +5361,7 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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{
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TCGv fpsr;
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c->g1 = 1;
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c->v2 = tcg_const_i32(0);
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c->g2 = 0;
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/* TODO: Raise BSUN exception. */
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fpsr = tcg_temp_new();
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gen_load_fcr(s, fpsr, M68K_FPSR);
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@ -5398,14 +5374,12 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 1: /* EQual Z */
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case 17: /* Signaling EQual Z */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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c->tcond = TCG_COND_NE;
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break;
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case 2: /* Ordered Greater Than !(A || Z || N) */
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case 18: /* Greater Than !(A || Z || N) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr,
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FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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c->tcond = TCG_COND_EQ;
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@ -5413,7 +5387,6 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 3: /* Ordered Greater than or Equal Z || !(A || N) */
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case 19: /* Greater than or Equal Z || !(A || N) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A));
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tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_Z | FPSR_CC_N);
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@ -5424,7 +5397,6 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 4: /* Ordered Less Than !(!N || A || Z); */
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case 20: /* Less Than !(!N || A || Z); */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_xori_i32(c->v1, fpsr, FPSR_CC_N);
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tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z);
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c->tcond = TCG_COND_EQ;
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@ -5432,7 +5404,6 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 5: /* Ordered Less than or Equal Z || (N && !A) */
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case 21: /* Less than or Equal Z || (N && !A) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A));
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tcg_gen_andc_i32(c->v1, fpsr, c->v1);
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@ -5442,35 +5413,30 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 6: /* Ordered Greater or Less than !(A || Z) */
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case 22: /* Greater or Less than !(A || Z) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z);
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c->tcond = TCG_COND_EQ;
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break;
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case 7: /* Ordered !A */
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case 23: /* Greater, Less or Equal !A */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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c->tcond = TCG_COND_EQ;
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break;
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case 8: /* Unordered A */
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case 24: /* Not Greater, Less or Equal A */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A);
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c->tcond = TCG_COND_NE;
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break;
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case 9: /* Unordered or Equal A || Z */
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case 25: /* Not Greater or Less then A || Z */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z);
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c->tcond = TCG_COND_NE;
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break;
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case 10: /* Unordered or Greater Than A || !(N || Z)) */
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case 26: /* Not Less or Equal A || !(N || Z)) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z));
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tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_A | FPSR_CC_N);
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@ -5481,7 +5447,6 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 11: /* Unordered or Greater or Equal A || Z || !N */
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case 27: /* Not Less Than A || Z || !N */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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@ -5489,7 +5454,6 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 12: /* Unordered or Less Than A || (N && !Z) */
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case 28: /* Not Greater than or Equal A || (N && !Z) */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z));
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tcg_gen_andc_i32(c->v1, fpsr, c->v1);
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@ -5499,14 +5463,12 @@ static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond)
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case 13: /* Unordered or Less or Equal A || Z || N */
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case 29: /* Not Greater Than A || Z || N */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N);
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c->tcond = TCG_COND_NE;
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break;
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case 14: /* Not Equal !Z */
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case 30: /* Signaling Not Equal !Z */
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c->v1 = tcg_temp_new();
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c->g1 = 0;
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tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z);
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c->tcond = TCG_COND_EQ;
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break;
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@ -5526,7 +5488,6 @@ static void gen_fjmpcc(DisasContext *s, int cond, TCGLabel *l1)
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gen_fcc_cond(&c, s, cond);
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update_cc_op(s);
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tcg_gen_brcond_i32(c.tcond, c.v1, c.v2, l1);
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free_cond(&c);
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}
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DISAS_INSN(fbcc)
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@ -5562,7 +5523,6 @@ DISAS_INSN(fscc)
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tmp = tcg_temp_new();
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tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2);
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free_cond(&c);
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tcg_gen_neg_i32(tmp, tmp);
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DEST_EA(env, insn, OS_BYTE, tmp, NULL);
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