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target/riscv: rename ext_icbom to ext_zicbom

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Add a leading 'z' to improve grepping. When one wants to search for uses
of zicbom they're more likely to do 'grep -i zicbom' than 'grep -i
icbom'.

Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Message-ID: <20231012164604.398496-4-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-10-12 13:46:03 -03:00 committed by Alistair Francis
parent 960b389b7d
commit a326a2b0b2
5 changed files with 12 additions and 12 deletions
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2
hw/riscv/virt.c
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@ -263,7 +263,7 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket,
qemu_fdt_setprop_string(ms->fdt, cpu_name, "riscv,isa", name);
g_free(name);
if (cpu_ptr->cfg.ext_icbom) {
if (cpu_ptr->cfg.ext_zicbom) {
qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbom-block-size",
cpu_ptr->cfg.cbom_blocksize);
}

6
target/riscv/cpu.c
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@ -76,7 +76,7 @@ const uint32_t misa_bits[] = {RVI, RVE, RVM, RVA, RVF, RVD, RVV,
* instead.
*/
const RISCVIsaExtData isa_edata_arr[] = {
ISA_EXT_DATA_ENTRY(zicbom, PRIV_VERSION_1_12_0, ext_icbom),
ISA_EXT_DATA_ENTRY(zicbom, PRIV_VERSION_1_12_0, ext_zicbom),
ISA_EXT_DATA_ENTRY(zicboz, PRIV_VERSION_1_12_0, ext_icboz),
ISA_EXT_DATA_ENTRY(zicond, PRIV_VERSION_1_12_0, ext_zicond),
ISA_EXT_DATA_ENTRY(zicsr, PRIV_VERSION_1_10_0, ext_zicsr),
@ -497,7 +497,7 @@ static void rv64_veyron_v1_cpu_init(Object *obj)
cpu->cfg.ext_zifencei = true;
cpu->cfg.ext_zicsr = true;
cpu->cfg.pmp = true;
cpu->cfg.ext_icbom = true;
cpu->cfg.ext_zicbom = true;
cpu->cfg.cbom_blocksize = 64;
cpu->cfg.cboz_blocksize = 64;
cpu->cfg.ext_icboz = true;
@ -1284,7 +1284,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
MULTI_EXT_CFG_BOOL("zhinx", ext_zhinx, false),
MULTI_EXT_CFG_BOOL("zhinxmin", ext_zhinxmin, false),
MULTI_EXT_CFG_BOOL("zicbom", ext_icbom, true),
MULTI_EXT_CFG_BOOL("zicbom", ext_zicbom, true),
MULTI_EXT_CFG_BOOL("zicboz", ext_icboz, true),
MULTI_EXT_CFG_BOOL("zmmul", ext_zmmul, false),

2
target/riscv/cpu_cfg.h
View File

@ -63,7 +63,7 @@ struct RISCVCPUConfig {
bool ext_zkt;
bool ext_zifencei;
bool ext_zicsr;
bool ext_icbom;
bool ext_zicbom;
bool ext_icboz;
bool ext_zicond;
bool ext_zihintntl;

8
target/riscv/insn_trans/trans_rvzicbo.c.inc
View File

@ -16,10 +16,10 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#define REQUIRE_ZICBOM(ctx) do { \
if (!ctx->cfg_ptr->ext_icbom) { \
return false; \
} \
#define REQUIRE_ZICBOM(ctx) do { \
if (!ctx->cfg_ptr->ext_zicbom) { \
return false; \
} \
} while (0)
#define REQUIRE_ZICBOZ(ctx) do { \

6
target/riscv/kvm/kvm-cpu.c
View File

@ -213,7 +213,7 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs)
.kvm_reg_id = _reg_id}
static KVMCPUConfig kvm_multi_ext_cfgs[] = {
KVM_EXT_CFG("zicbom", ext_icbom, KVM_RISCV_ISA_EXT_ZICBOM),
KVM_EXT_CFG("zicbom", ext_zicbom, KVM_RISCV_ISA_EXT_ZICBOM),
KVM_EXT_CFG("zicboz", ext_icboz, KVM_RISCV_ISA_EXT_ZICBOZ),
KVM_EXT_CFG("zihintpause", ext_zihintpause, KVM_RISCV_ISA_EXT_ZIHINTPAUSE),
KVM_EXT_CFG("zbb", ext_zbb, KVM_RISCV_ISA_EXT_ZBB),
@ -804,7 +804,7 @@ static void kvm_riscv_read_multiext_legacy(RISCVCPU *cpu,
kvm_cpu_cfg_set(cpu, multi_ext_cfg, val);
}
if (cpu->cfg.ext_icbom) {
if (cpu->cfg.ext_zicbom) {
kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cbom_blocksize);
}
@ -897,7 +897,7 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
kvm_cpu_cfg_set(cpu, multi_ext_cfg, val);
}
if (cpu->cfg.ext_icbom) {
if (cpu->cfg.ext_zicbom) {
kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cbom_blocksize);
}