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target/xtensa: Drop reset_sar_tracker 

Translators are no longer required to free tcg temporaries.
Remove sar_m32_allocated, as sar_m32 non-null is equivalent.

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-24 21:53:49 -10:00
parent d47913c104
commit a49f3a2e19
1 changed files with 2 additions and 12 deletions
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14
target/xtensa/translate.c
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@ -57,7 +57,6 @@ struct DisasContext {
bool sar_5bit;
bool sar_m32_5bit;
bool sar_m32_allocated;
TCGv_i32 sar_m32;
unsigned window;
@ -284,14 +283,7 @@ static void init_sar_tracker(DisasContext *dc)
{
dc->sar_5bit = false;
dc->sar_m32_5bit = false;
dc->sar_m32_allocated = false;
}
static void reset_sar_tracker(DisasContext *dc)
{
if (dc->sar_m32_allocated) {
tcg_temp_free(dc->sar_m32);
}
dc->sar_m32 = NULL;
}
static void gen_right_shift_sar(DisasContext *dc, TCGv_i32 sa)
@ -306,9 +298,8 @@ static void gen_right_shift_sar(DisasContext *dc, TCGv_i32 sa)
static void gen_left_shift_sar(DisasContext *dc, TCGv_i32 sa)
{
if (!dc->sar_m32_allocated) {
if (!dc->sar_m32) {
dc->sar_m32 = tcg_temp_new_i32();
dc->sar_m32_allocated = true;
}
tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f);
tcg_gen_sub_i32(cpu_SR[SAR], tcg_constant_i32(32), dc->sar_m32);
@ -1247,7 +1238,6 @@ static void xtensa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
reset_sar_tracker(dc);
if (dc->icount) {
tcg_temp_free(dc->next_icount);
}