sh4: mmio based CF support on r2d board (Takashi YOSHII).

This patch adds emulation for a CompactFlash on sh4/r2d board.
 The device is CF, but wired to be worked as True-IDE mode, and connected
 directly to SH bus. So, this code is to support generally mmio based
 IDEs which are supported by "pata_platform" driver in linux kernel.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5924 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2008-12-07 18:41:42 +00:00
parent db8d990204
commit a4a771c055
4 changed files with 102 additions and 0 deletions

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@ -711,6 +711,7 @@ endif
ifeq ($(TARGET_BASE_ARCH), sh4)
OBJS+= shix.o r2d.o sh7750.o sh7750_regnames.o tc58128.o
OBJS+= sh_timer.o ptimer.o sh_serial.o sh_intc.o sm501.o serial.o
OBJS+= ide.o
endif
ifeq ($(TARGET_BASE_ARCH), m68k)
OBJS+= an5206.o mcf5206.o ptimer.o mcf_uart.o mcf_intc.o mcf5208.o mcf_fec.o

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@ -3413,6 +3413,98 @@ int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq)
return pmac_ide_memory;
}
/***********************************************************/
/* MMIO based ide port
* This emulates IDE device connected directly to the CPU bus without
* dedicated ide controller, which is often seen on embedded boards.
*/
typedef struct {
void *dev;
int shift;
} MMIOState;
static uint32_t mmio_ide_read (void *opaque, target_phys_addr_t addr)
{
MMIOState *s = (MMIOState*)opaque;
IDEState *ide = (IDEState*)s->dev;
addr >>= s->shift;
if (addr & 7)
return ide_ioport_read(ide, addr);
else
return ide_data_readw(ide, 0);
}
static void mmio_ide_write (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
MMIOState *s = (MMIOState*)opaque;
IDEState *ide = (IDEState*)s->dev;
addr >>= s->shift;
if (addr & 7)
ide_ioport_write(ide, addr, val);
else
ide_data_writew(ide, 0, val);
}
static CPUReadMemoryFunc *mmio_ide_reads[] = {
mmio_ide_read,
mmio_ide_read,
mmio_ide_read,
};
static CPUWriteMemoryFunc *mmio_ide_writes[] = {
mmio_ide_write,
mmio_ide_write,
mmio_ide_write,
};
static uint32_t mmio_ide_status_read (void *opaque, target_phys_addr_t addr)
{
MMIOState *s= (MMIOState*)opaque;
IDEState *ide = (IDEState*)s->dev;
return ide_status_read(ide, 0);
}
static void mmio_ide_cmd_write (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
MMIOState *s = (MMIOState*)opaque;
IDEState *ide = (IDEState*)s->dev;
ide_cmd_write(ide, 0, val);
}
static CPUReadMemoryFunc *mmio_ide_status[] = {
mmio_ide_status_read,
mmio_ide_status_read,
mmio_ide_status_read,
};
static CPUWriteMemoryFunc *mmio_ide_cmd[] = {
mmio_ide_cmd_write,
mmio_ide_cmd_write,
mmio_ide_cmd_write,
};
void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
qemu_irq irq, int shift,
BlockDriverState *hd0, BlockDriverState *hd1)
{
MMIOState *s = qemu_mallocz(sizeof(MMIOState));
IDEState *ide = qemu_mallocz(sizeof(IDEState) * 2);
int mem1, mem2;
ide_init2(ide, hd0, hd1, irq);
s->dev = ide;
s->shift = shift;
mem1 = cpu_register_io_memory(0, mmio_ide_reads, mmio_ide_writes, s);
mem2 = cpu_register_io_memory(0, mmio_ide_status, mmio_ide_cmd, s);
cpu_register_physical_memory(membase, 16 << shift, mem1);
cpu_register_physical_memory(membase2, 2 << shift, mem2);
}
/***********************************************************/
/* CF-ATA Microdrive */

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@ -149,6 +149,11 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE);
sm501_init(ds, 0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
serial_hds[2]);
/* onboard CF (True IDE mode, Master only). */
mmio_ide_init(0x14001000, 0x1400080c, NULL, 1,
drives_table[drive_get_index(IF_IDE, 0, 0)].bdrv, NULL);
/* Todo: register on board registers */
{
int kernel_size;

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@ -45,4 +45,8 @@ void sh_serial_init (target_phys_addr_t base, int feat,
/* tc58128.c */
int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
/* ide.c */
void mmio_ide_init(target_phys_addr_t membase, target_phys_addr_t membase2,
qemu_irq irq, int shift,
BlockDriverState *hd0, BlockDriverState *hd1);
#endif