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target/m68k: add explicit single and double precision operations

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Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul,
fsdiv, fddiv.

The precision is managed using set_floatx80_rounding_precision().

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170628204241.32106-4-laurent@vivier.eu>
This commit is contained in:
Laurent Vivier 2017-06-28 22:42:37 +02:00
parent 9d403660d9
commit a51b6bc38b
3 changed files with 125 additions and 5 deletions
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80
target/m68k/fpu_helper.c
View File

@ -157,11 +157,35 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val)
cpu_m68k_set_fpcr(env, val);
}
#define PREC_BEGIN(prec) \
do { \
int old; \
old = get_floatx80_rounding_precision(&env->fp_status); \
set_floatx80_rounding_precision(prec, &env->fp_status) \
#define PREC_END() \
set_floatx80_rounding_precision(old, &env->fp_status); \
} while (0)
void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
{
res->d = floatx80_sqrt(val->d, &env->fp_status);
}
void HELPER(fssqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
{
PREC_BEGIN(32);
res->d = floatx80_sqrt(val->d, &env->fp_status);
PREC_END();
}
void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
{
PREC_BEGIN(64);
res->d = floatx80_sqrt(val->d, &env->fp_status);
PREC_END();
}
void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val)
{
res->d = floatx80_abs(val->d);
@ -177,21 +201,77 @@ void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
res->d = floatx80_add(val0->d, val1->d, &env->fp_status);
}
void HELPER(fsadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(32);
res->d = floatx80_add(val0->d, val1->d, &env->fp_status);
PREC_END();
}
void HELPER(fdadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(64);
res->d = floatx80_add(val0->d, val1->d, &env->fp_status);
PREC_END();
}
void HELPER(fsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
res->d = floatx80_sub(val1->d, val0->d, &env->fp_status);
}
void HELPER(fssub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(32);
res->d = floatx80_sub(val1->d, val0->d, &env->fp_status);
PREC_END();
}
void HELPER(fdsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(64);
res->d = floatx80_sub(val1->d, val0->d, &env->fp_status);
PREC_END();
}
void HELPER(fmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
res->d = floatx80_mul(val0->d, val1->d, &env->fp_status);
}
void HELPER(fsmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(32);
res->d = floatx80_mul(val0->d, val1->d, &env->fp_status);
PREC_END();
}
void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(64);
res->d = floatx80_mul(val0->d, val1->d, &env->fp_status);
PREC_END();
}
void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
}
void HELPER(fsdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(32);
res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
PREC_END();
}
void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
{
PREC_BEGIN(64);
res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
PREC_END();
}
static int float_comp_to_cc(int float_compare)
{
switch (float_compare) {

10
target/m68k/helper.h
View File

@ -26,12 +26,22 @@ DEF_HELPER_2(reds32, s32, env, fp)
DEF_HELPER_3(firound, void, env, fp, fp)
DEF_HELPER_3(fitrunc, void, env, fp, fp)
DEF_HELPER_3(fsqrt, void, env, fp, fp)
DEF_HELPER_3(fssqrt, void, env, fp, fp)
DEF_HELPER_3(fdsqrt, void, env, fp, fp)
DEF_HELPER_3(fabs, void, env, fp, fp)
DEF_HELPER_3(fchs, void, env, fp, fp)
DEF_HELPER_4(fadd, void, env, fp, fp, fp)
DEF_HELPER_4(fsadd, void, env, fp, fp, fp)
DEF_HELPER_4(fdadd, void, env, fp, fp, fp)
DEF_HELPER_4(fsub, void, env, fp, fp, fp)
DEF_HELPER_4(fssub, void, env, fp, fp, fp)
DEF_HELPER_4(fdsub, void, env, fp, fp, fp)
DEF_HELPER_4(fmul, void, env, fp, fp, fp)
DEF_HELPER_4(fsmul, void, env, fp, fp, fp)
DEF_HELPER_4(fdmul, void, env, fp, fp, fp)
DEF_HELPER_4(fdiv, void, env, fp, fp, fp)
DEF_HELPER_4(fsdiv, void, env, fp, fp, fp)
DEF_HELPER_4(fddiv, void, env, fp, fp, fp)
DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp)
DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32)
DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp)

40
target/m68k/translate.c
View File

@ -4604,27 +4604,57 @@ DISAS_INSN(fpu)
case 3: /* fintrz */
gen_helper_fitrunc(cpu_env, cpu_dest, cpu_src);
break;
case 4: case 0x41: case 0x45: /* fsqrt */
case 4: /* fsqrt */
gen_helper_fsqrt(cpu_env, cpu_dest, cpu_src);
break;
case 0x41: /* fssqrt */
gen_helper_fssqrt(cpu_env, cpu_dest, cpu_src);
break;
case 0x45: /* fdsqrt */
gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src);
break;
case 0x18: case 0x58: case 0x5c: /* fabs */
gen_helper_fabs(cpu_env, cpu_dest, cpu_src);
break;
case 0x1a: case 0x5a: case 0x5e: /* fneg */
gen_helper_fchs(cpu_env, cpu_dest, cpu_src);
break;
case 0x20: case 0x60: case 0x64: /* fdiv */
case 0x20: /* fdiv */
gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x22: case 0x62: case 0x66: /* fadd */
case 0x60: /* fsdiv */
gen_helper_fsdiv(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x64: /* fddiv */
gen_helper_fddiv(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x22: /* fadd */
gen_helper_fadd(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x23: case 0x63: case 0x67: /* fmul */
case 0x62: /* fsadd */
gen_helper_fsadd(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x66: /* fdadd */
gen_helper_fdadd(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x23: /* fmul */
gen_helper_fmul(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x28: case 0x68: case 0x6c: /* fsub */
case 0x63: /* fsmul */
gen_helper_fsmul(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x67: /* fdmul */
gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x28: /* fsub */
gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x68: /* fssub */
gen_helper_fssub(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x6c: /* fdsub */
gen_helper_fdsub(cpu_env, cpu_dest, cpu_src, cpu_dest);
break;
case 0x38: /* fcmp */
gen_helper_fcmp(cpu_env, cpu_src, cpu_dest);
return;