Hexagon (target/hexagon) Add overrides for count trailing zeros/ones
The following instructions are overriden S2_ct0 Count trailing zeros S2_ct1 Count trailing ones S2_ct0p Count trailing zeros (register pair) S2_ct1p Count trailing ones (register pair) These instructions are not handled by idef-parser because the imported semantics uses bit-reverse. However, they are straightforward to implement in TCG with tcg_gen_ctzi_* Test cases added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230405164211.30015-1-tsimpson@quicinc.com>
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@ -1058,6 +1058,30 @@
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#define fGEN_TCG_SL2_jumpr31_fnew(SHORTCODE) \
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#define fGEN_TCG_SL2_jumpr31_fnew(SHORTCODE) \
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gen_cond_jumpr31(ctx, TCG_COND_NE, hex_new_pred_value[0])
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gen_cond_jumpr31(ctx, TCG_COND_NE, hex_new_pred_value[0])
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/* Count trailing zeros/ones */
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#define fGEN_TCG_S2_ct0(SHORTCODE) \
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do { \
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tcg_gen_ctzi_tl(RdV, RsV, 32); \
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} while (0)
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#define fGEN_TCG_S2_ct1(SHORTCODE) \
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do { \
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tcg_gen_not_tl(RdV, RsV); \
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tcg_gen_ctzi_tl(RdV, RdV, 32); \
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} while (0)
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#define fGEN_TCG_S2_ct0p(SHORTCODE) \
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do { \
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TCGv_i64 tmp = tcg_temp_new_i64(); \
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tcg_gen_ctzi_i64(tmp, RssV, 64); \
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tcg_gen_extrl_i64_i32(RdV, tmp); \
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} while (0)
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#define fGEN_TCG_S2_ct1p(SHORTCODE) \
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do { \
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TCGv_i64 tmp = tcg_temp_new_i64(); \
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tcg_gen_not_i64(tmp, RssV); \
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tcg_gen_ctzi_i64(tmp, tmp, 64); \
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tcg_gen_extrl_i64_i32(RdV, tmp); \
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} while (0)
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/* Floating point */
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/* Floating point */
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#define fGEN_TCG_F2_conv_sf2df(SHORTCODE) \
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#define fGEN_TCG_F2_conv_sf2df(SHORTCODE) \
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gen_helper_conv_sf2df(RddV, cpu_env, RsV)
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gen_helper_conv_sf2df(RddV, cpu_env, RsV)
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -21,6 +21,7 @@
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typedef unsigned char uint8_t;
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typedef unsigned char uint8_t;
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typedef unsigned short uint16_t;
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typedef unsigned short uint16_t;
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typedef unsigned int uint32_t;
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typedef unsigned int uint32_t;
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typedef unsigned long long uint64_t;
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static inline void S4_storerhnew_rr(void *p, int index, uint16_t v)
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static inline void S4_storerhnew_rr(void *p, int index, uint16_t v)
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@ -333,6 +334,57 @@ void test_l2fetch(void)
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"l2fetch(r0, r3:2)\n\t");
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"l2fetch(r0, r3:2)\n\t");
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}
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}
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static inline int ct0(uint32_t x)
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{
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int res;
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asm("%0 = ct0(%1)\n\t" : "=r"(res) : "r"(x));
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return res;
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}
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static inline int ct1(uint32_t x)
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{
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int res;
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asm("%0 = ct1(%1)\n\t" : "=r"(res) : "r"(x));
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return res;
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}
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static inline int ct0p(uint64_t x)
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{
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int res;
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asm("%0 = ct0(%1)\n\t" : "=r"(res) : "r"(x));
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return res;
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}
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static inline int ct1p(uint64_t x)
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{
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int res;
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asm("%0 = ct1(%1)\n\t" : "=r"(res) : "r"(x));
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return res;
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}
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void test_count_trailing_zeros_ones(void)
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{
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check(ct0(0x0000000f), 0);
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check(ct0(0x00000000), 32);
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check(ct0(0x000000f0), 4);
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check(ct1(0x000000f0), 0);
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check(ct1(0x0000000f), 4);
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check(ct1(0x00000000), 0);
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check(ct1(0xffffffff), 32);
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check(ct0p(0x000000000000000fULL), 0);
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check(ct0p(0x0000000000000000ULL), 64);
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check(ct0p(0x00000000000000f0ULL), 4);
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check(ct1p(0x00000000000000f0ULL), 0);
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check(ct1p(0x000000000000000fULL), 4);
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check(ct1p(0x0000000000000000ULL), 0);
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check(ct1p(0xffffffffffffffffULL), 64);
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check(ct1p(0xffffffffff0fffffULL), 20);
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check(ct1p(0xffffff0fffffffffULL), 36);
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}
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int main()
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int main()
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{
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{
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int res;
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int res;
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@ -468,6 +520,8 @@ int main()
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test_l2fetch();
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test_l2fetch();
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test_count_trailing_zeros_ones();
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puts(err ? "FAIL" : "PASS");
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puts(err ? "FAIL" : "PASS");
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return err;
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return err;
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}
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}
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