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hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device

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Make ppc-uic a subclass of ppc4xx-dcr-device which will handle the cpu
link and make it uniform with the other PPC4xx devices.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <eb548130cf60aea8a6ea4dba4dee1686b3cabc3d.1660746880.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
BALATON Zoltan 2022-08-17 17:08:35 +02:00 committed by Daniel Henrique Barboza
parent e9d20f3717
commit a55b213646
7 changed files with 21 additions and 49 deletions
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26
hw/intc/ppc-uic.c
View File

@ -25,11 +25,8 @@
#include "qemu/osdep.h"
#include "hw/intc/ppc-uic.h"
#include "hw/irq.h"
#include "cpu.h"
#include "hw/ppc/ppc.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "qapi/error.h"
enum {
DCR_UICSR = 0x000,
@ -105,10 +102,9 @@ static void ppcuic_trigger_irq(PPCUIC *uic)
static void ppcuic_set_irq(void *opaque, int irq_num, int level)
{
PPCUIC *uic;
PPCUIC *uic = opaque;
uint32_t mask, sr;
uic = opaque;
mask = 1U << (31 - irq_num);
LOG_UIC("%s: irq %d level %d uicsr %08" PRIx32
" mask %08" PRIx32 " => %08" PRIx32 " %08" PRIx32 "\n",
@ -144,10 +140,9 @@ static void ppcuic_set_irq(void *opaque, int irq_num, int level)
static uint32_t dcr_read_uic(void *opaque, int dcrn)
{
PPCUIC *uic;
PPCUIC *uic = opaque;
uint32_t ret;
uic = opaque;
dcrn -= uic->dcr_base;
switch (dcrn) {
case DCR_UICSR:
@ -192,9 +187,8 @@ static uint32_t dcr_read_uic(void *opaque, int dcrn)
static void dcr_write_uic(void *opaque, int dcrn, uint32_t val)
{
PPCUIC *uic;
PPCUIC *uic = opaque;
uic = opaque;
dcrn -= uic->dcr_base;
LOG_UIC("%s: dcr %d val 0x%x\n", __func__, dcrn, val);
switch (dcrn) {
@ -251,19 +245,12 @@ static void ppc_uic_reset(DeviceState *dev)
static void ppc_uic_realize(DeviceState *dev, Error **errp)
{
PPCUIC *uic = PPC_UIC(dev);
Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
PowerPCCPU *cpu;
int i;
if (!uic->cpu) {
/* This is a programming error in the code using this device */
error_setg(errp, "ppc-uic 'cpu' link property was not set");
return;
}
cpu = POWERPC_CPU(uic->cpu);
for (i = 0; i < DCR_UICMAX; i++) {
ppc_dcr_register(&cpu->env, uic->dcr_base + i, uic,
ppc4xx_dcr_register(dcr, uic->dcr_base + i, uic,
&dcr_read_uic, &dcr_write_uic);
}
@ -273,7 +260,6 @@ static void ppc_uic_realize(DeviceState *dev, Error **errp)
}
static Property ppc_uic_properties[] = {
DEFINE_PROP_LINK("cpu", PPCUIC, cpu, TYPE_CPU, CPUState *),
DEFINE_PROP_UINT32("dcr-base", PPCUIC, dcr_base, 0xc0),
DEFINE_PROP_BOOL("use-vectors", PPCUIC, use_vectors, true),
DEFINE_PROP_END_OF_LIST()
@ -308,7 +294,7 @@ static void ppc_uic_class_init(ObjectClass *klass, void *data)
static const TypeInfo ppc_uic_info = {
.name = TYPE_PPC_UIC,
.parent = TYPE_SYS_BUS_DEVICE,
.parent = TYPE_PPC4xx_DCR_DEVICE,
.instance_size = sizeof(PPCUIC),
.class_init = ppc_uic_class_init,
};

6
hw/ppc/ppc405_uc.c
View File

@ -1152,12 +1152,10 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(sbd, 0, 0xef600600);
/* Universal interrupt controller */
object_property_set_link(OBJECT(&s->uic), "cpu", OBJECT(&s->cpu),
&error_fatal);
sbd = SYS_BUS_DEVICE(&s->uic);
if (!sysbus_realize(sbd, errp)) {
if (!ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(&s->uic), &s->cpu, errp)) {
return;
}
sbd = SYS_BUS_DEVICE(&s->uic);
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
qdev_get_gpio_in(DEVICE(&s->cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,

7
hw/ppc/ppc440_bamboo.c
View File

@ -193,12 +193,9 @@ static void bamboo_init(MachineState *machine)
/* interrupt controller */
uicdev = qdev_new(TYPE_PPC_UIC);
ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal);
object_unref(OBJECT(uicdev));
uicsbd = SYS_BUS_DEVICE(uicdev);
object_property_set_link(OBJECT(uicdev), "cpu", OBJECT(cpu),
&error_fatal);
sysbus_realize_and_unref(uicsbd, &error_fatal);
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,

1
hw/ppc/ppc4xx_devs.c
View File

@ -29,7 +29,6 @@
#include "hw/irq.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/intc/ppc-uic.h"
#include "hw/qdev-properties.h"
#include "qemu/log.h"
#include "exec/address-spaces.h"

17
hw/ppc/sam460ex.c
View File

@ -314,7 +314,6 @@ static void sam460ex_init(MachineState *machine)
/* interrupt controllers */
for (i = 0; i < ARRAY_SIZE(uic); i++) {
SysBusDevice *sbd;
/*
* UICs 1, 2 and 3 are cascaded through UIC 0.
* input_ints[n] is the interrupt number on UIC 0 which
@ -326,22 +325,20 @@ static void sam460ex_init(MachineState *machine)
const int input_ints[] = { -1, 30, 10, 16 };
uic[i] = qdev_new(TYPE_PPC_UIC);
sbd = SYS_BUS_DEVICE(uic[i]);
qdev_prop_set_uint32(uic[i], "dcr-base", 0xc0 + i * 0x10);
object_property_set_link(OBJECT(uic[i]), "cpu", OBJECT(cpu),
&error_fatal);
sysbus_realize_and_unref(sbd, &error_fatal);
ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uic[i]), cpu, &error_fatal);
object_unref(OBJECT(uic[i]));
sbdev = SYS_BUS_DEVICE(uic[i]);
if (i == 0) {
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_INT,
qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_CINT,
qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
} else {
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_INT,
qdev_get_gpio_in(uic[0], input_ints[i]));
sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_CINT,
qdev_get_gpio_in(uic[0], input_ints[i] + 1));
}
}

7
hw/ppc/virtex_ml507.c
View File

@ -104,12 +104,9 @@ static PowerPCCPU *ppc440_init_xilinx(const char *cpu_type, uint32_t sysclk)
/* interrupt controller */
uicdev = qdev_new(TYPE_PPC_UIC);
ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal);
object_unref(OBJECT(uicdev));
uicsbd = SYS_BUS_DEVICE(uicdev);
object_property_set_link(OBJECT(uicdev), "cpu", OBJECT(cpu),
&error_fatal);
sysbus_realize_and_unref(uicsbd, &error_fatal);
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,

6
include/hw/intc/ppc-uic.h
View File

@ -25,8 +25,7 @@
#ifndef HW_INTC_PPC_UIC_H
#define HW_INTC_PPC_UIC_H
#include "hw/sysbus.h"
#include "qom/object.h"
#include "hw/ppc/ppc4xx.h"
#define TYPE_PPC_UIC "ppc-uic"
OBJECT_DECLARE_SIMPLE_TYPE(PPCUIC, PPC_UIC)
@ -56,14 +55,13 @@ enum {
struct PPCUIC {
/*< private >*/
SysBusDevice parent_obj;
Ppc4xxDcrDeviceState parent_obj;
/*< public >*/
qemu_irq output_int;
qemu_irq output_cint;
/* properties */
CPUState *cpu;
uint32_t dcr_base;
bool use_vectors;