ppc/spapr|pnv: Remove SAO from pa-features
SAO is a page table attribute that strengthens the memory ordering of accesses. QEMU with MTTCG does not implement this, so clear it in ibm,pa-features. This is an obscure feature that has been removed from POWER10 ISA v3.1, there isn't much concern with removing it. Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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@ -150,7 +150,7 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
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uint32_t page_sizes_prop[64];
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size_t page_sizes_prop_size;
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const uint8_t pa_features[] = { 24, 0,
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0xf6, 0x3f, 0xc7, 0xc0, 0x80, 0xf0,
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0xf6, 0x3f, 0xc7, 0xc0, 0x00, 0xf0,
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0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
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0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
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@ -233,17 +233,23 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr,
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PowerPCCPU *cpu,
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void *fdt, int offset)
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{
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/*
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* SSO (SAO) ordering is supported on KVM and thread=single hosts,
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* but not MTTCG, so disable it. To advertise it, a cap would have
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* to be added, or support implemented for MTTCG.
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*/
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uint8_t pa_features_206[] = { 6, 0,
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0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
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0xf6, 0x1f, 0xc7, 0x00, 0x00, 0xc0 };
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uint8_t pa_features_207[] = { 24, 0,
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0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
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0xf6, 0x1f, 0xc7, 0xc0, 0x00, 0xf0,
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0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
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0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
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uint8_t pa_features_300[] = { 66, 0,
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/* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
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/* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
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0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
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/* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, 5: LE|CFAR|EB|LSQ */
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0xf6, 0x1f, 0xc7, 0xc0, 0x00, 0xf0, /* 0 - 5 */
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/* 6: DS207 */
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0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
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/* 16: Vector */
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