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Revert "Compile usb-ohci only once" 

This reverts commit f1698408f1.

PCI is always little-endian. Having a user-visible "be" property is just
plain wrong.
This commit is contained in:
Paul Brook 2010-04-04 21:18:26 +01:00
parent 36368cf0d5
commit a67ba3b6f8
13 changed files with 44 additions and 95 deletions
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1
Makefile.objs
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@ -146,7 +146,6 @@ hw-obj-$(CONFIG_PARALLEL) += parallel.o
hw-obj-$(CONFIG_I8254) += i8254.o
hw-obj-$(CONFIG_PCSPK) += pcspk.o
hw-obj-$(CONFIG_USB_UHCI) += usb-uhci.o
hw-obj-$(CONFIG_USB_OHCI) += usb-ohci.o
hw-obj-$(CONFIG_FDC) += fdc.o
hw-obj-$(CONFIG_ACPI) += acpi.o

3
Makefile.target
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@ -178,6 +178,9 @@ QEMU_CFLAGS += $(VNC_SASL_CFLAGS)
# xen backend driver support
obj-$(CONFIG_XEN) += xen_machine_pv.o xen_domainbuild.o
# USB layer
obj-$(CONFIG_USB_OHCI) += usb-ohci.o
# PCI network cards
obj-y += rtl8139.o
obj-y += e1000.o

2
hw/devices.h
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@ -69,5 +69,5 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* usb-ohci.c */
void usb_ohci_init_sm501(uint32_t mmio_base, uint32_t localmem_base,
int num_ports, int devfn, qemu_irq irq, int be);
int num_ports, int devfn, qemu_irq irq);
#endif

2
hw/ppc_newworld.c
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@ -387,7 +387,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
escc_mem_index);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, -1, 1);
usb_ohci_init_pci(pci_bus, -1);
}
/* U3 needs to use USB for input because Linux doesn't support via-cuda

2
hw/ppc_oldworld.c
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@ -370,7 +370,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
escc_mem_index);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, -1, 1);
usb_ohci_init_pci(pci_bus, -1);
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)

2
hw/ppc_prep.c
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@ -750,7 +750,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
#endif
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, -1, 1);
usb_ohci_init_pci(pci_bus, -1);
}
m48t59 = m48t59_init(i8259[8], 0, 0x0074, NVRAM_SIZE, 59);

4
hw/pxa.h
View File

@ -213,4 +213,8 @@ struct PXA2xxI2SState {
PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision);
PXA2xxState *pxa255_init(unsigned int sdram_size);
/* usb-ohci.c */
void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
qemu_irq irq);
#endif /* PXA_H */

13
hw/pxa2xx.c
View File

@ -9,7 +9,6 @@
#include "sysbus.h"
#include "pxa.h"
#include "usb-ohci.h"
#include "sysemu.h"
#include "pc.h"
#include "i2c.h"
@ -2129,11 +2128,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
}
if (usb_enabled) {
#ifdef TARGET_WORDS_BIGENDIAN
usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 1);
#else
usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 0);
#endif
usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1]);
}
s->pcmcia[0] = pxa2xx_pcmcia_init(0x20000000);
@ -2252,11 +2247,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
}
if (usb_enabled) {
#ifdef TARGET_WORDS_BIGENDIAN
usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 1);
#else
usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1], 0);
#endif
usb_ohci_init_pxa(0x4c000000, 3, -1, s->pic[PXA2XX_PIC_USBH1]);
}
s->pcmcia[0] = pxa2xx_pcmcia_init(0x20000000);

6
hw/realview.c
View File

@ -266,11 +266,7 @@ static void realview_init(ram_addr_t ram_size,
pic[48], pic[49], pic[50], pic[51], NULL);
pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
if (usb_enabled) {
#ifdef TARGET_WORDS_BIGENDIAN
usb_ohci_init_pci(pci_bus, -1, 1);
#else
usb_ohci_init_pci(pci_bus, -1, 0);
#endif
usb_ohci_init_pci(pci_bus, -1);
}
n = drive_get_max_bus(IF_SCSI);
while (n >= 0) {

7
hw/sm501.c
View File

@ -1222,13 +1222,8 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
0x1000, sm501_disp_ctrl_index);
/* bridge to usb host emulation module */
#ifdef TARGET_WORDS_BIGENDIAN
usb_ohci_init_sm501(base + MMIO_BASE_OFFSET + SM501_USB_HOST, base,
2, -1, irq, 1);
#else
usb_ohci_init_sm501(base + MMIO_BASE_OFFSET + SM501_USB_HOST, base,
2, -1, irq, 0);
#endif
2, -1, irq);
/* bridge to serial emulation module */
if (chr) {

86
hw/usb-ohci.c
View File

@ -30,6 +30,7 @@
#include "qemu-timer.h"
#include "usb.h"
#include "pci.h"
#include "pxa.h"
#include "devices.h"
#include "usb-ohci.h"
@ -1398,7 +1399,7 @@ static void ohci_port_set_status(OHCIState *ohci, int portnum, uint32_t val)
return;
}
static uint32_t ohci_mem_read_le(void *ptr, target_phys_addr_t addr)
static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr)
{
OHCIState *ohci = ptr;
uint32_t retval;
@ -1515,22 +1516,21 @@ static uint32_t ohci_mem_read_le(void *ptr, target_phys_addr_t addr)
retval = 0xffffffff;
}
}
return retval;
}
static uint32_t ohci_mem_read_be(void *ptr, target_phys_addr_t addr)
{
uint32_t retval;
retval = ohci_mem_read_le(ptr, addr);
#ifdef TARGET_WORDS_BIGENDIAN
retval = bswap32(retval);
#endif
return retval;
}
static void ohci_mem_write_le(void *ptr, target_phys_addr_t addr, uint32_t val)
static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val)
{
OHCIState *ohci = ptr;
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
/* Only aligned reads are allowed on OHCI */
if (addr & 3) {
fprintf(stderr, "usb-ohci: Mis-aligned write\n");
@ -1647,43 +1647,24 @@ static void ohci_mem_write_le(void *ptr, target_phys_addr_t addr, uint32_t val)
}
}
static void ohci_mem_write_be(void *ptr, target_phys_addr_t addr, uint32_t val)
{
val = bswap32(val);
ohci_mem_write_le(ptr, addr, val);
}
/* Only dword reads are defined on OHCI register space */
static CPUReadMemoryFunc * const ohci_readfn_be[3]={
ohci_mem_read_be,
ohci_mem_read_be,
ohci_mem_read_be
static CPUReadMemoryFunc * const ohci_readfn[3]={
ohci_mem_read,
ohci_mem_read,
ohci_mem_read
};
/* Only dword writes are defined on OHCI register space */
static CPUWriteMemoryFunc * const ohci_writefn_be[3]={
ohci_mem_write_be,
ohci_mem_write_be,
ohci_mem_write_be
};
static CPUReadMemoryFunc * const ohci_readfn_le[3]={
ohci_mem_read_le,
ohci_mem_read_le,
ohci_mem_read_le
};
static CPUWriteMemoryFunc * const ohci_writefn_le[3]={
ohci_mem_write_le,
ohci_mem_write_le,
ohci_mem_write_le
static CPUWriteMemoryFunc * const ohci_writefn[3]={
ohci_mem_write,
ohci_mem_write,
ohci_mem_write
};
static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
int num_ports, int devfn,
qemu_irq irq, enum ohci_type type,
const char *name, uint32_t localmem_base,
int be)
const char *name, uint32_t localmem_base)
{
int i;
@ -1703,13 +1684,7 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
usb_frame_time, usb_bit_time);
}
if (be) {
ohci->mem = cpu_register_io_memory(ohci_readfn_be, ohci_writefn_be,
ohci);
} else {
ohci->mem = cpu_register_io_memory(ohci_readfn_le, ohci_writefn_le,
ohci);
}
ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci);
ohci->localmem_base = localmem_base;
ohci->name = name;
@ -1729,7 +1704,6 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
typedef struct {
PCIDevice pci_dev;
OHCIState state;
uint32_t be;
} OHCIPCIState;
static void ohci_mapfunc(PCIDevice *pci_dev, int i,
@ -1754,7 +1728,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
usb_ohci_init(&ohci->state, &dev->qdev, num_ports,
ohci->pci_dev.devfn, ohci->pci_dev.irq[0],
OHCI_TYPE_PCI, ohci->pci_dev.name, 0, ohci->be);
OHCI_TYPE_PCI, ohci->pci_dev.name, 0);
/* TODO: avoid cast below by using dev */
pci_register_bar((struct PCIDevice *)ohci, 0, 256,
@ -1762,33 +1736,29 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
return 0;
}
void usb_ohci_init_pci(struct PCIBus *bus, int devfn, int be)
void usb_ohci_init_pci(struct PCIBus *bus, int devfn)
{
PCIDevice *dev;
dev = pci_create(bus, devfn, "pci-ohci");
qdev_prop_set_uint32(&dev->qdev, "be", be);
qdev_init_nofail(&dev->qdev);
pci_create_simple(bus, devfn, "pci-ohci");
}
void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
qemu_irq irq, int be)
qemu_irq irq)
{
OHCIState *ohci = (OHCIState *)qemu_mallocz(sizeof(OHCIState));
usb_ohci_init(ohci, NULL /* FIXME */, num_ports, devfn, irq,
OHCI_TYPE_PXA, "OHCI USB", 0, be);
OHCI_TYPE_PXA, "OHCI USB", 0);
cpu_register_physical_memory(base, 0x1000, ohci->mem);
}
void usb_ohci_init_sm501(uint32_t mmio_base, uint32_t localmem_base,
int num_ports, int devfn, qemu_irq irq, int be)
int num_ports, int devfn, qemu_irq irq)
{
OHCIState *ohci = (OHCIState *)qemu_mallocz(sizeof(OHCIState));
usb_ohci_init(ohci, NULL /* FIXME */, num_ports, devfn, irq,
OHCI_TYPE_SM501, "OHCI USB", localmem_base, be);
OHCI_TYPE_SM501, "OHCI USB", localmem_base);
cpu_register_physical_memory(mmio_base, 0x1000, ohci->mem);
}
@ -1798,10 +1768,6 @@ static PCIDeviceInfo ohci_info = {
.qdev.desc = "Apple USB Controller",
.qdev.size = sizeof(OHCIPCIState),
.init = usb_ohci_initfn_pci,
.qdev.props = (Property[]) {
DEFINE_PROP_HEX32("be", OHCIPCIState, be, 0),
DEFINE_PROP_END_OF_LIST(),
}
};
static void ohci_register(void)

5
hw/usb-ohci.h
View File

@ -3,8 +3,7 @@
#include "qemu-common.h"
void usb_ohci_init_pci(struct PCIBus *bus, int devfn, int be);
void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
qemu_irq irq, int be);
void usb_ohci_init_pci(struct PCIBus *bus, int devfn);
#endif

6
hw/versatilepb.c
View File

@ -218,11 +218,7 @@ static void versatile_init(ram_addr_t ram_size,
}
}
if (usb_enabled) {
#ifdef TARGET_WORDS_BIGENDIAN
usb_ohci_init_pci(pci_bus, -1, 1);
#else
usb_ohci_init_pci(pci_bus, -1, 0);
#endif
usb_ohci_init_pci(pci_bus, -1);
}
n = drive_get_max_bus(IF_SCSI);
while (n >= 0) {