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PCI: PCIe access should always be little endian 

PCIe busses are always little endian, so set the endianness of the
memory region to little endian rather than native such that operations
work as expected on big endian targets.

Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Matt Redfearn 2017-08-15 15:44:17 +01:00 committed by Michael S. Tsirkin
parent b81b948ecc
commit a6c242aaf5
1 changed files with 1 additions and 1 deletions
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2
hw/pci/pcie_host.c
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@ -81,7 +81,7 @@ static uint64_t pcie_mmcfg_data_read(void *opaque,
static const MemoryRegionOps pcie_mmcfg_ops = {
.read = pcie_mmcfg_data_read,
.write = pcie_mmcfg_data_write,
.endianness = DEVICE_NATIVE_ENDIAN,
.endianness = DEVICE_LITTLE_ENDIAN,
};
static void pcie_host_init(Object *obj)