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TCG variable type checking.

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Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-11-17 14:43:54 +00:00
parent 30913bae9a
commit a7812ae412
37 changed files with 6201 additions and 5766 deletions
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6
cpu-exec.c
View File

@ -345,7 +345,7 @@ int cpu_exec(CPUState *env1)
#ifdef USE_KQEMU
if (kqemu_is_ok(env) && env->interrupt_request == 0) {
int ret;
env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
ret = kqemu_cpu_exec(env);
/* put eflags in CPU temporary format */
CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
@ -571,7 +571,7 @@ int cpu_exec(CPUState *env1)
/* restore flags in standard format */
regs_to_env();
#if defined(TARGET_I386)
env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
#elif defined(TARGET_ARM)
@ -695,7 +695,7 @@ int cpu_exec(CPUState *env1)
#if defined(TARGET_I386)
/* restore flags in standard format */
env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
#elif defined(TARGET_ARM)
/* XXX: Save/restore host fpu exception state?. */
#elif defined(TARGET_SPARC)

221
def-helper.h Normal file
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@ -0,0 +1,221 @@
/* Helper file for declaring TCG helper functions.
Should be included at the start and end of target-foo/helper.h.
Targets should use DEF_HELPER_N and DEF_HELPER_FLAGS_N to declare helper
functions. Names should be specified without the helper_ prefix, and
the return and argument types specified. 3 basic types are understood
(i32, i64 and ptr). Additional aliases are provided for convenience and
to match the types used by the C helper implementation.
The target helper.h should be included in all files that use/define
helper functions. THis will ensure that function prototypes are
consistent. In addition it should be included an extra two times for
helper.c, defining:
GEN_HELPER 1 to produce op generation functions (gen_helper_*)
GEN_HELPER 2 to do runtime registration helper functions.
*/
#ifndef DEF_HELPER_H
#define DEF_HELPER_H 1
#define HELPER(name) glue(helper_, name)
#define GET_TCGV_i32 GET_TCGV_I32
#define GET_TCGV_i64 GET_TCGV_I64
#define GET_TCGV_ptr GET_TCGV_PTR
/* Some types that make sense in C, but not for TCG. */
#define dh_alias_i32 i32
#define dh_alias_s32 i32
#define dh_alias_int i32
#define dh_alias_i64 i64
#define dh_alias_s64 i64
#define dh_alias_f32 i32
#define dh_alias_f64 i64
#if TARGET_LONG_BITS == 32
#define dh_alias_tl i32
#else
#define dh_alias_tl i64
#endif
#define dh_alias_ptr ptr
#define dh_alias_void void
#define dh_alias_env ptr
#define dh_alias(t) glue(dh_alias_, t)
#define dh_ctype_i32 uint32_t
#define dh_ctype_s32 int32_t
#define dh_ctype_int int
#define dh_ctype_i64 uint64_t
#define dh_ctype_s64 int64_t
#define dh_ctype_f32 float32
#define dh_ctype_f64 float64
#define dh_ctype_tl target_ulong
#define dh_ctype_ptr void *
#define dh_ctype_void void
#define dh_ctype_env CPUState *
#define dh_ctype(t) dh_ctype_##t
/* We can't use glue() here because it falls foul of C preprocessor
recursive expansion rules. */
#define dh_retvar_decl0_void void
#define dh_retvar_decl0_i32 TCGv_i32 retval
#define dh_retvar_decl0_i64 TCGv_i64 retval
#define dh_retvar_decl0_ptr TCGv_iptr retval
#define dh_retvar_decl0(t) glue(dh_retvar_decl0_, dh_alias(t))
#define dh_retvar_decl_void
#define dh_retvar_decl_i32 TCGv_i32 retval,
#define dh_retvar_decl_i64 TCGv_i64 retval,
#define dh_retvar_decl_ptr TCGv_iptr retval,
#define dh_retvar_decl(t) glue(dh_retvar_decl_, dh_alias(t))
#define dh_retvar_void TCG_CALL_DUMMY_ARG
#define dh_retvar_i32 GET_TCGV_i32(retval)
#define dh_retvar_i64 GET_TCGV_i64(retval)
#define dh_retvar_ptr GET_TCGV_ptr(retval)
#define dh_retvar(t) glue(dh_retvar_, dh_alias(t))
#define dh_is_64bit_void 0
#define dh_is_64bit_i32 0
#define dh_is_64bit_i64 1
#define dh_is_64bit_ptr (TCG_TARGET_REG_BITS == 64)
#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t))
#define dh_arg(t, n) \
args[n - 1] = glue(GET_TCGV_, dh_alias(t))(glue(arg, n)); \
sizemask |= dh_is_64bit(t) << n
#define dh_arg_decl(t, n) glue(TCGv_, dh_alias(t)) glue(arg, n)
#define DEF_HELPER_0(name, ret) \
DEF_HELPER_FLAGS_0(name, 0, ret)
#define DEF_HELPER_1(name, ret, t1) \
DEF_HELPER_FLAGS_1(name, 0, ret, t1)
#define DEF_HELPER_2(name, ret, t1, t2) \
DEF_HELPER_FLAGS_2(name, 0, ret, t1, t2)
#define DEF_HELPER_3(name, ret, t1, t2, t3) \
DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3)
#define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \
DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)
#endif /* DEF_HELPER_H */
#ifndef GEN_HELPER
/* Function prototypes. */
#define DEF_HELPER_FLAGS_0(name, flags, ret) \
dh_ctype(ret) HELPER(name) (void);
#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \
dh_ctype(ret) HELPER(name) (dh_ctype(t1));
#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2));
#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3));
#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
dh_ctype(t4));
#undef GEN_HELPER
#define GEN_HELPER -1
#elif GEN_HELPER == 1
/* Gen functions. */
#define DEF_HELPER_FLAGS_0(name, flags, ret) \
static inline void glue(gen_helper_, name)(dh_retvar_decl0(ret)) \
{ \
int sizemask; \
sizemask = dh_is_64bit(ret); \
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 0, NULL); \
}
#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \
static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1)) \
{ \
TCGArg args[1]; \
int sizemask; \
sizemask = dh_is_64bit(ret); \
dh_arg(t1, 1); \
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 1, args); \
}
#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \
static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1), \
dh_arg_decl(t2, 2)) \
{ \
TCGArg args[2]; \
int sizemask; \
sizemask = dh_is_64bit(ret); \
dh_arg(t1, 1); \
dh_arg(t2, 2); \
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 2, args); \
}
#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1), \
dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \
{ \
TCGArg args[3]; \
int sizemask; \
sizemask = dh_is_64bit(ret); \
dh_arg(t1, 1); \
dh_arg(t2, 2); \
dh_arg(t3, 3); \
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 3, args); \
}
#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1), \
dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \
{ \
TCGArg args[4]; \
int sizemask; \
sizemask = dh_is_64bit(ret); \
dh_arg(t1, 1); \
dh_arg(t2, 2); \
dh_arg(t3, 3); \
dh_arg(t4, 4); \
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 4, args); \
}
#undef GEN_HELPER
#define GEN_HELPER -1
#elif GEN_HELPER == 2
/* Register helpers. */
#define DEF_HELPER_FLAGS_0(name, flags, ret) \
tcg_register_helper(HELPER(name), #name);
#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \
DEF_HELPER_FLAGS_0(name, flags, ret)
#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \
DEF_HELPER_FLAGS_0(name, flags, ret)
#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
DEF_HELPER_FLAGS_0(name, flags, ret)
#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
DEF_HELPER_FLAGS_0(name, flags, ret)
#undef GEN_HELPER
#define GEN_HELPER -1
#elif GEN_HELPER == -1
/* Undefine macros. */
#undef DEF_HELPER_FLAGS_0
#undef DEF_HELPER_FLAGS_1
#undef DEF_HELPER_FLAGS_2
#undef DEF_HELPER_FLAGS_3
#undef DEF_HELPER_FLAGS_4
#undef GEN_HELPER
#endif

14
gen-icount.h
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@ -5,7 +5,7 @@ static int icount_label;
static inline void gen_icount_start(void)
{
TCGv count;
TCGv_i32 count;
if (!use_icount)
return;
@ -15,7 +15,7 @@ static inline void gen_icount_start(void)
count needs to live over the conditional branch. To workaround this
we allow the target to supply a convenient register temporary. */
#ifndef ICOUNT_TEMP
count = tcg_temp_local_new(TCG_TYPE_I32);
count = tcg_temp_local_new_i32();
#else
count = ICOUNT_TEMP;
#endif
@ -27,7 +27,7 @@ static inline void gen_icount_start(void)
tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label);
tcg_gen_st16_i32(count, cpu_env, offsetof(CPUState, icount_decr.u16.low));
#ifndef ICOUNT_TEMP
tcg_temp_free(count);
tcg_temp_free_i32(count);
#endif
}
@ -42,15 +42,15 @@ static void gen_icount_end(TranslationBlock *tb, int num_insns)
static void inline gen_io_start(void)
{
TCGv tmp = tcg_const_i32(1);
TCGv_i32 tmp = tcg_const_i32(1);
tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
tcg_temp_free(tmp);
tcg_temp_free_i32(tmp);
}
static inline void gen_io_end(void)
{
TCGv tmp = tcg_const_i32(0);
TCGv_i32 tmp = tcg_const_i32(0);
tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
tcg_temp_free(tmp);
tcg_temp_free_i32(tmp);
}

228
target-alpha/helper.h
View File

@ -1,133 +1,133 @@
#ifndef DEF_HELPER
#define DEF_HELPER(ret, name, params) ret name params;
#endif
#include "def-helper.h"
DEF_HELPER(void, helper_tb_flush, (void))
DEF_HELPER_0(tb_flush, void)
DEF_HELPER(void, helper_excp, (int, int))
DEF_HELPER(uint64_t, helper_amask, (uint64_t))
DEF_HELPER(uint64_t, helper_load_pcc, (void))
DEF_HELPER(uint64_t, helper_load_implver, (void))
DEF_HELPER(uint64_t, helper_rc, (void))
DEF_HELPER(uint64_t, helper_rs, (void))
DEF_HELPER_2(excp, void, int, int)
DEF_HELPER_1(amask, i64, i64)
DEF_HELPER_0(load_pcc, i64)
DEF_HELPER_0(load_implver, i64)
DEF_HELPER_0(rc, i64)
DEF_HELPER_0(rs, i64)
DEF_HELPER(uint64_t, helper_addqv, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_addlv, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_subqv, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_sublv, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mullv, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mulqv, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_umulh, (uint64_t, uint64_t))
DEF_HELPER_2(addqv, i64, i64, i64)
DEF_HELPER_2(addlv, i64, i64, i64)
DEF_HELPER_2(subqv, i64, i64, i64)
DEF_HELPER_2(sublv, i64, i64, i64)
DEF_HELPER_2(mullv, i64, i64, i64)
DEF_HELPER_2(mulqv, i64, i64, i64)
DEF_HELPER_2(umulh, i64, i64, i64)
DEF_HELPER(uint64_t, helper_ctpop, (uint64_t))
DEF_HELPER(uint64_t, helper_ctlz, (uint64_t))
DEF_HELPER(uint64_t, helper_cttz, (uint64_t))
DEF_HELPER_1(ctpop, i64, i64)
DEF_HELPER_1(ctlz, i64, i64)
DEF_HELPER_1(cttz, i64, i64)
DEF_HELPER(uint64_t, helper_mskbl, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_insbl, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mskwl, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_inswl, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mskll, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_insll, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_zap, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_zapnot, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mskql, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_insql, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mskwh, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_inswh, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_msklh, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_inslh, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mskqh, (int64_t, uint64_t))
DEF_HELPER(uint64_t, helper_insqh, (int64_t, uint64_t))
DEF_HELPER_2(mskbl, i64, i64, i64)
DEF_HELPER_2(insbl, i64, i64, i64)
DEF_HELPER_2(mskwl, i64, i64, i64)
DEF_HELPER_2(inswl, i64, i64, i64)
DEF_HELPER_2(mskll, i64, i64, i64)
DEF_HELPER_2(insll, i64, i64, i64)
DEF_HELPER_2(zap, i64, i64, i64)
DEF_HELPER_2(zapnot, i64, i64, i64)
DEF_HELPER_2(mskql, i64, i64, i64)
DEF_HELPER_2(insql, i64, i64, i64)
DEF_HELPER_2(mskwh, i64, i64, i64)
DEF_HELPER_2(inswh, i64, i64, i64)
DEF_HELPER_2(msklh, i64, i64, i64)
DEF_HELPER_2(inslh, i64, i64, i64)
DEF_HELPER_2(mskqh, i64, i64, i64)
DEF_HELPER_2(insqh, i64, i64, i64)
DEF_HELPER(uint64_t, helper_cmpbge, (uint64_t, uint64_t))
DEF_HELPER_2(cmpbge, i64, i64, i64)
DEF_HELPER(uint64_t, helper_load_fpcr, (void))
DEF_HELPER(void, helper_store_fpcr, (uint64_t val))
DEF_HELPER_0(load_fpcr, i64)
DEF_HELPER_1(store_fpcr, void, i64)
DEF_HELPER(uint32_t, helper_f_to_memory, (uint64_t s))
DEF_HELPER(uint64_t, helper_memory_to_f, (uint32_t s))
DEF_HELPER(uint64_t, helper_addf, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_subf, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mulf, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_divf, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_sqrtf, (uint64_t))
DEF_HELPER_1(f_to_memory, i32, i64)
DEF_HELPER_1(memory_to_f, i64, i32)
DEF_HELPER_2(addf, i64, i64, i64)
DEF_HELPER_2(subf, i64, i64, i64)
DEF_HELPER_2(mulf, i64, i64, i64)
DEF_HELPER_2(divf, i64, i64, i64)
DEF_HELPER_1(sqrtf, i64, i64)
DEF_HELPER(uint64_t, helper_g_to_memory, (uint64_t s))
DEF_HELPER(uint64_t, helper_memory_to_g, (uint64_t s))
DEF_HELPER(uint64_t, helper_addg, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_subg, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mulg, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_divg, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_sqrtg, (uint64_t))
DEF_HELPER_1(g_to_memory, i64, i64)
DEF_HELPER_1(memory_to_g, i64, i64)
DEF_HELPER_2(addg, i64, i64, i64)
DEF_HELPER_2(subg, i64, i64, i64)
DEF_HELPER_2(mulg, i64, i64, i64)
DEF_HELPER_2(divg, i64, i64, i64)
DEF_HELPER_1(sqrtg, i64, i64)
DEF_HELPER(uint32_t, helper_s_to_memory, (uint64_t s))
DEF_HELPER(uint64_t, helper_memory_to_s, (uint32_t s))
DEF_HELPER(uint64_t, helper_adds, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_subs, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_muls, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_divs, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_sqrts, (uint64_t))
DEF_HELPER_1(s_to_memory, i32, i64)
DEF_HELPER_1(memory_to_s, i64, i32)
DEF_HELPER_2(adds, i64, i64, i64)
DEF_HELPER_2(subs, i64, i64, i64)
DEF_HELPER_2(muls, i64, i64, i64)
DEF_HELPER_2(divs, i64, i64, i64)
DEF_HELPER_1(sqrts, i64, i64)
DEF_HELPER(uint64_t, helper_addt, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_subt, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mult, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_divt, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_sqrtt, (uint64_t))
DEF_HELPER_2(addt, i64, i64, i64)
DEF_HELPER_2(subt, i64, i64, i64)
DEF_HELPER_2(mult, i64, i64, i64)
DEF_HELPER_2(divt, i64, i64, i64)
DEF_HELPER_1(sqrtt, i64, i64)
DEF_HELPER(uint64_t, helper_cmptun, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cmpteq, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cmptle, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cmptlt, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cmpgeq, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cmpgle, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cmpglt, (uint64_t, uint64_t))
DEF_HELPER_2(cmptun, i64, i64, i64)
DEF_HELPER_2(cmpteq, i64, i64, i64)
DEF_HELPER_2(cmptle, i64, i64, i64)
DEF_HELPER_2(cmptlt, i64, i64, i64)
DEF_HELPER_2(cmpgeq, i64, i64, i64)
DEF_HELPER_2(cmpgle, i64, i64, i64)
DEF_HELPER_2(cmpglt, i64, i64, i64)
DEF_HELPER(uint64_t, helper_cmpfeq, (uint64_t))
DEF_HELPER(uint64_t, helper_cmpfne, (uint64_t))
DEF_HELPER(uint64_t, helper_cmpflt, (uint64_t))
DEF_HELPER(uint64_t, helper_cmpfle, (uint64_t))
DEF_HELPER(uint64_t, helper_cmpfgt, (uint64_t))
DEF_HELPER(uint64_t, helper_cmpfge, (uint64_t))
DEF_HELPER_1(cmpfeq, i64, i64)
DEF_HELPER_1(cmpfne, i64, i64)
DEF_HELPER_1(cmpflt, i64, i64)
DEF_HELPER_1(cmpfle, i64, i64)
DEF_HELPER_1(cmpfgt, i64, i64)
DEF_HELPER_1(cmpfge, i64, i64)
DEF_HELPER(uint64_t, helper_cpys, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cpysn, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_cpyse, (uint64_t, uint64_t))
DEF_HELPER_2(cpys, i64, i64, i64)
DEF_HELPER_2(cpysn, i64, i64, i64)
DEF_HELPER_2(cpyse, i64, i64, i64)
DEF_HELPER(uint64_t, helper_cvtts, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtst, (uint64_t))
DEF_HELPER(uint64_t, helper_cvttq, (uint64_t))
DEF_HELPER(uint32_t, helper_cvtqs, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtqt, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtqf, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtgf, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtgq, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtqg, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtlq, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtql, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtqlv, (uint64_t))
DEF_HELPER(uint64_t, helper_cvtqlsv, (uint64_t))
DEF_HELPER_1(cvtts, i64, i64)
DEF_HELPER_1(cvtst, i64, i64)
DEF_HELPER_1(cvttq, i64, i64)
DEF_HELPER_1(cvtqs, i64, i64)
DEF_HELPER_1(cvtqt, i64, i64)
DEF_HELPER_1(cvtqf, i64, i64)
DEF_HELPER_1(cvtgf, i64, i64)
DEF_HELPER_1(cvtgq, i64, i64)
DEF_HELPER_1(cvtqg, i64, i64)
DEF_HELPER_1(cvtlq, i64, i64)
DEF_HELPER_1(cvtql, i64, i64)
DEF_HELPER_1(cvtqlv, i64, i64)
DEF_HELPER_1(cvtqlsv, i64, i64)
#if !defined (CONFIG_USER_ONLY)
DEF_HELPER(void, helper_hw_rei, (void))
DEF_HELPER(void, helper_hw_ret, (uint64_t))
DEF_HELPER(uint64_t, helper_mfpr, (int, uint64_t))
DEF_HELPER(void, helper_mtpr, (int, uint64_t))
DEF_HELPER(void, helper_set_alt_mode, (void))
DEF_HELPER(void, helper_restore_mode, (void))
DEF_HELPER_0(hw_rei, void)
DEF_HELPER_1(hw_ret, void, i64)
DEF_HELPER_2(mfpr, i64, int, i64)
DEF_HELPER_2(mtpr, void, int, i64)
DEF_HELPER_0(set_alt_mode, void)
DEF_HELPER_0(restore_mode, void)
DEF_HELPER(uint64_t, helper_ld_virt_to_phys, (uint64_t))
DEF_HELPER(uint64_t, helper_st_virt_to_phys, (uint64_t))
DEF_HELPER(void, helper_ldl_raw, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldq_raw, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldl_l_raw, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldq_l_raw, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldl_kernel, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldq_kernel, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldl_data, (uint64_t, uint64_t))
DEF_HELPER(void, helper_ldq_data, (uint64_t, uint64_t))
DEF_HELPER(void, helper_stl_raw, (uint64_t, uint64_t))
DEF_HELPER(void, helper_stq_raw, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_stl_c_raw, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_stq_c_raw, (uint64_t, uint64_t))
DEF_HELPER_1(ld_virt_to_phys, i64, i64)
DEF_HELPER_1(st_virt_to_phys, i64, i64)
DEF_HELPER_2(ldl_raw, void, i64, i64)
DEF_HELPER_2(ldq_raw, void, i64, i64)
DEF_HELPER_2(ldl_l_raw, void, i64, i64)
DEF_HELPER_2(ldq_l_raw, void, i64, i64)
DEF_HELPER_2(ldl_kernel, void, i64, i64)
DEF_HELPER_2(ldq_kernel, void, i64, i64)
DEF_HELPER_2(ldl_data, void, i64, i64)
DEF_HELPER_2(ldq_data, void, i64, i64)
DEF_HELPER_2(stl_raw, void, i64, i64)
DEF_HELPER_2(stq_raw, void, i64, i64)
DEF_HELPER_2(stl_c_raw, i64, i64, i64)
DEF_HELPER_2(stq_c_raw, i64, i64, i64)
#endif
#include "def-helper.h"

1
target-alpha/op_helper.c
View File

@ -21,6 +21,7 @@
#include "exec.h"
#include "host-utils.h"
#include "softfloat.h"
#include "helper.h"
void helper_tb_flush (void)
{

708
target-alpha/translate.c
View File

File diff suppressed because it is too large Load Diff

823
target-arm/helpers.h
View File

@ -1,469 +1,394 @@
#define DEF_HELPER(name, ret, args) ret glue(helper_,name) args;
#include "def-helper.h"
#ifdef GEN_HELPER
#define DEF_HELPER_0_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(void) \
{ \
tcg_gen_helper_0_0(helper_##name); \
}
#define DEF_HELPER_0_1(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv arg1) \
{ \
tcg_gen_helper_0_1(helper_##name, arg1); \
}
#define DEF_HELPER_0_2(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv arg1, TCGv arg2) \
{ \
tcg_gen_helper_0_2(helper_##name, arg1, arg2); \
}
#define DEF_HELPER_0_3(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name( \
TCGv arg1, TCGv arg2, TCGv arg3) \
{ \
tcg_gen_helper_0_3(helper_##name, arg1, arg2, arg3); \
}
#define DEF_HELPER_1_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret) \
{ \
tcg_gen_helper_1_0(helper_##name, ret); \
}
#define DEF_HELPER_1_1(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, TCGv arg1) \
{ \
tcg_gen_helper_1_1(helper_##name, ret, arg1); \
}
#define DEF_HELPER_1_2(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, TCGv arg1, TCGv arg2) \
{ \
tcg_gen_helper_1_2(helper_##name, ret, arg1, arg2); \
}
#define DEF_HELPER_1_3(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, \
TCGv arg1, TCGv arg2, TCGv arg3) \
{ \
tcg_gen_helper_1_3(helper_##name, ret, arg1, arg2, arg3); \
}
#define DEF_HELPER_1_4(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, \
TCGv arg1, TCGv arg2, TCGv arg3, TCGv arg4) \
{ \
tcg_gen_helper_1_4(helper_##name, ret, arg1, arg2, arg3, arg4); \
}
#else /* !GEN_HELPER */
#define DEF_HELPER_0_0 DEF_HELPER
#define DEF_HELPER_0_1 DEF_HELPER
#define DEF_HELPER_0_2 DEF_HELPER
#define DEF_HELPER_0_3 DEF_HELPER
#define DEF_HELPER_1_0 DEF_HELPER
#define DEF_HELPER_1_1 DEF_HELPER
#define DEF_HELPER_1_2 DEF_HELPER
#define DEF_HELPER_1_3 DEF_HELPER
#define DEF_HELPER_1_4 DEF_HELPER
#define HELPER(x) glue(helper_,x)
#endif
DEF_HELPER_1(clz, i32, i32)
DEF_HELPER_1(sxtb16, i32, i32)
DEF_HELPER_1(uxtb16, i32, i32)
DEF_HELPER_1_1(clz, uint32_t, (uint32_t))
DEF_HELPER_1_1(sxtb16, uint32_t, (uint32_t))
DEF_HELPER_1_1(uxtb16, uint32_t, (uint32_t))
DEF_HELPER_1_2(add_setq, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(add_saturate, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(sub_saturate, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(add_usaturate, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(sub_usaturate, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_1(double_saturate, uint32_t, (int32_t))
DEF_HELPER_1_2(sdiv, int32_t, (int32_t, int32_t))
DEF_HELPER_1_2(udiv, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_1(rbit, uint32_t, (uint32_t))
DEF_HELPER_1_1(abs, uint32_t, (uint32_t))
DEF_HELPER_2(add_setq, i32, i32, i32)
DEF_HELPER_2(add_saturate, i32, i32, i32)
DEF_HELPER_2(sub_saturate, i32, i32, i32)
DEF_HELPER_2(add_usaturate, i32, i32, i32)
DEF_HELPER_2(sub_usaturate, i32, i32, i32)
DEF_HELPER_1(double_saturate, i32, s32)
DEF_HELPER_2(sdiv, s32, s32, s32)
DEF_HELPER_2(udiv, i32, i32, i32)
DEF_HELPER_1(rbit, i32, i32)
DEF_HELPER_1(abs, i32, i32)
#define PAS_OP(pfx) \
DEF_HELPER_1_3(pfx ## add8, uint32_t, (uint32_t, uint32_t, uint32_t *)) \
DEF_HELPER_1_3(pfx ## sub8, uint32_t, (uint32_t, uint32_t, uint32_t *)) \
DEF_HELPER_1_3(pfx ## sub16, uint32_t, (uint32_t, uint32_t, uint32_t *)) \
DEF_HELPER_1_3(pfx ## add16, uint32_t, (uint32_t, uint32_t, uint32_t *)) \
DEF_HELPER_1_3(pfx ## addsubx, uint32_t, (uint32_t, uint32_t, uint32_t *)) \
DEF_HELPER_1_3(pfx ## subaddx, uint32_t, (uint32_t, uint32_t, uint32_t *))
DEF_HELPER_3(pfx ## add8, i32, i32, i32, ptr) \
DEF_HELPER_3(pfx ## sub8, i32, i32, i32, ptr) \
DEF_HELPER_3(pfx ## sub16, i32, i32, i32, ptr) \
DEF_HELPER_3(pfx ## add16, i32, i32, i32, ptr) \
DEF_HELPER_3(pfx ## addsubx, i32, i32, i32, ptr) \
DEF_HELPER_3(pfx ## subaddx, i32, i32, i32, ptr)
PAS_OP(s)
PAS_OP(u)
#undef PAS_OP
#define PAS_OP(pfx) \
DEF_HELPER_1_2(pfx ## add8, uint32_t, (uint32_t, uint32_t)) \
DEF_HELPER_1_2(pfx ## sub8, uint32_t, (uint32_t, uint32_t)) \
DEF_HELPER_1_2(pfx ## sub16, uint32_t, (uint32_t, uint32_t)) \
DEF_HELPER_1_2(pfx ## add16, uint32_t, (uint32_t, uint32_t)) \
DEF_HELPER_1_2(pfx ## addsubx, uint32_t, (uint32_t, uint32_t)) \
DEF_HELPER_1_2(pfx ## subaddx, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(pfx ## add8, i32, i32, i32) \
DEF_HELPER_2(pfx ## sub8, i32, i32, i32) \
DEF_HELPER_2(pfx ## sub16, i32, i32, i32) \
DEF_HELPER_2(pfx ## add16, i32, i32, i32) \
DEF_HELPER_2(pfx ## addsubx, i32, i32, i32) \
DEF_HELPER_2(pfx ## subaddx, i32, i32, i32)
PAS_OP(q)
PAS_OP(sh)
PAS_OP(uq)
PAS_OP(uh)
#undef PAS_OP
DEF_HELPER_1_2(ssat, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(usat, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(ssat16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(usat16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(ssat, i32, i32, i32)
DEF_HELPER_2(usat, i32, i32, i32)
DEF_HELPER_2(ssat16, i32, i32, i32)
DEF_HELPER_2(usat16, i32, i32, i32)
DEF_HELPER_1_2(usad8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(usad8, i32, i32, i32)
DEF_HELPER_1_1(logicq_cc, uint32_t, (uint64_t))
DEF_HELPER_1(logicq_cc, i32, i64)
DEF_HELPER_1_3(sel_flags, uint32_t, (uint32_t, uint32_t, uint32_t))
DEF_HELPER_0_1(exception, void, (uint32_t))
DEF_HELPER_0_0(wfi, void, (void))
DEF_HELPER_3(sel_flags, i32, i32, i32, i32)
DEF_HELPER_1(exception, void, i32)
DEF_HELPER_0(wfi, void)
DEF_HELPER_0_2(cpsr_write, void, (uint32_t, uint32_t))
DEF_HELPER_1_0(cpsr_read, uint32_t, (void))
DEF_HELPER_2(cpsr_write, void, i32, i32)
DEF_HELPER_0(cpsr_read, i32)
DEF_HELPER_0_3(v7m_msr, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_2(v7m_mrs, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_3(v7m_msr, void, env, i32, i32)
DEF_HELPER_2(v7m_mrs, i32, env, i32)
DEF_HELPER_0_3(set_cp15, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_2(get_cp15, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_3(set_cp15, void, env, i32, i32)
DEF_HELPER_2(get_cp15, i32, env, i32)
DEF_HELPER_0_3(set_cp, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_2(get_cp, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_3(set_cp, void, env, i32, i32)
DEF_HELPER_2(get_cp, i32, env, i32)
DEF_HELPER_1_2(get_r13_banked, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_0_3(set_r13_banked, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_2(get_r13_banked, i32, env, i32)
DEF_HELPER_3(set_r13_banked, void, env, i32, i32)
DEF_HELPER_0_2(mark_exclusive, void, (CPUState *, uint32_t))
DEF_HELPER_1_2(test_exclusive, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_0_1(clrex, void, (CPUState *))
DEF_HELPER_2(mark_exclusive, void, env, i32)
DEF_HELPER_2(test_exclusive, i32, env, i32)
DEF_HELPER_1(clrex, void, env)
DEF_HELPER_1_1(get_user_reg, uint32_t, (uint32_t))
DEF_HELPER_0_2(set_user_reg, void, (uint32_t, uint32_t))
DEF_HELPER_1(get_user_reg, i32, i32)
DEF_HELPER_2(set_user_reg, void, i32, i32)
DEF_HELPER_1_1(vfp_get_fpscr, uint32_t, (CPUState *))
DEF_HELPER_0_2(vfp_set_fpscr, void, (CPUState *, uint32_t))
DEF_HELPER_1(vfp_get_fpscr, i32, env)
DEF_HELPER_2(vfp_set_fpscr, void, env, i32)
DEF_HELPER_1_3(vfp_adds, float32, (float32, float32, CPUState *))
DEF_HELPER_1_3(vfp_addd, float64, (float64, float64, CPUState *))
DEF_HELPER_1_3(vfp_subs, float32, (float32, float32, CPUState *))
DEF_HELPER_1_3(vfp_subd, float64, (float64, float64, CPUState *))
DEF_HELPER_1_3(vfp_muls, float32, (float32, float32, CPUState *))
DEF_HELPER_1_3(vfp_muld, float64, (float64, float64, CPUState *))
DEF_HELPER_1_3(vfp_divs, float32, (float32, float32, CPUState *))
DEF_HELPER_1_3(vfp_divd, float64, (float64, float64, CPUState *))
DEF_HELPER_1_1(vfp_negs, float32, (float32))
DEF_HELPER_1_1(vfp_negd, float64, (float64))
DEF_HELPER_1_1(vfp_abss, float32, (float32))
DEF_HELPER_1_1(vfp_absd, float64, (float64))
DEF_HELPER_1_2(vfp_sqrts, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_sqrtd, float64, (float64, CPUState *))
DEF_HELPER_0_3(vfp_cmps, void, (float32, float32, CPUState *))
DEF_HELPER_0_3(vfp_cmpd, void, (float64, float64, CPUState *))
DEF_HELPER_0_3(vfp_cmpes, void, (float32, float32, CPUState *))
DEF_HELPER_0_3(vfp_cmped, void, (float64, float64, CPUState *))
DEF_HELPER_3(vfp_adds, f32, f32, f32, env)
DEF_HELPER_3(vfp_addd, f64, f64, f64, env)
DEF_HELPER_3(vfp_subs, f32, f32, f32, env)
DEF_HELPER_3(vfp_subd, f64, f64, f64, env)
DEF_HELPER_3(vfp_muls, f32, f32, f32, env)
DEF_HELPER_3(vfp_muld, f64, f64, f64, env)
DEF_HELPER_3(vfp_divs, f32, f32, f32, env)
DEF_HELPER_3(vfp_divd, f64, f64, f64, env)
DEF_HELPER_1(vfp_negs, f32, f32)
DEF_HELPER_1(vfp_negd, f64, f64)
DEF_HELPER_1(vfp_abss, f32, f32)
DEF_HELPER_1(vfp_absd, f64, f64)
DEF_HELPER_2(vfp_sqrts, f32, f32, env)
DEF_HELPER_2(vfp_sqrtd, f64, f64, env)
DEF_HELPER_3(vfp_cmps, void, f32, f32, env)
DEF_HELPER_3(vfp_cmpd, void, f64, f64, env)
DEF_HELPER_3(vfp_cmpes, void, f32, f32, env)
DEF_HELPER_3(vfp_cmped, void, f64, f64, env)
DEF_HELPER_1_2(vfp_fcvtds, float64, (float32, CPUState *))
DEF_HELPER_1_2(vfp_fcvtsd, float32, (float64, CPUState *))
DEF_HELPER_2(vfp_fcvtds, f64, f32, env)
DEF_HELPER_2(vfp_fcvtsd, f32, f64, env)
DEF_HELPER_1_2(vfp_uitos, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_uitod, float64, (float32, CPUState *))
DEF_HELPER_1_2(vfp_sitos, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_sitod, float64, (float32, CPUState *))
DEF_HELPER_2(vfp_uitos, f32, f32, env)
DEF_HELPER_2(vfp_uitod, f64, f32, env)
DEF_HELPER_2(vfp_sitos, f32, f32, env)
DEF_HELPER_2(vfp_sitod, f64, f32, env)
DEF_HELPER_1_2(vfp_touis, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_touid, float32, (float64, CPUState *))
DEF_HELPER_1_2(vfp_touizs, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_touizd, float32, (float64, CPUState *))
DEF_HELPER_1_2(vfp_tosis, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_tosid, float32, (float64, CPUState *))
DEF_HELPER_1_2(vfp_tosizs, float32, (float32, CPUState *))
DEF_HELPER_1_2(vfp_tosizd, float32, (float64, CPUState *))
DEF_HELPER_2(vfp_touis, f32, f32, env)
DEF_HELPER_2(vfp_touid, f32, f64, env)
DEF_HELPER_2(vfp_touizs, f32, f32, env)
DEF_HELPER_2(vfp_touizd, f32, f64, env)
DEF_HELPER_2(vfp_tosis, f32, f32, env)
DEF_HELPER_2(vfp_tosid, f32, f64, env)
DEF_HELPER_2(vfp_tosizs, f32, f32, env)
DEF_HELPER_2(vfp_tosizd, f32, f64, env)
DEF_HELPER_1_3(vfp_toshs, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_tosls, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_touhs, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_touls, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_toshd, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_tosld, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_touhd, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_tould, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_shtos, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_sltos, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_uhtos, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_ultos, float32, (float32, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_shtod, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_sltod, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_uhtod, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_1_3(vfp_ultod, float64, (float64, uint32_t, CPUState *))
DEF_HELPER_3(vfp_toshs, f32, f32, i32, env)
DEF_HELPER_3(vfp_tosls, f32, f32, i32, env)
DEF_HELPER_3(vfp_touhs, f32, f32, i32, env)
DEF_HELPER_3(vfp_touls, f32, f32, i32, env)
DEF_HELPER_3(vfp_toshd, f64, f64, i32, env)
DEF_HELPER_3(vfp_tosld, f64, f64, i32, env)
DEF_HELPER_3(vfp_touhd, f64, f64, i32, env)
DEF_HELPER_3(vfp_tould, f64, f64, i32, env)
DEF_HELPER_3(vfp_shtos, f32, f32, i32, env)
DEF_HELPER_3(vfp_sltos, f32, f32, i32, env)
DEF_HELPER_3(vfp_uhtos, f32, f32, i32, env)
DEF_HELPER_3(vfp_ultos, f32, f32, i32, env)
DEF_HELPER_3(vfp_shtod, f64, f64, i32, env)
DEF_HELPER_3(vfp_sltod, f64, f64, i32, env)
DEF_HELPER_3(vfp_uhtod, f64, f64, i32, env)
DEF_HELPER_3(vfp_ultod, f64, f64, i32, env)
DEF_HELPER_1_3(recps_f32, float32, (float32, float32, CPUState *))
DEF_HELPER_1_3(rsqrts_f32, float32, (float32, float32, CPUState *))
DEF_HELPER_1_2(recpe_f32, float32, (float32, CPUState *))
DEF_HELPER_1_2(rsqrte_f32, float32, (float32, CPUState *))
DEF_HELPER_1_2(recpe_u32, uint32_t, (uint32_t, CPUState *))
DEF_HELPER_1_2(rsqrte_u32, uint32_t, (uint32_t, CPUState *))
DEF_HELPER_1_4(neon_tbl, uint32_t, (uint32_t, uint32_t, uint32_t, uint32_t))
DEF_HELPER_1_2(neon_add_saturate_u64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_add_saturate_s64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_sub_saturate_u64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_sub_saturate_s64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_3(recps_f32, f32, f32, f32, env)
DEF_HELPER_3(rsqrts_f32, f32, f32, f32, env)
DEF_HELPER_2(recpe_f32, f32, f32, env)
DEF_HELPER_2(rsqrte_f32, f32, f32, env)
DEF_HELPER_2(recpe_u32, i32, i32, env)
DEF_HELPER_2(rsqrte_u32, i32, i32, env)
DEF_HELPER_4(neon_tbl, i32, i32, i32, i32, i32)
DEF_HELPER_2(neon_add_saturate_u64, i64, i64, i64)
DEF_HELPER_2(neon_add_saturate_s64, i64, i64, i64)
DEF_HELPER_2(neon_sub_saturate_u64, i64, i64, i64)
DEF_HELPER_2(neon_sub_saturate_s64, i64, i64, i64)
DEF_HELPER_1_2(add_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(adc_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(sub_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(sbc_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(add_cc, i32, i32, i32)
DEF_HELPER_2(adc_cc, i32, i32, i32)
DEF_HELPER_2(sub_cc, i32, i32, i32)
DEF_HELPER_2(sbc_cc, i32, i32, i32)
DEF_HELPER_1_2(shl, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(shr, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(sar, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(ror, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(shl_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(shr_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(sar_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(ror_cc, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(shl, i32, i32, i32)
DEF_HELPER_2(shr, i32, i32, i32)
DEF_HELPER_2(sar, i32, i32, i32)
DEF_HELPER_2(ror, i32, i32, i32)
DEF_HELPER_2(shl_cc, i32, i32, i32)
DEF_HELPER_2(shr_cc, i32, i32, i32)
DEF_HELPER_2(sar_cc, i32, i32, i32)
DEF_HELPER_2(ror_cc, i32, i32, i32)
/* neon_helper.c */
DEF_HELPER_1_3(neon_qadd_u8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qadd_s8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qadd_u16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qadd_s16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qsub_u8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qsub_s8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qsub_u16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qsub_s16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_3(neon_qadd_u8, i32, env, i32, i32)
DEF_HELPER_3(neon_qadd_s8, i32, env, i32, i32)
DEF_HELPER_3(neon_qadd_u16, i32, env, i32, i32)
DEF_HELPER_3(neon_qadd_s16, i32, env, i32, i32)
DEF_HELPER_3(neon_qsub_u8, i32, env, i32, i32)
DEF_HELPER_3(neon_qsub_s8, i32, env, i32, i32)
DEF_HELPER_3(neon_qsub_u16, i32, env, i32, i32)
DEF_HELPER_3(neon_qsub_s16, i32, env, i32, i32)
DEF_HELPER_1_2(neon_hadd_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hadd_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hadd_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hadd_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hadd_s32, int32_t, (int32_t, int32_t))
DEF_HELPER_1_2(neon_hadd_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rhadd_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rhadd_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rhadd_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rhadd_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rhadd_s32, int32_t, (int32_t, int32_t))
DEF_HELPER_1_2(neon_rhadd_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hsub_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hsub_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hsub_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hsub_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_hsub_s32, int32_t, (int32_t, int32_t))
DEF_HELPER_1_2(neon_hsub_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_hadd_s8, i32, i32, i32)
DEF_HELPER_2(neon_hadd_u8, i32, i32, i32)
DEF_HELPER_2(neon_hadd_s16, i32, i32, i32)
DEF_HELPER_2(neon_hadd_u16, i32, i32, i32)
DEF_HELPER_2(neon_hadd_s32, s32, s32, s32)
DEF_HELPER_2(neon_hadd_u32, i32, i32, i32)
DEF_HELPER_2(neon_rhadd_s8, i32, i32, i32)
DEF_HELPER_2(neon_rhadd_u8, i32, i32, i32)
DEF_HELPER_2(neon_rhadd_s16, i32, i32, i32)
DEF_HELPER_2(neon_rhadd_u16, i32, i32, i32)
DEF_HELPER_2(neon_rhadd_s32, s32, s32, s32)
DEF_HELPER_2(neon_rhadd_u32, i32, i32, i32)
DEF_HELPER_2(neon_hsub_s8, i32, i32, i32)
DEF_HELPER_2(neon_hsub_u8, i32, i32, i32)
DEF_HELPER_2(neon_hsub_s16, i32, i32, i32)
DEF_HELPER_2(neon_hsub_u16, i32, i32, i32)
DEF_HELPER_2(neon_hsub_s32, s32, s32, s32)
DEF_HELPER_2(neon_hsub_u32, i32, i32, i32)
DEF_HELPER_1_2(neon_cgt_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cgt_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cgt_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cgt_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cgt_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cgt_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_cgt_u8, i32, i32, i32)
DEF_HELPER_2(neon_cgt_s8, i32, i32, i32)
DEF_HELPER_2(neon_cgt_u16, i32, i32, i32)
DEF_HELPER_2(neon_cgt_s16, i32, i32, i32)
DEF_HELPER_2(neon_cgt_u32, i32, i32, i32)
DEF_HELPER_2(neon_cgt_s32, i32, i32, i32)
DEF_HELPER_2(neon_cge_u8, i32, i32, i32)
DEF_HELPER_2(neon_cge_s8, i32, i32, i32)
DEF_HELPER_2(neon_cge_u16, i32, i32, i32)
DEF_HELPER_2(neon_cge_s16, i32, i32, i32)
DEF_HELPER_2(neon_cge_u32, i32, i32, i32)
DEF_HELPER_2(neon_cge_s32, i32, i32, i32)
DEF_HELPER_1_2(neon_min_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_min_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_min_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_min_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_min_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_min_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmin_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmin_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmin_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmin_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmin_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmin_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmax_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmax_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmax_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmax_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmax_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_pmax_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_min_u8, i32, i32, i32)
DEF_HELPER_2(neon_min_s8, i32, i32, i32)
DEF_HELPER_2(neon_min_u16, i32, i32, i32)
DEF_HELPER_2(neon_min_s16, i32, i32, i32)
DEF_HELPER_2(neon_min_u32, i32, i32, i32)
DEF_HELPER_2(neon_min_s32, i32, i32, i32)
DEF_HELPER_2(neon_max_u8, i32, i32, i32)
DEF_HELPER_2(neon_max_s8, i32, i32, i32)
DEF_HELPER_2(neon_max_u16, i32, i32, i32)
DEF_HELPER_2(neon_max_s16, i32, i32, i32)
DEF_HELPER_2(neon_max_u32, i32, i32, i32)
DEF_HELPER_2(neon_max_s32, i32, i32, i32)
DEF_HELPER_2(neon_pmin_u8, i32, i32, i32)
DEF_HELPER_2(neon_pmin_s8, i32, i32, i32)
DEF_HELPER_2(neon_pmin_u16, i32, i32, i32)
DEF_HELPER_2(neon_pmin_s16, i32, i32, i32)
DEF_HELPER_2(neon_pmax_u8, i32, i32, i32)
DEF_HELPER_2(neon_pmax_s8, i32, i32, i32)
DEF_HELPER_2(neon_pmax_u16, i32, i32, i32)
DEF_HELPER_2(neon_pmax_s16, i32, i32, i32)
DEF_HELPER_1_2(neon_abd_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abd_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abd_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abd_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abd_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abd_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_abd_u8, i32, i32, i32)
DEF_HELPER_2(neon_abd_s8, i32, i32, i32)
DEF_HELPER_2(neon_abd_u16, i32, i32, i32)
DEF_HELPER_2(neon_abd_s16, i32, i32, i32)
DEF_HELPER_2(neon_abd_u32, i32, i32, i32)
DEF_HELPER_2(neon_abd_s32, i32, i32, i32)
DEF_HELPER_1_2(neon_shl_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_shl_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_shl_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_shl_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_shl_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_shl_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_shl_u64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_shl_s64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_rshl_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rshl_s8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rshl_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rshl_s16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rshl_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rshl_s32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_rshl_u64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_rshl_s64, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_3(neon_qshl_u8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qshl_s8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qshl_u16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qshl_s16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qshl_u32, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qshl_s32, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qshl_u64, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(neon_qshl_s64, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(neon_qrshl_u8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrshl_s8, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrshl_u16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrshl_s16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrshl_u32, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrshl_s32, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrshl_u64, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(neon_qrshl_s64, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_2(neon_shl_u8, i32, i32, i32)
DEF_HELPER_2(neon_shl_s8, i32, i32, i32)
DEF_HELPER_2(neon_shl_u16, i32, i32, i32)
DEF_HELPER_2(neon_shl_s16, i32, i32, i32)
DEF_HELPER_2(neon_shl_u32, i32, i32, i32)
DEF_HELPER_2(neon_shl_s32, i32, i32, i32)
DEF_HELPER_2(neon_shl_u64, i64, i64, i64)
DEF_HELPER_2(neon_shl_s64, i64, i64, i64)
DEF_HELPER_2(neon_rshl_u8, i32, i32, i32)
DEF_HELPER_2(neon_rshl_s8, i32, i32, i32)
DEF_HELPER_2(neon_rshl_u16, i32, i32, i32)
DEF_HELPER_2(neon_rshl_s16, i32, i32, i32)
DEF_HELPER_2(neon_rshl_u32, i32, i32, i32)
DEF_HELPER_2(neon_rshl_s32, i32, i32, i32)
DEF_HELPER_2(neon_rshl_u64, i64, i64, i64)
DEF_HELPER_2(neon_rshl_s64, i64, i64, i64)
DEF_HELPER_3(neon_qshl_u8, i32, env, i32, i32)
DEF_HELPER_3(neon_qshl_s8, i32, env, i32, i32)
DEF_HELPER_3(neon_qshl_u16, i32, env, i32, i32)
DEF_HELPER_3(neon_qshl_s16, i32, env, i32, i32)
DEF_HELPER_3(neon_qshl_u32, i32, env, i32, i32)
DEF_HELPER_3(neon_qshl_s32, i32, env, i32, i32)
DEF_HELPER_3(neon_qshl_u64, i64, env, i64, i64)
DEF_HELPER_3(neon_qshl_s64, i64, env, i64, i64)
DEF_HELPER_3(neon_qrshl_u8, i32, env, i32, i32)
DEF_HELPER_3(neon_qrshl_s8, i32, env, i32, i32)
DEF_HELPER_3(neon_qrshl_u16, i32, env, i32, i32)
DEF_HELPER_3(neon_qrshl_s16, i32, env, i32, i32)
DEF_HELPER_3(neon_qrshl_u32, i32, env, i32, i32)
DEF_HELPER_3(neon_qrshl_s32, i32, env, i32, i32)
DEF_HELPER_3(neon_qrshl_u64, i64, env, i64, i64)
DEF_HELPER_3(neon_qrshl_s64, i64, env, i64, i64)
DEF_HELPER_1_2(neon_add_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_add_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_padd_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_padd_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_sub_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_sub_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mul_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mul_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mul_p8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_add_u8, i32, i32, i32)
DEF_HELPER_2(neon_add_u16, i32, i32, i32)
DEF_HELPER_2(neon_padd_u8, i32, i32, i32)
DEF_HELPER_2(neon_padd_u16, i32, i32, i32)
DEF_HELPER_2(neon_sub_u8, i32, i32, i32)
DEF_HELPER_2(neon_sub_u16, i32, i32, i32)
DEF_HELPER_2(neon_mul_u8, i32, i32, i32)
DEF_HELPER_2(neon_mul_u16, i32, i32, i32)
DEF_HELPER_2(neon_mul_p8, i32, i32, i32)
DEF_HELPER_1_2(neon_tst_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_tst_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_tst_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_ceq_u8, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_ceq_u16, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_ceq_u32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_tst_u8, i32, i32, i32)
DEF_HELPER_2(neon_tst_u16, i32, i32, i32)
DEF_HELPER_2(neon_tst_u32, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u8, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u16, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u32, i32, i32, i32)
DEF_HELPER_1_1(neon_abs_s8, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_abs_s16, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_clz_u8, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_clz_u16, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_cls_s8, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_cls_s16, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_cls_s32, uint32_t, (uint32_t))
DEF_HELPER_1_1(neon_cnt_u8, uint32_t, (uint32_t))
DEF_HELPER_1(neon_abs_s8, i32, i32)
DEF_HELPER_1(neon_abs_s16, i32, i32)
DEF_HELPER_1(neon_clz_u8, i32, i32)
DEF_HELPER_1(neon_clz_u16, i32, i32)
DEF_HELPER_1(neon_cls_s8, i32, i32)
DEF_HELPER_1(neon_cls_s16, i32, i32)
DEF_HELPER_1(neon_cls_s32, i32, i32)
DEF_HELPER_1(neon_cnt_u8, i32, i32)
DEF_HELPER_1_3(neon_qdmulh_s16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrdmulh_s16, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qdmulh_s32, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(neon_qrdmulh_s32, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_3(neon_qdmulh_s16, i32, env, i32, i32)
DEF_HELPER_3(neon_qrdmulh_s16, i32, env, i32, i32)
DEF_HELPER_3(neon_qdmulh_s32, i32, env, i32, i32)
DEF_HELPER_3(neon_qrdmulh_s32, i32, env, i32, i32)
DEF_HELPER_1_1(neon_narrow_u8, uint32_t, (uint64_t))
DEF_HELPER_1_1(neon_narrow_u16, uint32_t, (uint64_t))
DEF_HELPER_1_2(neon_narrow_sat_u8, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(neon_narrow_sat_s8, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(neon_narrow_sat_u16, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(neon_narrow_sat_s16, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(neon_narrow_sat_u32, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(neon_narrow_sat_s32, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_1(neon_narrow_high_u8, uint32_t, (uint64_t))
DEF_HELPER_1_1(neon_narrow_high_u16, uint32_t, (uint64_t))
DEF_HELPER_1_1(neon_narrow_round_high_u8, uint32_t, (uint64_t))
DEF_HELPER_1_1(neon_narrow_round_high_u16, uint32_t, (uint64_t))
DEF_HELPER_1_1(neon_widen_u8, uint64_t, (uint32_t))
DEF_HELPER_1_1(neon_widen_s8, uint64_t, (uint32_t))
DEF_HELPER_1_1(neon_widen_u16, uint64_t, (uint32_t))
DEF_HELPER_1_1(neon_widen_s16, uint64_t, (uint32_t))
DEF_HELPER_1(neon_narrow_u8, i32, i64)
DEF_HELPER_1(neon_narrow_u16, i32, i64)
DEF_HELPER_2(neon_narrow_sat_u8, i32, env, i64)
DEF_HELPER_2(neon_narrow_sat_s8, i32, env, i64)
DEF_HELPER_2(neon_narrow_sat_u16, i32, env, i64)
DEF_HELPER_2(neon_narrow_sat_s16, i32, env, i64)
DEF_HELPER_2(neon_narrow_sat_u32, i32, env, i64)
DEF_HELPER_2(neon_narrow_sat_s32, i32, env, i64)
DEF_HELPER_1(neon_narrow_high_u8, i32, i64)
DEF_HELPER_1(neon_narrow_high_u16, i32, i64)
DEF_HELPER_1(neon_narrow_round_high_u8, i32, i64)
DEF_HELPER_1(neon_narrow_round_high_u16, i32, i64)
DEF_HELPER_1(neon_widen_u8, i64, i32)
DEF_HELPER_1(neon_widen_s8, i64, i32)
DEF_HELPER_1(neon_widen_u16, i64, i32)
DEF_HELPER_1(neon_widen_s16, i64, i32)
DEF_HELPER_1_2(neon_addl_u16, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_addl_u32, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_paddl_u16, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_paddl_u32, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_subl_u16, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(neon_subl_u32, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_3(neon_addl_saturate_s32, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(neon_addl_saturate_s64, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_2(neon_abdl_u16, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abdl_s16, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abdl_u32, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abdl_s32, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abdl_u64, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abdl_s64, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mull_u8, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mull_s8, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mull_u16, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mull_s16, uint64_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_addl_u16, i64, i64, i64)
DEF_HELPER_2(neon_addl_u32, i64, i64, i64)
DEF_HELPER_2(neon_paddl_u16, i64, i64, i64)
DEF_HELPER_2(neon_paddl_u32, i64, i64, i64)
DEF_HELPER_2(neon_subl_u16, i64, i64, i64)
DEF_HELPER_2(neon_subl_u32, i64, i64, i64)
DEF_HELPER_3(neon_addl_saturate_s32, i64, env, i64, i64)
DEF_HELPER_3(neon_addl_saturate_s64, i64, env, i64, i64)
DEF_HELPER_2(neon_abdl_u16, i64, i32, i32)
DEF_HELPER_2(neon_abdl_s16, i64, i32, i32)
DEF_HELPER_2(neon_abdl_u32, i64, i32, i32)
DEF_HELPER_2(neon_abdl_s32, i64, i32, i32)
DEF_HELPER_2(neon_abdl_u64, i64, i32, i32)
DEF_HELPER_2(neon_abdl_s64, i64, i32, i32)
DEF_HELPER_2(neon_mull_u8, i64, i32, i32)
DEF_HELPER_2(neon_mull_s8, i64, i32, i32)
DEF_HELPER_2(neon_mull_u16, i64, i32, i32)
DEF_HELPER_2(neon_mull_s16, i64, i32, i32)
DEF_HELPER_1_1(neon_negl_u16, uint64_t, (uint64_t))
DEF_HELPER_1_1(neon_negl_u32, uint64_t, (uint64_t))
DEF_HELPER_1_1(neon_negl_u64, uint64_t, (uint64_t))
DEF_HELPER_1(neon_negl_u16, i64, i64)
DEF_HELPER_1(neon_negl_u32, i64, i64)
DEF_HELPER_1(neon_negl_u64, i64, i64)
DEF_HELPER_1_2(neon_qabs_s8, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_1_2(neon_qabs_s16, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_1_2(neon_qabs_s32, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_1_2(neon_qneg_s8, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_1_2(neon_qneg_s16, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_1_2(neon_qneg_s32, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_2(neon_qabs_s8, i32, env, i32)
DEF_HELPER_2(neon_qabs_s16, i32, env, i32)
DEF_HELPER_2(neon_qabs_s32, i32, env, i32)
DEF_HELPER_2(neon_qneg_s8, i32, env, i32)
DEF_HELPER_2(neon_qneg_s16, i32, env, i32)
DEF_HELPER_2(neon_qneg_s32, i32, env, i32)
DEF_HELPER_0_0(neon_trn_u8, void, (void))
DEF_HELPER_0_0(neon_trn_u16, void, (void))
DEF_HELPER_0_0(neon_unzip_u8, void, (void))
DEF_HELPER_0_0(neon_zip_u8, void, (void))
DEF_HELPER_0_0(neon_zip_u16, void, (void))
DEF_HELPER_0(neon_trn_u8, void)
DEF_HELPER_0(neon_trn_u16, void)
DEF_HELPER_0(neon_unzip_u8, void)
DEF_HELPER_0(neon_zip_u8, void)
DEF_HELPER_0(neon_zip_u16, void)
DEF_HELPER_1_2(neon_min_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_max_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_abd_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_add_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_sub_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_mul_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_ceq_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cge_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_cgt_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_acge_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_1_2(neon_acgt_f32, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_2(neon_min_f32, i32, i32, i32)
DEF_HELPER_2(neon_max_f32, i32, i32, i32)
DEF_HELPER_2(neon_abd_f32, i32, i32, i32)
DEF_HELPER_2(neon_add_f32, i32, i32, i32)
DEF_HELPER_2(neon_sub_f32, i32, i32, i32)
DEF_HELPER_2(neon_mul_f32, i32, i32, i32)
DEF_HELPER_2(neon_ceq_f32, i32, i32, i32)
DEF_HELPER_2(neon_cge_f32, i32, i32, i32)
DEF_HELPER_2(neon_cgt_f32, i32, i32, i32)
DEF_HELPER_2(neon_acge_f32, i32, i32, i32)
DEF_HELPER_2(neon_acgt_f32, i32, i32, i32)
/* iwmmxt_helper.c */
DEF_HELPER_1_2(iwmmxt_maddsq, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_madduq, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_sadb, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_sadw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_mulslw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_mulshw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_mululw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_muluhw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_macsw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_2(iwmmxt_macuw, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_1_1(iwmmxt_setpsr_nz, uint32_t, (uint64_t))
DEF_HELPER_2(iwmmxt_maddsq, i64, i64, i64)
DEF_HELPER_2(iwmmxt_madduq, i64, i64, i64)
DEF_HELPER_2(iwmmxt_sadb, i64, i64, i64)
DEF_HELPER_2(iwmmxt_sadw, i64, i64, i64)
DEF_HELPER_2(iwmmxt_mulslw, i64, i64, i64)
DEF_HELPER_2(iwmmxt_mulshw, i64, i64, i64)
DEF_HELPER_2(iwmmxt_mululw, i64, i64, i64)
DEF_HELPER_2(iwmmxt_muluhw, i64, i64, i64)
DEF_HELPER_2(iwmmxt_macsw, i64, i64, i64)
DEF_HELPER_2(iwmmxt_macuw, i64, i64, i64)
DEF_HELPER_1(iwmmxt_setpsr_nz, i32, i64)
#define DEF_IWMMXT_HELPER_SIZE_ENV(name) \
DEF_HELPER_1_3(iwmmxt_##name##b, uint64_t, (CPUState *, uint64_t, uint64_t)) \
DEF_HELPER_1_3(iwmmxt_##name##w, uint64_t, (CPUState *, uint64_t, uint64_t)) \
DEF_HELPER_1_3(iwmmxt_##name##l, uint64_t, (CPUState *, uint64_t, uint64_t)) \
DEF_HELPER_3(iwmmxt_##name##b, i64, env, i64, i64) \
DEF_HELPER_3(iwmmxt_##name##w, i64, env, i64, i64) \
DEF_HELPER_3(iwmmxt_##name##l, i64, env, i64, i64) \
DEF_IWMMXT_HELPER_SIZE_ENV(unpackl)
DEF_IWMMXT_HELPER_SIZE_ENV(unpackh)
DEF_HELPER_1_2(iwmmxt_unpacklub, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackluw, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpacklul, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackhub, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackhuw, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackhul, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpacklsb, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpacklsw, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpacklsl, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackhsb, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackhsw, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_1_2(iwmmxt_unpackhsl, uint64_t, (CPUState *, uint64_t))
DEF_HELPER_2(iwmmxt_unpacklub, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackluw, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpacklul, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackhub, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackhuw, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackhul, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpacklsb, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpacklsw, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpacklsl, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackhsb, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackhsw, i64, env, i64)
DEF_HELPER_2(iwmmxt_unpackhsl, i64, env, i64)
DEF_IWMMXT_HELPER_SIZE_ENV(cmpeq)
DEF_IWMMXT_HELPER_SIZE_ENV(cmpgtu)
@ -481,59 +406,51 @@ DEF_IWMMXT_HELPER_SIZE_ENV(addu)
DEF_IWMMXT_HELPER_SIZE_ENV(subs)
DEF_IWMMXT_HELPER_SIZE_ENV(adds)
DEF_HELPER_1_3(iwmmxt_avgb0, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_avgb1, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_avgw0, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_avgw1, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_3(iwmmxt_avgb0, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_avgb1, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_avgw0, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_avgw1, i64, env, i64, i64)
DEF_HELPER_1_2(iwmmxt_msadb, uint64_t, (uint64_t, uint64_t))
DEF_HELPER_2(iwmmxt_msadb, i64, i64, i64)
DEF_HELPER_1_3(iwmmxt_align, uint64_t, (uint64_t, uint64_t, uint32_t))
DEF_HELPER_1_4(iwmmxt_insr, uint64_t, (uint64_t, uint32_t, uint32_t, uint32_t))
DEF_HELPER_3(iwmmxt_align, i64, i64, i64, i32)
DEF_HELPER_4(iwmmxt_insr, i64, i64, i32, i32, i32)
DEF_HELPER_1_1(iwmmxt_bcstb, uint64_t, (uint32_t))
DEF_HELPER_1_1(iwmmxt_bcstw, uint64_t, (uint32_t))
DEF_HELPER_1_1(iwmmxt_bcstl, uint64_t, (uint32_t))
DEF_HELPER_1(iwmmxt_bcstb, i64, i32)
DEF_HELPER_1(iwmmxt_bcstw, i64, i32)
DEF_HELPER_1(iwmmxt_bcstl, i64, i32)
DEF_HELPER_1_1(iwmmxt_addcb, uint64_t, (uint64_t))
DEF_HELPER_1_1(iwmmxt_addcw, uint64_t, (uint64_t))
DEF_HELPER_1_1(iwmmxt_addcl, uint64_t, (uint64_t))
DEF_HELPER_1(iwmmxt_addcb, i64, i64)
DEF_HELPER_1(iwmmxt_addcw, i64, i64)
DEF_HELPER_1(iwmmxt_addcl, i64, i64)
DEF_HELPER_1_1(iwmmxt_msbb, uint32_t, (uint64_t))
DEF_HELPER_1_1(iwmmxt_msbw, uint32_t, (uint64_t))
DEF_HELPER_1_1(iwmmxt_msbl, uint32_t, (uint64_t))
DEF_HELPER_1(iwmmxt_msbb, i32, i64)
DEF_HELPER_1(iwmmxt_msbw, i32, i64)
DEF_HELPER_1(iwmmxt_msbl, i32, i64)
DEF_HELPER_1_3(iwmmxt_srlw, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_srll, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_srlq, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_sllw, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_slll, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_sllq, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_sraw, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_sral, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_sraq, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_rorw, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_rorl, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_rorq, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_shufh, uint64_t, (CPUState *, uint64_t, uint32_t))
DEF_HELPER_3(iwmmxt_srlw, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_srll, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_srlq, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_sllw, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_slll, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_sllq, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_sraw, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_sral, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_sraq, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_rorw, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_rorl, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_rorq, i64, env, i64, i32)
DEF_HELPER_3(iwmmxt_shufh, i64, env, i64, i32)
DEF_HELPER_1_3(iwmmxt_packuw, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_packul, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_packuq, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_packsw, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_packsl, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_1_3(iwmmxt_packsq, uint64_t, (CPUState *, uint64_t, uint64_t))
DEF_HELPER_3(iwmmxt_packuw, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_packul, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_packuq, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_packsw, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_packsl, i64, env, i64, i64)
DEF_HELPER_3(iwmmxt_packsq, i64, env, i64, i64)
DEF_HELPER_1_3(iwmmxt_muladdsl, uint64_t, (uint64_t, uint32_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_muladdsw, uint64_t, (uint64_t, uint32_t, uint32_t))
DEF_HELPER_1_3(iwmmxt_muladdswl, uint64_t, (uint64_t, uint32_t, uint32_t))
DEF_HELPER_3(iwmmxt_muladdsl, i64, i64, i32, i32)
DEF_HELPER_3(iwmmxt_muladdsw, i64, i64, i32, i32)
DEF_HELPER_3(iwmmxt_muladdswl, i64, i64, i32, i32)
#undef DEF_HELPER
#undef DEF_HELPER_0_0
#undef DEF_HELPER_0_1
#undef DEF_HELPER_0_2
#undef DEF_HELPER_1_0
#undef DEF_HELPER_1_1
#undef DEF_HELPER_1_2
#undef DEF_HELPER_1_3
#undef GEN_HELPER
#include "def-helper.h"

4
target-arm/op_addsub.h
View File

@ -8,9 +8,9 @@
*/
#ifdef ARITH_GE
#define GE_ARG , uint32_t *gep
#define GE_ARG , void *gep
#define DECLARE_GE uint32_t ge = 0
#define SET_GE *gep = ge
#define SET_GE *(uint32_t *)gep = ge
#else
#define GE_ARG
#define DECLARE_GE do{}while(0)

218
target-arm/translate.c
View File

@ -31,6 +31,7 @@
#include "tcg-op.h"
#include "qemu-log.h"
#include "helpers.h"
#define GEN_HELPER 1
#include "helpers.h"
@ -73,13 +74,14 @@ typedef struct DisasContext {
#define DISAS_WFI 4
#define DISAS_SWI 5
static TCGv cpu_env;
static TCGv_ptr cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv cpu_V0, cpu_V1, cpu_M0;
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
/* FIXME: These should be removed. */
static TCGv cpu_T[2];
static TCGv cpu_F0s, cpu_F1s, cpu_F0d, cpu_F1d;
static TCGv cpu_F0s, cpu_F1s;
static TCGv_i64 cpu_F0d, cpu_F1d;
#define ICOUNT_TEMP cpu_T[0]
#include "gen-icount.h"
@ -87,10 +89,13 @@ static TCGv cpu_F0s, cpu_F1s, cpu_F0d, cpu_F1d;
/* initialize TCG globals. */
void arm_translate_init(void)
{
cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
cpu_T[0] = tcg_global_reg_new(TCG_TYPE_I32, TCG_AREG1, "T0");
cpu_T[1] = tcg_global_reg_new(TCG_TYPE_I32, TCG_AREG2, "T1");
cpu_T[0] = tcg_global_reg_new_i32(TCG_AREG1, "T0");
cpu_T[1] = tcg_global_reg_new_i32(TCG_AREG2, "T1");
#define GEN_HELPER 2
#include "helpers.h"
}
/* The code generator doesn't like lots of temporaries, so maintain our own
@ -100,16 +105,16 @@ static int num_temps;
static TCGv temps[MAX_TEMPS];
/* Allocate a temporary variable. */
static TCGv new_tmp(void)
static TCGv_i32 new_tmp(void)
{
TCGv tmp;
if (num_temps == MAX_TEMPS)
abort();
if (GET_TCGV(temps[num_temps]))
if (GET_TCGV_I32(temps[num_temps]))
return temps[num_temps++];
tmp = tcg_temp_new(TCG_TYPE_I32);
tmp = tcg_temp_new_i32();
temps[num_temps++] = tmp;
return tmp;
}
@ -120,11 +125,11 @@ static void dead_tmp(TCGv tmp)
int i;
num_temps--;
i = num_temps;
if (GET_TCGV(temps[i]) == GET_TCGV(tmp))
if (TCGV_EQUAL(temps[i], tmp))
return;
/* Shuffle this temp to the last slot. */
while (GET_TCGV(temps[i]) != GET_TCGV(tmp))
while (!TCGV_EQUAL(temps[i], tmp))
i--;
while (i < num_temps) {
temps[i] = temps[i + 1];
@ -324,10 +329,10 @@ static void gen_roundqd(TCGv a, TCGv b)
/* FIXME: Most targets have native widening multiplication.
It would be good to use that instead of a full wide multiply. */
/* 32x32->64 multiply. Marks inputs as dead. */
static TCGv gen_mulu_i64_i32(TCGv a, TCGv b)
static TCGv_i64 gen_mulu_i64_i32(TCGv a, TCGv b)
{
TCGv tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv_i64 tmp1 = tcg_temp_new_i64();
TCGv_i64 tmp2 = tcg_temp_new_i64();
tcg_gen_extu_i32_i64(tmp1, a);
dead_tmp(a);
@ -337,10 +342,10 @@ static TCGv gen_mulu_i64_i32(TCGv a, TCGv b)
return tmp1;
}
static TCGv gen_muls_i64_i32(TCGv a, TCGv b)
static TCGv_i64 gen_muls_i64_i32(TCGv a, TCGv b)
{
TCGv tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv_i64 tmp1 = tcg_temp_new_i64();
TCGv_i64 tmp2 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp1, a);
dead_tmp(a);
@ -353,8 +358,8 @@ static TCGv gen_muls_i64_i32(TCGv a, TCGv b)
/* Unsigned 32x32->64 multiply. */
static void gen_op_mull_T0_T1(void)
{
TCGv tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv_i64 tmp1 = tcg_temp_new_i64();
TCGv_i64 tmp2 = tcg_temp_new_i64();
tcg_gen_extu_i32_i64(tmp1, cpu_T[0]);
tcg_gen_extu_i32_i64(tmp2, cpu_T[1]);
@ -367,8 +372,8 @@ static void gen_op_mull_T0_T1(void)
/* Signed 32x32->64 multiply. */
static void gen_imull(TCGv a, TCGv b)
{
TCGv tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv_i64 tmp1 = tcg_temp_new_i64();
TCGv_i64 tmp2 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp1, a);
tcg_gen_ext_i32_i64(tmp2, b);
@ -580,17 +585,17 @@ static inline void gen_arm_shift_reg(TCGv var, int shiftop,
}
static void gen_arm_parallel_addsub(int op1, int op2, TCGv a, TCGv b)
{
TCGv tmp;
TCGv_ptr tmp;
switch (op1) {
#define gen_pas_helper(name) glue(gen_helper_,name)(a, a, b, tmp)
case 1:
tmp = tcg_temp_new(TCG_TYPE_PTR);
tmp = tcg_temp_new_ptr();
tcg_gen_addi_ptr(tmp, cpu_env, offsetof(CPUState, GE));
PAS_OP(s)
break;
case 5:
tmp = tcg_temp_new(TCG_TYPE_PTR);
tmp = tcg_temp_new_ptr();
tcg_gen_addi_ptr(tmp, cpu_env, offsetof(CPUState, GE));
PAS_OP(u)
break;
@ -625,17 +630,17 @@ static void gen_arm_parallel_addsub(int op1, int op2, TCGv a, TCGv b)
}
static void gen_thumb2_parallel_addsub(int op1, int op2, TCGv a, TCGv b)
{
TCGv tmp;
TCGv_ptr tmp;
switch (op1) {
#define gen_pas_helper(name) glue(gen_helper_,name)(a, a, b, tmp)
case 0:
tmp = tcg_temp_new(TCG_TYPE_PTR);
tmp = tcg_temp_new_ptr();
tcg_gen_addi_ptr(tmp, cpu_env, offsetof(CPUState, GE));
PAS_OP(s)
break;
case 4:
tmp = tcg_temp_new(TCG_TYPE_PTR);
tmp = tcg_temp_new_ptr();
tcg_gen_addi_ptr(tmp, cpu_env, offsetof(CPUState, GE));
PAS_OP(u)
break;
@ -1181,12 +1186,12 @@ static void neon_store_reg(int reg, int pass, TCGv var)
dead_tmp(var);
}
static inline void neon_load_reg64(TCGv var, int reg)
static inline void neon_load_reg64(TCGv_i64 var, int reg)
{
tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(1, reg));
}
static inline void neon_store_reg64(TCGv var, int reg)
static inline void neon_store_reg64(TCGv_i64 var, int reg)
{
tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(1, reg));
}
@ -1222,12 +1227,12 @@ static inline void gen_mov_vreg_F0(int dp, int reg)
#define ARM_CP_RW_BIT (1 << 20)
static inline void iwmmxt_load_reg(TCGv var, int reg)
static inline void iwmmxt_load_reg(TCGv_i64 var, int reg)
{
tcg_gen_ld_i64(var, cpu_env, offsetof(CPUState, iwmmxt.regs[reg]));
}
static inline void iwmmxt_store_reg(TCGv var, int reg)
static inline void iwmmxt_store_reg(TCGv_i64 var, int reg)
{
tcg_gen_st_i64(var, cpu_env, offsetof(CPUState, iwmmxt.regs[reg]));
}
@ -3907,7 +3912,7 @@ static void gen_neon_bsl(TCGv dest, TCGv t, TCGv f, TCGv c)
tcg_gen_or_i32(dest, t, f);
}
static inline void gen_neon_narrow(int size, TCGv dest, TCGv src)
static inline void gen_neon_narrow(int size, TCGv dest, TCGv_i64 src)
{
switch (size) {
case 0: gen_helper_neon_narrow_u8(dest, src); break;
@ -3917,7 +3922,7 @@ static inline void gen_neon_narrow(int size, TCGv dest, TCGv src)
}
}
static inline void gen_neon_narrow_sats(int size, TCGv dest, TCGv src)
static inline void gen_neon_narrow_sats(int size, TCGv dest, TCGv_i64 src)
{
switch (size) {
case 0: gen_helper_neon_narrow_sat_s8(dest, cpu_env, src); break;
@ -3927,7 +3932,7 @@ static inline void gen_neon_narrow_sats(int size, TCGv dest, TCGv src)
}
}
static inline void gen_neon_narrow_satu(int size, TCGv dest, TCGv src)
static inline void gen_neon_narrow_satu(int size, TCGv dest, TCGv_i64 src)
{
switch (size) {
case 0: gen_helper_neon_narrow_sat_u8(dest, cpu_env, src); break;
@ -3971,7 +3976,7 @@ static inline void gen_neon_shift_narrow(int size, TCGv var, TCGv shift,
}
}
static inline void gen_neon_widen(TCGv dest, TCGv src, int size, int u)
static inline void gen_neon_widen(TCGv_i64 dest, TCGv src, int size, int u)
{
if (u) {
switch (size) {
@ -4011,7 +4016,7 @@ static inline void gen_neon_subl(int size)
}
}
static inline void gen_neon_negl(TCGv var, int size)
static inline void gen_neon_negl(TCGv_i64 var, int size)
{
switch (size) {
case 0: gen_helper_neon_negl_u16(var, var); break;
@ -4021,7 +4026,7 @@ static inline void gen_neon_negl(TCGv var, int size)
}
}
static inline void gen_neon_addl_saturate(TCGv op0, TCGv op1, int size)
static inline void gen_neon_addl_saturate(TCGv_i64 op0, TCGv_i64 op1, int size)
{
switch (size) {
case 1: gen_helper_neon_addl_saturate_s32(op0, cpu_env, op0, op1); break;
@ -4030,9 +4035,9 @@ static inline void gen_neon_addl_saturate(TCGv op0, TCGv op1, int size)
}
}
static inline void gen_neon_mull(TCGv dest, TCGv a, TCGv b, int size, int u)
static inline void gen_neon_mull(TCGv_i64 dest, TCGv a, TCGv b, int size, int u)
{
TCGv tmp;
TCGv_i64 tmp;
switch ((size << 1) | u) {
case 0: gen_helper_neon_mull_s8(dest, a, b); break;
@ -4076,6 +4081,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
TCGv tmp;
TCGv tmp2;
TCGv tmp3;
TCGv_i64 tmp64;
if (!vfp_enabled(env))
return 1;
@ -4632,12 +4638,15 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
imm = (uint16_t)shift;
imm |= imm << 16;
tmp2 = tcg_const_i32(imm);
TCGV_UNUSED_I64(tmp64);
break;
case 2:
imm = (uint32_t)shift;
tmp2 = tcg_const_i32(imm);
TCGV_UNUSED_I64(tmp64);
case 3:
tmp2 = tcg_const_i64(shift);
tmp64 = tcg_const_i64(shift);
TCGV_UNUSED(tmp2);
break;
default:
abort();
@ -4648,14 +4657,14 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
neon_load_reg64(cpu_V0, rm + pass);
if (q) {
if (u)
gen_helper_neon_rshl_u64(cpu_V0, cpu_V0, tmp2);
gen_helper_neon_rshl_u64(cpu_V0, cpu_V0, tmp64);
else
gen_helper_neon_rshl_s64(cpu_V0, cpu_V0, tmp2);
gen_helper_neon_rshl_s64(cpu_V0, cpu_V0, tmp64);
} else {
if (u)
gen_helper_neon_shl_u64(cpu_V0, cpu_V0, tmp2);
gen_helper_neon_shl_u64(cpu_V0, cpu_V0, tmp64);
else
gen_helper_neon_shl_s64(cpu_V0, cpu_V0, tmp2);
gen_helper_neon_shl_s64(cpu_V0, cpu_V0, tmp64);
}
} else {
tmp = neon_load_reg(rm + pass, 0);
@ -5130,16 +5139,16 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
neon_load_reg64(cpu_V1, rm);
}
} else if (q) {
tmp = tcg_temp_new(TCG_TYPE_I64);
tmp64 = tcg_temp_new_i64();
if (imm < 8) {
neon_load_reg64(cpu_V0, rn);
neon_load_reg64(tmp, rn + 1);
neon_load_reg64(tmp64, rn + 1);
} else {
neon_load_reg64(cpu_V0, rn + 1);
neon_load_reg64(tmp, rm);
neon_load_reg64(tmp64, rm);
}
tcg_gen_shri_i64(cpu_V0, cpu_V0, (imm & 7) * 8);
tcg_gen_shli_i64(cpu_V1, tmp, 64 - ((imm & 7) * 8));
tcg_gen_shli_i64(cpu_V1, tmp64, 64 - ((imm & 7) * 8));
tcg_gen_or_i64(cpu_V0, cpu_V0, cpu_V1);
if (imm < 8) {
neon_load_reg64(cpu_V1, rm);
@ -5148,13 +5157,14 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
imm -= 8;
}
tcg_gen_shli_i64(cpu_V1, cpu_V1, 64 - (imm * 8));
tcg_gen_shri_i64(tmp, tmp, imm * 8);
tcg_gen_or_i64(cpu_V1, cpu_V1, tmp);
tcg_gen_shri_i64(tmp64, tmp64, imm * 8);
tcg_gen_or_i64(cpu_V1, cpu_V1, tmp64);
} else {
/* BUGFIX */
neon_load_reg64(cpu_V0, rn);
tcg_gen_shri_i32(cpu_V0, cpu_V0, imm * 8);
tcg_gen_shri_i64(cpu_V0, cpu_V0, imm * 8);
neon_load_reg64(cpu_V1, rm);
tcg_gen_shli_i32(cpu_V1, cpu_V1, 64 - (imm * 8));
tcg_gen_shli_i64(cpu_V1, cpu_V1, 64 - (imm * 8));
tcg_gen_or_i64(cpu_V0, cpu_V0, cpu_V1);
}
neon_store_reg64(cpu_V0, rd);
@ -5578,7 +5588,7 @@ static int disas_coproc_insn(CPUState * env, DisasContext *s, uint32_t insn)
/* Store a 64-bit value to a register pair. Clobbers val. */
static void gen_storeq_reg(DisasContext *s, int rlow, int rhigh, TCGv val)
static void gen_storeq_reg(DisasContext *s, int rlow, int rhigh, TCGv_i64 val)
{
TCGv tmp;
tmp = new_tmp();
@ -5591,13 +5601,13 @@ static void gen_storeq_reg(DisasContext *s, int rlow, int rhigh, TCGv val)
}
/* load a 32-bit value from a register and perform a 64-bit accumulate. */
static void gen_addq_lo(DisasContext *s, TCGv val, int rlow)
static void gen_addq_lo(DisasContext *s, TCGv_i64 val, int rlow)
{
TCGv tmp;
TCGv_i64 tmp;
TCGv tmp2;
/* Load value and extend to 64 bits. */
tmp = tcg_temp_new(TCG_TYPE_I64);
tmp = tcg_temp_new_i64();
tmp2 = load_reg(s, rlow);
tcg_gen_extu_i32_i64(tmp, tmp2);
dead_tmp(tmp2);
@ -5605,16 +5615,16 @@ static void gen_addq_lo(DisasContext *s, TCGv val, int rlow)
}
/* load and add a 64-bit value from a register pair. */
static void gen_addq(DisasContext *s, TCGv val, int rlow, int rhigh)
static void gen_addq(DisasContext *s, TCGv_i64 val, int rlow, int rhigh)
{
TCGv tmp;
TCGv_i64 tmp;
TCGv tmpl;
TCGv tmph;
/* Load 64-bit value rd:rn. */
tmpl = load_reg(s, rlow);
tmph = load_reg(s, rhigh);
tmp = tcg_temp_new(TCG_TYPE_I64);
tmp = tcg_temp_new_i64();
tcg_gen_concat_i32_i64(tmp, tmpl, tmph);
dead_tmp(tmpl);
dead_tmp(tmph);
@ -5622,7 +5632,7 @@ static void gen_addq(DisasContext *s, TCGv val, int rlow, int rhigh)
}
/* Set N and Z flags from a 64-bit value. */
static void gen_logicq_cc(TCGv val)
static void gen_logicq_cc(TCGv_i64 val)
{
TCGv tmp = new_tmp();
gen_helper_logicq_cc(tmp, val);
@ -5637,6 +5647,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
TCGv tmp2;
TCGv tmp3;
TCGv addr;
TCGv_i64 tmp64;
insn = ldl_code(s->pc);
s->pc += 4;
@ -5971,10 +5982,10 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
tcg_gen_sari_i32(tmp2, tmp2, 16);
else
gen_sxth(tmp2);
tmp2 = gen_muls_i64_i32(tmp, tmp2);
tcg_gen_shri_i64(tmp2, tmp2, 16);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
tcg_gen_shri_i64(tmp64, tmp64, 16);
tmp = new_tmp();
tcg_gen_trunc_i64_i32(tmp, tmp2);
tcg_gen_trunc_i64_i32(tmp, tmp64);
if ((sh & 2) == 0) {
tmp2 = load_reg(s, rn);
gen_helper_add_setq(tmp, tmp, tmp2);
@ -5988,11 +5999,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
gen_mulxy(tmp, tmp2, sh & 2, sh & 4);
dead_tmp(tmp2);
if (op1 == 2) {
tmp2 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext_i32_i64(tmp2, tmp);
tmp64 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp64, tmp);
dead_tmp(tmp);
gen_addq(s, tmp2, rn, rd);
gen_storeq_reg(s, rn, rd, tmp2);
gen_addq(s, tmp64, rn, rd);
gen_storeq_reg(s, rn, rd, tmp64);
} else {
if (op1 == 0) {
tmp2 = load_reg(s, rn);
@ -6205,19 +6216,19 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
tmp = load_reg(s, rs);
tmp2 = load_reg(s, rm);
if (insn & (1 << 22))
tmp = gen_muls_i64_i32(tmp, tmp2);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
else
tmp = gen_mulu_i64_i32(tmp, tmp2);
tmp64 = gen_mulu_i64_i32(tmp, tmp2);
if (insn & (1 << 21)) /* mult accumulate */
gen_addq(s, tmp, rn, rd);
gen_addq(s, tmp64, rn, rd);
if (!(insn & (1 << 23))) { /* double accumulate */
ARCH(6);
gen_addq_lo(s, tmp, rn);
gen_addq_lo(s, tmp, rd);
gen_addq_lo(s, tmp64, rn);
gen_addq_lo(s, tmp64, rd);
}
if (insn & (1 << 20))
gen_logicq_cc(tmp);
gen_storeq_reg(s, rn, rd, tmp);
gen_logicq_cc(tmp64);
gen_storeq_reg(s, rn, rd, tmp64);
break;
}
} else {
@ -6515,12 +6526,12 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
tmp2 = load_reg(s, rs);
if (insn & (1 << 20)) {
/* Signed multiply most significant [accumulate]. */
tmp2 = gen_muls_i64_i32(tmp, tmp2);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
if (insn & (1 << 5))
tcg_gen_addi_i64(tmp2, tmp2, 0x80000000u);
tcg_gen_shri_i64(tmp2, tmp2, 32);
tcg_gen_addi_i64(tmp64, tmp64, 0x80000000u);
tcg_gen_shri_i64(tmp64, tmp64, 32);
tmp = new_tmp();
tcg_gen_trunc_i64_i32(tmp, tmp2);
tcg_gen_trunc_i64_i32(tmp, tmp64);
if (rn != 15) {
tmp2 = load_reg(s, rn);
if (insn & (1 << 6)) {
@ -6544,11 +6555,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
dead_tmp(tmp2);
if (insn & (1 << 22)) {
/* smlald, smlsld */
tmp2 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext_i32_i64(tmp2, tmp);
tmp64 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp64, tmp);
dead_tmp(tmp);
gen_addq(s, tmp2, rd, rn);
gen_storeq_reg(s, rd, rn, tmp2);
gen_addq(s, tmp64, rd, rn);
gen_storeq_reg(s, rd, rn, tmp64);
} else {
/* smuad, smusd, smlad, smlsd */
if (rd != 15)
@ -6917,6 +6928,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
TCGv tmp2;
TCGv tmp3;
TCGv addr;
TCGv_i64 tmp64;
int op;
int shiftop;
int conds;
@ -7393,10 +7405,10 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
tcg_gen_sari_i32(tmp2, tmp2, 16);
else
gen_sxth(tmp2);
tmp2 = gen_muls_i64_i32(tmp, tmp2);
tcg_gen_shri_i64(tmp2, tmp2, 16);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
tcg_gen_shri_i64(tmp64, tmp64, 16);
tmp = new_tmp();
tcg_gen_trunc_i64_i32(tmp, tmp2);
tcg_gen_trunc_i64_i32(tmp, tmp64);
if (rs != 15)
{
tmp2 = load_reg(s, rs);
@ -7460,36 +7472,38 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
tcg_gen_add_i32(tmp, tmp, tmp2);
}
dead_tmp(tmp2);
tmp2 = tcg_temp_new(TCG_TYPE_I64);
gen_addq(s, tmp, rs, rd);
gen_storeq_reg(s, rs, rd, tmp);
/* BUGFIX */
tmp64 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp64, tmp);
dead_tmp(tmp);
gen_addq(s, tmp64, rs, rd);
gen_storeq_reg(s, rs, rd, tmp64);
} else {
if (op & 0x20) {
/* Unsigned 64-bit multiply */
tmp = gen_mulu_i64_i32(tmp, tmp2);
tmp64 = gen_mulu_i64_i32(tmp, tmp2);
} else {
if (op & 8) {
/* smlalxy */
gen_mulxy(tmp, tmp2, op & 2, op & 1);
dead_tmp(tmp2);
tmp2 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext_i32_i64(tmp2, tmp);
tmp64 = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(tmp64, tmp);
dead_tmp(tmp);
tmp = tmp2;
} else {
/* Signed 64-bit multiply */
tmp = gen_muls_i64_i32(tmp, tmp2);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
}
}
if (op & 4) {
/* umaal */
gen_addq_lo(s, tmp, rs);
gen_addq_lo(s, tmp, rd);
gen_addq_lo(s, tmp64, rs);
gen_addq_lo(s, tmp64, rd);
} else if (op & 0x40) {
/* 64-bit accumulate. */
gen_addq(s, tmp, rs, rd);
gen_addq(s, tmp64, rs, rd);
}
gen_storeq_reg(s, rs, rd, tmp);
gen_storeq_reg(s, rs, rd, tmp64);
}
break;
}
@ -8618,14 +8632,14 @@ static inline void gen_intermediate_code_internal(CPUState *env,
dc->user = (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_USR;
}
#endif
cpu_F0s = tcg_temp_new(TCG_TYPE_I32);
cpu_F1s = tcg_temp_new(TCG_TYPE_I32);
cpu_F0d = tcg_temp_new(TCG_TYPE_I64);
cpu_F1d = tcg_temp_new(TCG_TYPE_I64);
cpu_F0s = tcg_temp_new_i32();
cpu_F1s = tcg_temp_new_i32();
cpu_F0d = tcg_temp_new_i64();
cpu_F1d = tcg_temp_new_i64();
cpu_V0 = cpu_F0d;
cpu_V1 = cpu_F1d;
/* FIXME: cpu_M0 can probably be the same as cpu_V0. */
cpu_M0 = tcg_temp_new(TCG_TYPE_I64);
cpu_M0 = tcg_temp_new_i64();
next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
lj = -1;
num_insns = 0;

36
target-cris/helper.h
View File

@ -1,20 +1,22 @@
#define TCG_HELPER_PROTO
#include "def-helper.h"
void TCG_HELPER_PROTO helper_raise_exception(uint32_t index);
void TCG_HELPER_PROTO helper_tlb_flush_pid(uint32_t pid);
void TCG_HELPER_PROTO helper_spc_write(uint32_t pid);
void TCG_HELPER_PROTO helper_dump(uint32_t a0, uint32_t a1, uint32_t a2);
void TCG_HELPER_PROTO helper_rfe(void);
void TCG_HELPER_PROTO helper_rfn(void);
DEF_HELPER_1(raise_exception, void, i32)
DEF_HELPER_1(tlb_flush_pid, void, i32)
DEF_HELPER_1(spc_write, void, i32)
DEF_HELPER_3(dump, void, i32, i32, i32)
DEF_HELPER_0(rfe, void);
DEF_HELPER_0(rfn, void);
void TCG_HELPER_PROTO helper_movl_sreg_reg (uint32_t sreg, uint32_t reg);
void TCG_HELPER_PROTO helper_movl_reg_sreg (uint32_t reg, uint32_t sreg);
DEF_HELPER_2(movl_sreg_reg, void, i32, i32)
DEF_HELPER_2(movl_reg_sreg, void, i32, i32)
void TCG_HELPER_PROTO helper_evaluate_flags_muls(void);
void TCG_HELPER_PROTO helper_evaluate_flags_mulu(void);
void TCG_HELPER_PROTO helper_evaluate_flags_mcp(void);
void TCG_HELPER_PROTO helper_evaluate_flags_alu_4(void);
void TCG_HELPER_PROTO helper_evaluate_flags_move_4 (void);
void TCG_HELPER_PROTO helper_evaluate_flags_move_2 (void);
void TCG_HELPER_PROTO helper_evaluate_flags (void);
void TCG_HELPER_PROTO helper_top_evaluate_flags(void);
DEF_HELPER_0(evaluate_flags_muls, void)
DEF_HELPER_0(evaluate_flags_mulu, void)
DEF_HELPER_0(evaluate_flags_mcp, void)
DEF_HELPER_0(evaluate_flags_alu_4, void)
DEF_HELPER_0(evaluate_flags_move_4, void)
DEF_HELPER_0(evaluate_flags_move_2, void)
DEF_HELPER_0(evaluate_flags, void)
DEF_HELPER_0(top_evaluate_flags, void)
#include "def-helper.h"

270
target-cris/translate.c
View File

@ -39,6 +39,9 @@
#include "crisv32-decode.h"
#include "qemu-common.h"
#define GEN_HELPER 1
#include "helper.h"
#define DISAS_CRIS 0
#if DISAS_CRIS
#define DIS(x) if (loglevel & CPU_LOG_TB_IN_ASM) x
@ -61,7 +64,7 @@
#define CC_MASK_NZVC 0xf
#define CC_MASK_RNZV 0x10e
static TCGv cpu_env;
static TCGv_ptr cpu_env;
static TCGv cpu_R[16];
static TCGv cpu_PR[16];
static TCGv cc_x;
@ -212,9 +215,9 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn)
tcg_gen_andi_tl(cpu_PR[r], tn, 3);
else {
if (r == PR_PID)
tcg_gen_helper_0_1(helper_tlb_flush_pid, tn);
gen_helper_tlb_flush_pid(tn);
if (dc->tb_flags & S_FLAG && r == PR_SPC)
tcg_gen_helper_0_1(helper_spc_write, tn);
gen_helper_spc_write(tn);
else if (r == PR_CCS)
dc->cpustate_changed = 1;
tcg_gen_mov_tl(cpu_PR[r], tn);
@ -223,14 +226,16 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn)
static inline void t_gen_raise_exception(uint32_t index)
{
tcg_gen_helper_0_1(helper_raise_exception, tcg_const_tl(index));
TCGv_i32 tmp = tcg_const_i32(index);
gen_helper_raise_exception(tmp);
tcg_temp_free_i32(tmp);
}
static void t_gen_lsl(TCGv d, TCGv a, TCGv b)
{
TCGv t0, t_31;
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
t_31 = tcg_const_tl(31);
tcg_gen_shl_tl(d, a, b);
@ -246,8 +251,8 @@ static void t_gen_lsr(TCGv d, TCGv a, TCGv b)
{
TCGv t0, t_31;
t0 = tcg_temp_new(TCG_TYPE_TL);
t_31 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
t_31 = tcg_temp_new();
tcg_gen_shr_tl(d, a, b);
tcg_gen_movi_tl(t_31, 31);
@ -263,8 +268,8 @@ static void t_gen_asr(TCGv d, TCGv a, TCGv b)
{
TCGv t0, t_31;
t0 = tcg_temp_new(TCG_TYPE_TL);
t_31 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
t_31 = tcg_temp_new();
tcg_gen_sar_tl(d, a, b);
tcg_gen_movi_tl(t_31, 31);
@ -278,30 +283,30 @@ static void t_gen_asr(TCGv d, TCGv a, TCGv b)
/* 64-bit signed mul, lower result in d and upper in d2. */
static void t_gen_muls(TCGv d, TCGv d2, TCGv a, TCGv b)
{
TCGv t0, t1;
TCGv_i64 t0, t1;
t0 = tcg_temp_new(TCG_TYPE_I64);
t1 = tcg_temp_new(TCG_TYPE_I64);
t0 = tcg_temp_new_i64();
t1 = tcg_temp_new_i64();
tcg_gen_ext32s_i64(t0, a);
tcg_gen_ext32s_i64(t1, b);
tcg_gen_ext_i32_i64(t0, a);
tcg_gen_ext_i32_i64(t1, b);
tcg_gen_mul_i64(t0, t0, t1);
tcg_gen_trunc_i64_i32(d, t0);
tcg_gen_shri_i64(t0, t0, 32);
tcg_gen_trunc_i64_i32(d2, t0);
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
}
/* 64-bit unsigned muls, lower result in d and upper in d2. */
static void t_gen_mulu(TCGv d, TCGv d2, TCGv a, TCGv b)
{
TCGv t0, t1;
TCGv_i64 t0, t1;
t0 = tcg_temp_new(TCG_TYPE_I64);
t1 = tcg_temp_new(TCG_TYPE_I64);
t0 = tcg_temp_new_i64();
t1 = tcg_temp_new_i64();
tcg_gen_extu_i32_i64(t0, a);
tcg_gen_extu_i32_i64(t1, b);
@ -311,18 +316,18 @@ static void t_gen_mulu(TCGv d, TCGv d2, TCGv a, TCGv b)
tcg_gen_shri_i64(t0, t0, 32);
tcg_gen_trunc_i64_i32(d2, t0);
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
}
/* 32bit branch-free binary search for counting leading zeros. */
static void t_gen_lz_i32(TCGv d, TCGv x)
{
TCGv y, m, n;
TCGv_i32 y, m, n;
y = tcg_temp_new(TCG_TYPE_I32);
m = tcg_temp_new(TCG_TYPE_I32);
n = tcg_temp_new(TCG_TYPE_I32);
y = tcg_temp_new_i32();
m = tcg_temp_new_i32();
n = tcg_temp_new_i32();
/* y = -(x >> 16) */
tcg_gen_shri_i32(y, x, 16);
@ -413,9 +418,9 @@ static void t_gen_btst(TCGv d, TCGv a, TCGv b)
*/
l1 = gen_new_label();
sbit = tcg_temp_new(TCG_TYPE_TL);
bset = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new(TCG_TYPE_TL);
sbit = tcg_temp_new();
bset = tcg_temp_new();
t0 = tcg_temp_new();
/* Compute bset and sbit. */
tcg_gen_andi_tl(sbit, b, 31);
@ -463,7 +468,7 @@ static inline void t_gen_add_flag(TCGv d, int flag)
{
TCGv c;
c = tcg_temp_new(TCG_TYPE_TL);
c = tcg_temp_new();
t_gen_mov_TN_preg(c, PR_CCS);
/* Propagate carry into d. */
tcg_gen_andi_tl(c, c, 1 << flag);
@ -479,7 +484,7 @@ static inline void t_gen_addx_carry(DisasContext *dc, TCGv d)
if (dc->flags_x) {
TCGv c;
c = tcg_temp_new(TCG_TYPE_TL);
c = tcg_temp_new();
t_gen_mov_TN_preg(c, PR_CCS);
/* C flag is already at bit 0. */
tcg_gen_andi_tl(c, c, C_FLAG);
@ -489,8 +494,8 @@ static inline void t_gen_addx_carry(DisasContext *dc, TCGv d)
} else {
TCGv x, c;
x = tcg_temp_new(TCG_TYPE_TL);
c = tcg_temp_new(TCG_TYPE_TL);
x = tcg_temp_new();
c = tcg_temp_new();
t_gen_mov_TN_preg(x, PR_CCS);
tcg_gen_mov_tl(c, x);
@ -512,7 +517,7 @@ static inline void t_gen_subx_carry(DisasContext *dc, TCGv d)
if (dc->flags_x) {
TCGv c;
c = tcg_temp_new(TCG_TYPE_TL);
c = tcg_temp_new();
t_gen_mov_TN_preg(c, PR_CCS);
/* C flag is already at bit 0. */
tcg_gen_andi_tl(c, c, C_FLAG);
@ -522,8 +527,8 @@ static inline void t_gen_subx_carry(DisasContext *dc, TCGv d)
} else {
TCGv x, c;
x = tcg_temp_new(TCG_TYPE_TL);
c = tcg_temp_new(TCG_TYPE_TL);
x = tcg_temp_new();
c = tcg_temp_new();
t_gen_mov_TN_preg(x, PR_CCS);
tcg_gen_mov_tl(c, x);
@ -545,8 +550,8 @@ static inline void t_gen_swapb(TCGv d, TCGv s)
{
TCGv t, org_s;
t = tcg_temp_new(TCG_TYPE_TL);
org_s = tcg_temp_new(TCG_TYPE_TL);
t = tcg_temp_new();
org_s = tcg_temp_new();
/* d and s may refer to the same object. */
tcg_gen_mov_tl(org_s, s);
@ -564,7 +569,7 @@ static inline void t_gen_swapw(TCGv d, TCGv s)
{
TCGv t;
/* d and s refer the same object. */
t = tcg_temp_new(TCG_TYPE_TL);
t = tcg_temp_new();
tcg_gen_mov_tl(t, s);
tcg_gen_shli_tl(d, t, 16);
tcg_gen_shri_tl(t, t, 16);
@ -601,8 +606,8 @@ static inline void t_gen_swapr(TCGv d, TCGv s)
TCGv t, org_s;
/* d and s refer the same object. */
t = tcg_temp_new(TCG_TYPE_TL);
org_s = tcg_temp_new(TCG_TYPE_TL);
t = tcg_temp_new();
org_s = tcg_temp_new();
tcg_gen_mov_tl(org_s, s);
tcg_gen_shli_tl(t, org_s, bitrev[0].shift);
@ -626,7 +631,7 @@ static void t_gen_cc_jmp(TCGv pc_true, TCGv pc_false)
int l1;
l1 = gen_new_label();
btaken = tcg_temp_new(TCG_TYPE_TL);
btaken = tcg_temp_new();
/* Conditional jmp. */
tcg_gen_mov_tl(btaken, env_btaken);
@ -692,13 +697,13 @@ static void cris_evaluate_flags(DisasContext *dc)
switch (dc->cc_op)
{
case CC_OP_MCP:
tcg_gen_helper_0_0(helper_evaluate_flags_mcp);
gen_helper_evaluate_flags_mcp();
break;
case CC_OP_MULS:
tcg_gen_helper_0_0(helper_evaluate_flags_muls);
gen_helper_evaluate_flags_muls();
break;
case CC_OP_MULU:
tcg_gen_helper_0_0(helper_evaluate_flags_mulu);
gen_helper_evaluate_flags_mulu();
break;
case CC_OP_MOVE:
case CC_OP_AND:
@ -710,13 +715,13 @@ static void cris_evaluate_flags(DisasContext *dc)
switch (dc->cc_size)
{
case 4:
tcg_gen_helper_0_0(helper_evaluate_flags_move_4);
gen_helper_evaluate_flags_move_4();
break;
case 2:
tcg_gen_helper_0_0(helper_evaluate_flags_move_2);
gen_helper_evaluate_flags_move_2();
break;
default:
tcg_gen_helper_0_0(helper_evaluate_flags);
gen_helper_evaluate_flags();
break;
}
break;
@ -728,10 +733,10 @@ static void cris_evaluate_flags(DisasContext *dc)
switch (dc->cc_size)
{
case 4:
tcg_gen_helper_0_0(helper_evaluate_flags_alu_4);
gen_helper_evaluate_flags_alu_4();
break;
default:
tcg_gen_helper_0_0(helper_evaluate_flags);
gen_helper_evaluate_flags();
break;
}
}
@ -927,16 +932,16 @@ static void cris_alu(DisasContext *dc, int op,
writeback = 1;
if (op == CC_OP_BOUND || op == CC_OP_BTST)
tmp = tcg_temp_local_new(TCG_TYPE_TL);
tmp = tcg_temp_local_new();
if (op == CC_OP_CMP) {
tmp = tcg_temp_new(TCG_TYPE_TL);
tmp = tcg_temp_new();
writeback = 0;
} else if (size == 4) {
tmp = d;
writeback = 0;
} else
tmp = tcg_temp_new(TCG_TYPE_TL);
tmp = tcg_temp_new();
cris_pre_alu_update_cc(dc, op, op_a, op_b, size);
@ -951,7 +956,7 @@ static void cris_alu(DisasContext *dc, int op,
tcg_gen_andi_tl(d, d, ~0xffff);
tcg_gen_or_tl(d, d, tmp);
}
if (GET_TCGV(tmp) != GET_TCGV(d))
if (!TCGV_EQUAL(tmp, d))
tcg_temp_free(tmp);
}
@ -1088,7 +1093,7 @@ static void gen_tst_cc (DisasContext *dc, TCGv cc, int cond)
{
TCGv tmp;
tmp = tcg_temp_new(TCG_TYPE_TL);
tmp = tcg_temp_new();
tcg_gen_xori_tl(tmp, cpu_PR[PR_CCS],
C_FLAG | Z_FLAG);
/* Overlay the C flag on top of the Z. */
@ -1121,8 +1126,8 @@ static void gen_tst_cc (DisasContext *dc, TCGv cc, int cond)
{
TCGv n, z;
n = tcg_temp_new(TCG_TYPE_TL);
z = tcg_temp_new(TCG_TYPE_TL);
n = tcg_temp_new();
z = tcg_temp_new();
/* To avoid a shift we overlay everything on
the V flag. */
@ -1145,8 +1150,8 @@ static void gen_tst_cc (DisasContext *dc, TCGv cc, int cond)
{
TCGv n, z;
n = tcg_temp_new(TCG_TYPE_TL);
z = tcg_temp_new(TCG_TYPE_TL);
n = tcg_temp_new();
z = tcg_temp_new();
/* To avoid a shift we overlay everything on
the V flag. */
@ -1215,6 +1220,18 @@ static inline void cris_prepare_jmp (DisasContext *dc, unsigned int type)
tcg_gen_movi_tl(env_btaken, 1);
}
static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr)
{
int mem_index = cpu_mmu_index(dc->env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
if (dc->delayed_branch == 1)
cris_store_direct_jmp(dc);
tcg_gen_qemu_ld64(dst, addr, mem_index);
}
static void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
unsigned int size, int sign)
{
@ -1240,8 +1257,8 @@ static void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
else if (size == 4) {
tcg_gen_qemu_ld32u(dst, addr, mem_index);
}
else if (size == 8) {
tcg_gen_qemu_ld64(dst, addr, mem_index);
else {
abort();
}
}
@ -1284,7 +1301,7 @@ static inline void t_gen_sext(TCGv d, TCGv s, int size)
tcg_gen_ext8s_i32(d, s);
else if (size == 2)
tcg_gen_ext16s_i32(d, s);
else if(GET_TCGV(d) != GET_TCGV(s))
else if(!TCGV_EQUAL(d, s))
tcg_gen_mov_tl(d, s);
}
@ -1294,7 +1311,7 @@ static inline void t_gen_zext(TCGv d, TCGv s, int size)
tcg_gen_ext8u_i32(d, s);
else if (size == 2)
tcg_gen_ext16u_i32(d, s);
else if (GET_TCGV(d) != GET_TCGV(s))
else if (!TCGV_EQUAL(d, s))
tcg_gen_mov_tl(d, s);
}
@ -1546,7 +1563,7 @@ static unsigned int dec_btstq(DisasContext *dc)
DIS(fprintf (logfile, "btstq %u, $r%d\n", dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
l0 = tcg_temp_local_new(TCG_TYPE_TL);
l0 = tcg_temp_local_new();
cris_alu(dc, CC_OP_BTST,
l0, cpu_R[dc->op2], tcg_const_tl(dc->op1), 4);
cris_update_cc_op(dc, CC_OP_FLAGS, 4);
@ -1613,7 +1630,7 @@ static unsigned int dec_move_r(DisasContext *dc)
else {
TCGv t0;
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
dec_prep_move_r(dc, dc->op1, dc->op2, size, 0, t0);
cris_alu(dc, CC_OP_MOVE,
cpu_R[dc->op2],
@ -1653,8 +1670,8 @@ static inline void cris_alu_alloc_temps(DisasContext *dc, int size, TCGv *t)
t[0] = cpu_R[dc->op2];
t[1] = cpu_R[dc->op1];
} else {
t[0] = tcg_temp_new(TCG_TYPE_TL);
t[1] = tcg_temp_new(TCG_TYPE_TL);
t[0] = tcg_temp_new();
t[1] = tcg_temp_new();
}
}
@ -1689,7 +1706,7 @@ static unsigned int dec_lz_r(DisasContext *dc)
DIS(fprintf (logfile, "lz $r%u, $r%u\n",
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
dec_prep_alu_r(dc, dc->op1, dc->op2, 4, 0, cpu_R[dc->op2], t0);
cris_alu(dc, CC_OP_LZ, cpu_R[dc->op2], cpu_R[dc->op2], t0, 4);
tcg_temp_free(t0);
@ -1812,7 +1829,7 @@ static unsigned int dec_bound_r(DisasContext *dc)
DIS(fprintf (logfile, "bound.%c $r%u, $r%u\n",
memsize_char(size), dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
l0 = tcg_temp_local_new(TCG_TYPE_TL);
l0 = tcg_temp_local_new();
dec_prep_move_r(dc, dc->op1, dc->op2, size, 0, l0);
cris_alu(dc, CC_OP_BOUND, cpu_R[dc->op2], cpu_R[dc->op2], l0, 4);
tcg_temp_free(l0);
@ -1842,7 +1859,7 @@ static unsigned int dec_abs_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
tcg_gen_sari_tl(t0, cpu_R[dc->op1], 31);
tcg_gen_xor_tl(cpu_R[dc->op2], cpu_R[dc->op1], t0);
tcg_gen_sub_tl(cpu_R[dc->op2], cpu_R[dc->op2], t0);
@ -1916,7 +1933,7 @@ static unsigned int dec_swap_r(DisasContext *dc)
swapmode_name(dc->op2, modename), dc->op1));
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
t_gen_mov_TN_reg(t0, dc->op1);
if (dc->op2 & 8)
tcg_gen_not_tl(t0, t0);
@ -1952,7 +1969,7 @@ static unsigned int dec_addi_r(DisasContext *dc)
DIS(fprintf (logfile, "addi.%c $r%u, $r%u\n",
memsize_char(memsize_zz(dc)), dc->op2, dc->op1));
cris_cc_mask(dc, 0);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
tcg_gen_shl_tl(t0, cpu_R[dc->op2], tcg_const_tl(dc->zzsize));
tcg_gen_add_tl(cpu_R[dc->op1], cpu_R[dc->op1], t0);
tcg_temp_free(t0);
@ -1965,7 +1982,7 @@ static unsigned int dec_addi_acr(DisasContext *dc)
DIS(fprintf (logfile, "addi.%c $r%u, $r%u, $acr\n",
memsize_char(memsize_zz(dc)), dc->op2, dc->op1));
cris_cc_mask(dc, 0);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
tcg_gen_shl_tl(t0, cpu_R[dc->op2], tcg_const_tl(dc->zzsize));
tcg_gen_add_tl(cpu_R[R_ACR], cpu_R[dc->op1], t0);
tcg_temp_free(t0);
@ -1994,7 +2011,7 @@ static unsigned int dec_btst_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
l0 = tcg_temp_local_new(TCG_TYPE_TL);
l0 = tcg_temp_local_new();
cris_alu(dc, CC_OP_BTST, l0, cpu_R[dc->op2], cpu_R[dc->op1], 4);
cris_update_cc_op(dc, CC_OP_FLAGS, 4);
t_gen_mov_preg_TN(dc, PR_CCS, l0);
@ -2027,7 +2044,7 @@ static unsigned int dec_movu_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
dec_prep_move_r(dc, dc->op1, dc->op2, size, 0, t0);
cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], cpu_R[dc->op2], t0, 4);
tcg_temp_free(t0);
@ -2044,7 +2061,7 @@ static unsigned int dec_movs_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
/* Size can only be qi or hi. */
t_gen_sext(t0, cpu_R[dc->op1], size);
cris_alu(dc, CC_OP_MOVE,
@ -2063,7 +2080,7 @@ static unsigned int dec_addu_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
/* Size can only be qi or hi. */
t_gen_zext(t0, cpu_R[dc->op1], size);
cris_alu(dc, CC_OP_ADD,
@ -2082,7 +2099,7 @@ static unsigned int dec_adds_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
/* Size can only be qi or hi. */
t_gen_sext(t0, cpu_R[dc->op1], size);
cris_alu(dc, CC_OP_ADD,
@ -2101,7 +2118,7 @@ static unsigned int dec_subu_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
/* Size can only be qi or hi. */
t_gen_zext(t0, cpu_R[dc->op1], size);
cris_alu(dc, CC_OP_SUB,
@ -2120,7 +2137,7 @@ static unsigned int dec_subs_r(DisasContext *dc)
dc->op1, dc->op2));
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
/* Size can only be qi or hi. */
t_gen_sext(t0, cpu_R[dc->op1], size);
cris_alu(dc, CC_OP_SUB,
@ -2203,16 +2220,14 @@ static unsigned int dec_move_rs(DisasContext *dc)
{
DIS(fprintf (logfile, "move $r%u, $s%u\n", dc->op1, dc->op2));
cris_cc_mask(dc, 0);
tcg_gen_helper_0_2(helper_movl_sreg_reg,
tcg_const_tl(dc->op2), tcg_const_tl(dc->op1));
gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1));
return 2;
}
static unsigned int dec_move_sr(DisasContext *dc)
{
DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op2, dc->op1));
cris_cc_mask(dc, 0);
tcg_gen_helper_0_2(helper_movl_reg_sreg,
tcg_const_tl(dc->op1), tcg_const_tl(dc->op2));
gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2));
return 2;
}
@ -2222,12 +2237,12 @@ static unsigned int dec_move_rp(DisasContext *dc)
DIS(fprintf (logfile, "move $r%u, $p%u\n", dc->op1, dc->op2));
cris_cc_mask(dc, 0);
t[0] = tcg_temp_new(TCG_TYPE_TL);
t[0] = tcg_temp_new();
if (dc->op2 == PR_CCS) {
cris_evaluate_flags(dc);
t_gen_mov_TN_reg(t[0], dc->op1);
if (dc->tb_flags & U_FLAG) {
t[1] = tcg_temp_new(TCG_TYPE_TL);
t[1] = tcg_temp_new();
/* User space is not allowed to touch all flags. */
tcg_gen_andi_tl(t[0], t[0], 0x39f);
tcg_gen_andi_tl(t[1], cpu_PR[PR_CCS], ~0x39f);
@ -2255,7 +2270,7 @@ static unsigned int dec_move_pr(DisasContext *dc)
if (dc->op2 == PR_CCS)
cris_evaluate_flags(dc);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
t_gen_mov_TN_preg(t0, dc->op2);
cris_alu(dc, CC_OP_MOVE,
cpu_R[dc->op1], cpu_R[dc->op1], t0, preg_sizes[dc->op2]);
@ -2282,7 +2297,7 @@ static unsigned int dec_move_mr(DisasContext *dc)
else {
TCGv t0;
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
insn_len = dec_prep_move_m(dc, 0, memsize, t0);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu(dc, CC_OP_MOVE,
@ -2295,8 +2310,8 @@ static unsigned int dec_move_mr(DisasContext *dc)
static inline void cris_alu_m_alloc_temps(TCGv *t)
{
t[0] = tcg_temp_new(TCG_TYPE_TL);
t[1] = tcg_temp_new(TCG_TYPE_TL);
t[0] = tcg_temp_new();
t[1] = tcg_temp_new();
}
static inline void cris_alu_m_free_temps(TCGv *t)
@ -2580,8 +2595,8 @@ static unsigned int dec_bound_m(DisasContext *dc)
dc->op1, dc->postinc ? "+]" : "]",
dc->op2));
l[0] = tcg_temp_local_new(TCG_TYPE_TL);
l[1] = tcg_temp_local_new(TCG_TYPE_TL);
l[0] = tcg_temp_local_new();
l[1] = tcg_temp_local_new();
insn_len = dec_prep_alu_m(dc, 0, memsize, l[0], l[1]);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu(dc, CC_OP_BOUND, cpu_R[dc->op2], l[0], l[1], 4);
@ -2694,7 +2709,7 @@ static unsigned int dec_move_pm(DisasContext *dc)
/* prepare store. Address in T0, value in T1. */
if (dc->op2 == PR_CCS)
cris_evaluate_flags(dc);
t0 = tcg_temp_new(TCG_TYPE_TL);
t0 = tcg_temp_new();
t_gen_mov_TN_preg(t0, dc->op2);
cris_flush_cc_state(dc);
gen_store(dc, cpu_R[dc->op1], t0, memsize);
@ -2708,7 +2723,8 @@ static unsigned int dec_move_pm(DisasContext *dc)
static unsigned int dec_movem_mr(DisasContext *dc)
{
TCGv tmp[16];
TCGv_i64 tmp[16];
TCGv tmp32;
TCGv addr;
int i;
int nr = dc->op2 + 1;
@ -2716,18 +2732,18 @@ static unsigned int dec_movem_mr(DisasContext *dc)
DIS(fprintf (logfile, "movem [$r%u%s, $r%u\n", dc->op1,
dc->postinc ? "+]" : "]", dc->op2));
addr = tcg_temp_new(TCG_TYPE_TL);
addr = tcg_temp_new();
/* There are probably better ways of doing this. */
cris_flush_cc_state(dc);
for (i = 0; i < (nr >> 1); i++) {
tmp[i] = tcg_temp_new(TCG_TYPE_I64);
tmp[i] = tcg_temp_new_i64();
tcg_gen_addi_tl(addr, cpu_R[dc->op1], i * 8);
gen_load(dc, tmp[i], addr, 8, 0);
gen_load64(dc, tmp[i], addr);
}
if (nr & 1) {
tmp[i] = tcg_temp_new(TCG_TYPE_I32);
tmp32 = tcg_temp_new_i32();
tcg_gen_addi_tl(addr, cpu_R[dc->op1], i * 8);
gen_load(dc, tmp[i], addr, 4, 0);
gen_load(dc, tmp32, addr, 4, 0);
}
tcg_temp_free(addr);
@ -2735,11 +2751,11 @@ static unsigned int dec_movem_mr(DisasContext *dc)
tcg_gen_trunc_i64_i32(cpu_R[i * 2], tmp[i]);
tcg_gen_shri_i64(tmp[i], tmp[i], 32);
tcg_gen_trunc_i64_i32(cpu_R[i * 2 + 1], tmp[i]);
tcg_temp_free(tmp[i]);
tcg_temp_free_i64(tmp[i]);
}
if (nr & 1) {
tcg_gen_mov_tl(cpu_R[dc->op2], tmp[i]);
tcg_temp_free(tmp[i]);
tcg_gen_mov_tl(cpu_R[dc->op2], tmp32);
tcg_temp_free(tmp32);
}
/* writeback the updated pointer value. */
@ -2762,8 +2778,8 @@ static unsigned int dec_movem_rm(DisasContext *dc)
cris_flush_cc_state(dc);
tmp = tcg_temp_new(TCG_TYPE_TL);
addr = tcg_temp_new(TCG_TYPE_TL);
tmp = tcg_temp_new();
addr = tcg_temp_new();
tcg_gen_movi_tl(tmp, 4);
tcg_gen_mov_tl(addr, cpu_R[dc->op1]);
for (i = 0; i <= dc->op2; i++) {
@ -2960,14 +2976,14 @@ static unsigned int dec_rfe_etc(DisasContext *dc)
/* rfe. */
DIS(fprintf(logfile, "rfe\n"));
cris_evaluate_flags(dc);
tcg_gen_helper_0_0(helper_rfe);
gen_helper_rfe();
dc->is_jmp = DISAS_UPDATE;
break;
case 5:
/* rfn. */
DIS(fprintf(logfile, "rfn\n"));
cris_evaluate_flags(dc);
tcg_gen_helper_0_0(helper_rfn);
gen_helper_rfn();
dc->is_jmp = DISAS_UPDATE;
break;
case 6:
@ -3502,63 +3518,49 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
tcg_initialized = 1;
cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
cc_x = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
cc_x = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_x), "cc_x");
cc_src = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cc_src = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_src), "cc_src");
cc_dest = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cc_dest = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_dest),
"cc_dest");
cc_result = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cc_result = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_result),
"cc_result");
cc_op = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cc_op = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_op), "cc_op");
cc_size = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cc_size = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_size),
"cc_size");
cc_mask = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cc_mask = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, cc_mask),
"cc_mask");
env_pc = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
env_pc = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, pc),
"pc");
env_btarget = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
env_btarget = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, btarget),
"btarget");
env_btaken = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
env_btaken = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, btaken),
"btaken");
for (i = 0; i < 16; i++) {
cpu_R[i] = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, regs[i]),
regnames[i]);
}
for (i = 0; i < 16; i++) {
cpu_PR[i] = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUState, pregs[i]),
pregnames[i]);
}
TCG_HELPER(helper_raise_exception);
TCG_HELPER(helper_dump);
#define GEN_HELPER 2
#include "helper.h"
TCG_HELPER(helper_tlb_flush_pid);
TCG_HELPER(helper_movl_sreg_reg);
TCG_HELPER(helper_movl_reg_sreg);
TCG_HELPER(helper_rfe);
TCG_HELPER(helper_rfn);
TCG_HELPER(helper_evaluate_flags_muls);
TCG_HELPER(helper_evaluate_flags_mulu);
TCG_HELPER(helper_evaluate_flags_mcp);
TCG_HELPER(helper_evaluate_flags_alu_4);
TCG_HELPER(helper_evaluate_flags_move_4);
TCG_HELPER(helper_evaluate_flags_move_2);
TCG_HELPER(helper_evaluate_flags);
TCG_HELPER(helper_top_evaluate_flags);
return env;
}

2
target-i386/cpu.h
View File

@ -780,8 +780,6 @@ typedef struct CCTable {
int (*compute_c)(void); /* return the C flag */
} CCTable;
extern CCTable cc_table[];
#if defined(CONFIG_USER_ONLY)
static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
{

2
target-i386/exec.h
View File

@ -290,7 +290,7 @@ extern const uint8_t rclb_table[32];
static inline uint32_t compute_eflags(void)
{
return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
}
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */

1
target-i386/helper.c
View File

@ -30,6 +30,7 @@
#include "svm.h"
#include "qemu-common.h"
#include "kvm.h"
#include "helper.h"
//#define DEBUG_MMU

379
target-i386/helper.h
View File

@ -1,220 +1,217 @@
#ifndef DEF_HELPER
#define DEF_HELPER(ret, name, params) ret name params;
#endif
#include "def-helper.h"
DEF_HELPER(void, helper_lock, (void))
DEF_HELPER(void, helper_unlock, (void))
DEF_HELPER(void, helper_write_eflags, (target_ulong t0, uint32_t update_mask))
DEF_HELPER(target_ulong, helper_read_eflags, (void))
DEF_HELPER(void, helper_divb_AL, (target_ulong t0))
DEF_HELPER(void, helper_idivb_AL, (target_ulong t0))
DEF_HELPER(void, helper_divw_AX, (target_ulong t0))
DEF_HELPER(void, helper_idivw_AX, (target_ulong t0))
DEF_HELPER(void, helper_divl_EAX, (target_ulong t0))
DEF_HELPER(void, helper_idivl_EAX, (target_ulong t0))
DEF_HELPER_FLAGS_1(cc_compute_all, TCG_CALL_PURE, i32, int)
DEF_HELPER_FLAGS_1(cc_compute_c, TCG_CALL_PURE, i32, int)
DEF_HELPER_0(lock, void)
DEF_HELPER_0(unlock, void)
DEF_HELPER_2(write_eflags, void, tl, i32)
DEF_HELPER_0(read_eflags, tl)
DEF_HELPER_1(divb_AL, void, tl)
DEF_HELPER_1(idivb_AL, void, tl)
DEF_HELPER_1(divw_AX, void, tl)
DEF_HELPER_1(idivw_AX, void, tl)
DEF_HELPER_1(divl_EAX, void, tl)
DEF_HELPER_1(idivl_EAX, void, tl)
#ifdef TARGET_X86_64
DEF_HELPER(void, helper_mulq_EAX_T0, (target_ulong t0))
DEF_HELPER(void, helper_imulq_EAX_T0, (target_ulong t0))
DEF_HELPER(target_ulong, helper_imulq_T0_T1, (target_ulong t0, target_ulong t1))
DEF_HELPER(void, helper_divq_EAX, (target_ulong t0))
DEF_HELPER(void, helper_idivq_EAX, (target_ulong t0))
DEF_HELPER_1(mulq_EAX_T0, void, tl)
DEF_HELPER_1(imulq_EAX_T0, void, tl)
DEF_HELPER_2(imulq_T0_T1, tl, tl, tl)
DEF_HELPER_1(divq_EAX, void, tl)
DEF_HELPER_1(idivq_EAX, void, tl)
#endif
DEF_HELPER(void, helper_aam, (int base))
DEF_HELPER(void, helper_aad, (int base))
DEF_HELPER(void, helper_aaa, (void))
DEF_HELPER(void, helper_aas, (void))
DEF_HELPER(void, helper_daa, (void))
DEF_HELPER(void, helper_das, (void))
DEF_HELPER_1(aam, void, int)
DEF_HELPER_1(aad, void, int)
DEF_HELPER_0(aaa, void)
DEF_HELPER_0(aas, void)
DEF_HELPER_0(daa, void)
DEF_HELPER_0(das, void)
DEF_HELPER(target_ulong, helper_lsl, (target_ulong selector1))
DEF_HELPER(target_ulong, helper_lar, (target_ulong selector1))
DEF_HELPER(void, helper_verr, (target_ulong selector1))
DEF_HELPER(void, helper_verw, (target_ulong selector1))
DEF_HELPER(void, helper_lldt, (int selector))
DEF_HELPER(void, helper_ltr, (int selector))
DEF_HELPER(void, helper_load_seg, (int seg_reg, int selector))
DEF_HELPER(void, helper_ljmp_protected, (int new_cs, target_ulong new_eip,
int next_eip_addend))
DEF_HELPER(void, helper_lcall_real, (int new_cs, target_ulong new_eip1,
int shift, int next_eip))
DEF_HELPER(void, helper_lcall_protected, (int new_cs, target_ulong new_eip,
int shift, int next_eip_addend))
DEF_HELPER(void, helper_iret_real, (int shift))
DEF_HELPER(void, helper_iret_protected, (int shift, int next_eip))
DEF_HELPER(void, helper_lret_protected, (int shift, int addend))
DEF_HELPER(target_ulong, helper_read_crN, (int reg))
DEF_HELPER(void, helper_write_crN, (int reg, target_ulong t0))
DEF_HELPER(void, helper_lmsw, (target_ulong t0))
DEF_HELPER(void, helper_clts, (void))
DEF_HELPER(void, helper_movl_drN_T0, (int reg, target_ulong t0))
DEF_HELPER(void, helper_invlpg, (target_ulong addr))
DEF_HELPER_1(lsl, tl, tl)
DEF_HELPER_1(lar, tl, tl)
DEF_HELPER_1(verr, void, tl)
DEF_HELPER_1(verw, void, tl)
DEF_HELPER_1(lldt, void, int)
DEF_HELPER_1(ltr, void, int)
DEF_HELPER_2(load_seg, void, int, int)
DEF_HELPER_3(ljmp_protected, void, int, tl, int)
DEF_HELPER_4(lcall_real, void, int, tl, int, int)
DEF_HELPER_4(lcall_protected, void, int, tl, int, int)
DEF_HELPER_1(iret_real, void, int)
DEF_HELPER_2(iret_protected, void, int, int)
DEF_HELPER_2(lret_protected, void, int, int)
DEF_HELPER_1(read_crN, tl, int)
DEF_HELPER_2(write_crN, void, int, tl)
DEF_HELPER_1(lmsw, void, tl)
DEF_HELPER_0(clts, void)
DEF_HELPER_2(movl_drN_T0, void, int, tl)
DEF_HELPER_1(invlpg, void, tl)
DEF_HELPER(void, helper_enter_level, (int level, int data32, target_ulong t1))
DEF_HELPER_3(enter_level, void, int, int, tl)
#ifdef TARGET_X86_64
DEF_HELPER(void, helper_enter64_level, (int level, int data64, target_ulong t1))
DEF_HELPER_3(enter64_level, void, int, int, tl)
#endif
DEF_HELPER(void, helper_sysenter, (void))
DEF_HELPER(void, helper_sysexit, (int dflag))
DEF_HELPER_0(sysenter, void)
DEF_HELPER_1(sysexit, void, int)
#ifdef TARGET_X86_64
DEF_HELPER(void, helper_syscall, (int next_eip_addend))
DEF_HELPER(void, helper_sysret, (int dflag))
DEF_HELPER_1(syscall, void, int)
DEF_HELPER_1(sysret, void, int)
#endif
DEF_HELPER(void, helper_hlt, (int next_eip_addend))
DEF_HELPER(void, helper_monitor, (target_ulong ptr))
DEF_HELPER(void, helper_mwait, (int next_eip_addend))
DEF_HELPER(void, helper_debug, (void))
DEF_HELPER(void, helper_raise_interrupt, (int intno, int next_eip_addend))
DEF_HELPER(void, helper_raise_exception, (int exception_index))
DEF_HELPER(void, helper_cli, (void))
DEF_HELPER(void, helper_sti, (void))
DEF_HELPER(void, helper_set_inhibit_irq, (void))
DEF_HELPER(void, helper_reset_inhibit_irq, (void))
DEF_HELPER(void, helper_boundw, (target_ulong a0, int v))
DEF_HELPER(void, helper_boundl, (target_ulong a0, int v))
DEF_HELPER(void, helper_rsm, (void))
DEF_HELPER(void, helper_into, (int next_eip_addend))
DEF_HELPER(void, helper_cmpxchg8b, (target_ulong a0))
DEF_HELPER_1(hlt, void, int)
DEF_HELPER_1(monitor, void, tl)
DEF_HELPER_1(mwait, void, int)
DEF_HELPER_0(debug, void)
DEF_HELPER_2(raise_interrupt, void, int, int)
DEF_HELPER_1(raise_exception, void, int)
DEF_HELPER_0(cli, void)
DEF_HELPER_0(sti, void)
DEF_HELPER_0(set_inhibit_irq, void)
DEF_HELPER_0(reset_inhibit_irq, void)
DEF_HELPER_2(boundw, void, tl, int)
DEF_HELPER_2(boundl, void, tl, int)
DEF_HELPER_0(rsm, void)
DEF_HELPER_1(into, void, int)
DEF_HELPER_1(cmpxchg8b, void, tl)
#ifdef TARGET_X86_64
DEF_HELPER(void, helper_cmpxchg16b, (target_ulong a0))
DEF_HELPER_1(cmpxchg16b, void, tl)
#endif
DEF_HELPER(void, helper_single_step, (void))
DEF_HELPER(void, helper_cpuid, (void))
DEF_HELPER(void, helper_rdtsc, (void))
DEF_HELPER(void, helper_rdpmc, (void))
DEF_HELPER(void, helper_rdmsr, (void))
DEF_HELPER(void, helper_wrmsr, (void))
DEF_HELPER_0(single_step, void)
DEF_HELPER_0(cpuid, void)
DEF_HELPER_0(rdtsc, void)
DEF_HELPER_0(rdpmc, void)
DEF_HELPER_0(rdmsr, void)
DEF_HELPER_0(wrmsr, void)
DEF_HELPER(void, helper_check_iob, (uint32_t t0))
DEF_HELPER(void, helper_check_iow, (uint32_t t0))
DEF_HELPER(void, helper_check_iol, (uint32_t t0))
DEF_HELPER(void, helper_outb, (uint32_t port, uint32_t data))
DEF_HELPER(target_ulong, helper_inb, (uint32_t port))
DEF_HELPER(void, helper_outw, (uint32_t port, uint32_t data))
DEF_HELPER(target_ulong, helper_inw, (uint32_t port))
DEF_HELPER(void, helper_outl, (uint32_t port, uint32_t data))
DEF_HELPER(target_ulong, helper_inl, (uint32_t port))
DEF_HELPER_1(check_iob, void, i32)
DEF_HELPER_1(check_iow, void, i32)
DEF_HELPER_1(check_iol, void, i32)
DEF_HELPER_2(outb, void, i32, i32)
DEF_HELPER_1(inb, tl, i32)
DEF_HELPER_2(outw, void, i32, i32)
DEF_HELPER_1(inw, tl, i32)
DEF_HELPER_2(outl, void, i32, i32)
DEF_HELPER_1(inl, tl, i32)
DEF_HELPER(void, helper_svm_check_intercept_param, (uint32_t type, uint64_t param))
DEF_HELPER(void, helper_vmexit, (uint32_t exit_code, uint64_t exit_info_1))
DEF_HELPER(void, helper_svm_check_io, (uint32_t port, uint32_t param,
uint32_t next_eip_addend))
DEF_HELPER(void, helper_vmrun, (int aflag, int next_eip_addend))
DEF_HELPER(void, helper_vmmcall, (void))
DEF_HELPER(void, helper_vmload, (int aflag))
DEF_HELPER(void, helper_vmsave, (int aflag))
DEF_HELPER(void, helper_stgi, (void))
DEF_HELPER(void, helper_clgi, (void))
DEF_HELPER(void, helper_skinit, (void))
DEF_HELPER(void, helper_invlpga, (int aflag))
DEF_HELPER_2(svm_check_intercept_param, void, i32, i64)
DEF_HELPER_2(vmexit, void, i32, i64)
DEF_HELPER_3(svm_check_io, void, i32, i32, i32)
DEF_HELPER_2(vmrun, void, int, int)
DEF_HELPER_0(vmmcall, void)
DEF_HELPER_1(vmload, void, int)
DEF_HELPER_1(vmsave, void, int)
DEF_HELPER_0(stgi, void)
DEF_HELPER_0(clgi, void)
DEF_HELPER_0(skinit, void)
DEF_HELPER_1(invlpga, void, int)
/* x86 FPU */
DEF_HELPER(void, helper_flds_FT0, (uint32_t val))
DEF_HELPER(void, helper_fldl_FT0, (uint64_t val))
DEF_HELPER(void, helper_fildl_FT0, (int32_t val))
DEF_HELPER(void, helper_flds_ST0, (uint32_t val))
DEF_HELPER(void, helper_fldl_ST0, (uint64_t val))
DEF_HELPER(void, helper_fildl_ST0, (int32_t val))
DEF_HELPER(void, helper_fildll_ST0, (int64_t val))
DEF_HELPER(uint32_t, helper_fsts_ST0, (void))
DEF_HELPER(uint64_t, helper_fstl_ST0, (void))
DEF_HELPER(int32_t, helper_fist_ST0, (void))
DEF_HELPER(int32_t, helper_fistl_ST0, (void))
DEF_HELPER(int64_t, helper_fistll_ST0, (void))
DEF_HELPER(int32_t, helper_fistt_ST0, (void))
DEF_HELPER(int32_t, helper_fisttl_ST0, (void))
DEF_HELPER(int64_t, helper_fisttll_ST0, (void))
DEF_HELPER(void, helper_fldt_ST0, (target_ulong ptr))
DEF_HELPER(void, helper_fstt_ST0, (target_ulong ptr))
DEF_HELPER(void, helper_fpush, (void))
DEF_HELPER(void, helper_fpop, (void))
DEF_HELPER(void, helper_fdecstp, (void))
DEF_HELPER(void, helper_fincstp, (void))
DEF_HELPER(void, helper_ffree_STN, (int st_index))
DEF_HELPER(void, helper_fmov_ST0_FT0, (void))
DEF_HELPER(void, helper_fmov_FT0_STN, (int st_index))
DEF_HELPER(void, helper_fmov_ST0_STN, (int st_index))
DEF_HELPER(void, helper_fmov_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fxchg_ST0_STN, (int st_index))
DEF_HELPER(void, helper_fcom_ST0_FT0, (void))
DEF_HELPER(void, helper_fucom_ST0_FT0, (void))
DEF_HELPER(void, helper_fcomi_ST0_FT0, (void))
DEF_HELPER(void, helper_fucomi_ST0_FT0, (void))
DEF_HELPER(void, helper_fadd_ST0_FT0, (void))
DEF_HELPER(void, helper_fmul_ST0_FT0, (void))
DEF_HELPER(void, helper_fsub_ST0_FT0, (void))
DEF_HELPER(void, helper_fsubr_ST0_FT0, (void))
DEF_HELPER(void, helper_fdiv_ST0_FT0, (void))
DEF_HELPER(void, helper_fdivr_ST0_FT0, (void))
DEF_HELPER(void, helper_fadd_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fmul_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fsub_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fsubr_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fdiv_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fdivr_STN_ST0, (int st_index))
DEF_HELPER(void, helper_fchs_ST0, (void))
DEF_HELPER(void, helper_fabs_ST0, (void))
DEF_HELPER(void, helper_fxam_ST0, (void))
DEF_HELPER(void, helper_fld1_ST0, (void))
DEF_HELPER(void, helper_fldl2t_ST0, (void))
DEF_HELPER(void, helper_fldl2e_ST0, (void))
DEF_HELPER(void, helper_fldpi_ST0, (void))
DEF_HELPER(void, helper_fldlg2_ST0, (void))
DEF_HELPER(void, helper_fldln2_ST0, (void))
DEF_HELPER(void, helper_fldz_ST0, (void))
DEF_HELPER(void, helper_fldz_FT0, (void))
DEF_HELPER(uint32_t, helper_fnstsw, (void))
DEF_HELPER(uint32_t, helper_fnstcw, (void))
DEF_HELPER(void, helper_fldcw, (uint32_t val))
DEF_HELPER(void, helper_fclex, (void))
DEF_HELPER(void, helper_fwait, (void))
DEF_HELPER(void, helper_fninit, (void))
DEF_HELPER(void, helper_fbld_ST0, (target_ulong ptr))
DEF_HELPER(void, helper_fbst_ST0, (target_ulong ptr))
DEF_HELPER(void, helper_f2xm1, (void))
DEF_HELPER(void, helper_fyl2x, (void))
DEF_HELPER(void, helper_fptan, (void))
DEF_HELPER(void, helper_fpatan, (void))
DEF_HELPER(void, helper_fxtract, (void))
DEF_HELPER(void, helper_fprem1, (void))
DEF_HELPER(void, helper_fprem, (void))
DEF_HELPER(void, helper_fyl2xp1, (void))
DEF_HELPER(void, helper_fsqrt, (void))
DEF_HELPER(void, helper_fsincos, (void))
DEF_HELPER(void, helper_frndint, (void))
DEF_HELPER(void, helper_fscale, (void))
DEF_HELPER(void, helper_fsin, (void))
DEF_HELPER(void, helper_fcos, (void))
DEF_HELPER(void, helper_fstenv, (target_ulong ptr, int data32))
DEF_HELPER(void, helper_fldenv, (target_ulong ptr, int data32))
DEF_HELPER(void, helper_fsave, (target_ulong ptr, int data32))
DEF_HELPER(void, helper_frstor, (target_ulong ptr, int data32))
DEF_HELPER(void, helper_fxsave, (target_ulong ptr, int data64))
DEF_HELPER(void, helper_fxrstor, (target_ulong ptr, int data64))
DEF_HELPER(target_ulong, helper_bsf, (target_ulong t0))
DEF_HELPER(target_ulong, helper_bsr, (target_ulong t0))
DEF_HELPER_1(flds_FT0, void, i32)
DEF_HELPER_1(fldl_FT0, void, i64)
DEF_HELPER_1(fildl_FT0, void, s32)
DEF_HELPER_1(flds_ST0, void, i32)
DEF_HELPER_1(fldl_ST0, void, i64)
DEF_HELPER_1(fildl_ST0, void, s32)
DEF_HELPER_1(fildll_ST0, void, s64)
DEF_HELPER_0(fsts_ST0, i32)
DEF_HELPER_0(fstl_ST0, i64)
DEF_HELPER_0(fist_ST0, s32)
DEF_HELPER_0(fistl_ST0, s32)
DEF_HELPER_0(fistll_ST0, s64)
DEF_HELPER_0(fistt_ST0, s32)
DEF_HELPER_0(fisttl_ST0, s32)
DEF_HELPER_0(fisttll_ST0, s64)
DEF_HELPER_1(fldt_ST0, void, tl)
DEF_HELPER_1(fstt_ST0, void, tl)
DEF_HELPER_0(fpush, void)
DEF_HELPER_0(fpop, void)
DEF_HELPER_0(fdecstp, void)
DEF_HELPER_0(fincstp, void)
DEF_HELPER_1(ffree_STN, void, int)
DEF_HELPER_0(fmov_ST0_FT0, void)
DEF_HELPER_1(fmov_FT0_STN, void, int)
DEF_HELPER_1(fmov_ST0_STN, void, int)
DEF_HELPER_1(fmov_STN_ST0, void, int)
DEF_HELPER_1(fxchg_ST0_STN, void, int)
DEF_HELPER_0(fcom_ST0_FT0, void)
DEF_HELPER_0(fucom_ST0_FT0, void)
DEF_HELPER_0(fcomi_ST0_FT0, void)
DEF_HELPER_0(fucomi_ST0_FT0, void)
DEF_HELPER_0(fadd_ST0_FT0, void)
DEF_HELPER_0(fmul_ST0_FT0, void)
DEF_HELPER_0(fsub_ST0_FT0, void)
DEF_HELPER_0(fsubr_ST0_FT0, void)
DEF_HELPER_0(fdiv_ST0_FT0, void)
DEF_HELPER_0(fdivr_ST0_FT0, void)
DEF_HELPER_1(fadd_STN_ST0, void, int)
DEF_HELPER_1(fmul_STN_ST0, void, int)
DEF_HELPER_1(fsub_STN_ST0, void, int)
DEF_HELPER_1(fsubr_STN_ST0, void, int)
DEF_HELPER_1(fdiv_STN_ST0, void, int)
DEF_HELPER_1(fdivr_STN_ST0, void, int)
DEF_HELPER_0(fchs_ST0, void)
DEF_HELPER_0(fabs_ST0, void)
DEF_HELPER_0(fxam_ST0, void)
DEF_HELPER_0(fld1_ST0, void)
DEF_HELPER_0(fldl2t_ST0, void)
DEF_HELPER_0(fldl2e_ST0, void)
DEF_HELPER_0(fldpi_ST0, void)
DEF_HELPER_0(fldlg2_ST0, void)
DEF_HELPER_0(fldln2_ST0, void)
DEF_HELPER_0(fldz_ST0, void)
DEF_HELPER_0(fldz_FT0, void)
DEF_HELPER_0(fnstsw, i32)
DEF_HELPER_0(fnstcw, i32)
DEF_HELPER_1(fldcw, void, i32)
DEF_HELPER_0(fclex, void)
DEF_HELPER_0(fwait, void)
DEF_HELPER_0(fninit, void)
DEF_HELPER_1(fbld_ST0, void, tl)
DEF_HELPER_1(fbst_ST0, void, tl)
DEF_HELPER_0(f2xm1, void)
DEF_HELPER_0(fyl2x, void)
DEF_HELPER_0(fptan, void)
DEF_HELPER_0(fpatan, void)
DEF_HELPER_0(fxtract, void)
DEF_HELPER_0(fprem1, void)
DEF_HELPER_0(fprem, void)
DEF_HELPER_0(fyl2xp1, void)
DEF_HELPER_0(fsqrt, void)
DEF_HELPER_0(fsincos, void)
DEF_HELPER_0(frndint, void)
DEF_HELPER_0(fscale, void)
DEF_HELPER_0(fsin, void)
DEF_HELPER_0(fcos, void)
DEF_HELPER_2(fstenv, void, tl, int)
DEF_HELPER_2(fldenv, void, tl, int)
DEF_HELPER_2(fsave, void, tl, int)
DEF_HELPER_2(frstor, void, tl, int)
DEF_HELPER_2(fxsave, void, tl, int)
DEF_HELPER_2(fxrstor, void, tl, int)
DEF_HELPER_1(bsf, tl, tl)
DEF_HELPER_1(bsr, tl, tl)
/* MMX/SSE */
DEF_HELPER(void, helper_enter_mmx, (void))
DEF_HELPER(void, helper_emms, (void))
DEF_HELPER(void, helper_movq, (uint64_t *d, uint64_t *s))
DEF_HELPER_0(enter_mmx, void)
DEF_HELPER_0(emms, void)
DEF_HELPER_2(movq, void, ptr, ptr)
#define SHIFT 0
#include "ops_sse_header.h"
#define SHIFT 1
#include "ops_sse_header.h"
DEF_HELPER(target_ulong, helper_rclb, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, helper_rclw, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, helper_rcll, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, helper_rcrb, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, helper_rcrw, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, helper_rcrl, (target_ulong t0, target_ulong t1))
DEF_HELPER_2(rclb, tl, tl, tl)
DEF_HELPER_2(rclw, tl, tl, tl)
DEF_HELPER_2(rcll, tl, tl, tl)
DEF_HELPER_2(rcrb, tl, tl, tl)
DEF_HELPER_2(rcrw, tl, tl, tl)
DEF_HELPER_2(rcrl, tl, tl, tl)
#ifdef TARGET_X86_64
DEF_HELPER(target_ulong, helper_rclq, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, helper_rcrq, (target_ulong t0, target_ulong t1))
DEF_HELPER_2(rclq, tl, tl, tl)
DEF_HELPER_2(rcrq, tl, tl, tl)
#endif
#undef DEF_HELPER
#include "def-helper.h"

4
target-i386/helper_template.h
View File

@ -280,7 +280,7 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1)
count = rclb_table[count];
#endif
if (count) {
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
t0 &= DATA_MASK;
src = t0;
res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1));
@ -309,7 +309,7 @@ target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1)
count = rclb_table[count];
#endif
if (count) {
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
t0 &= DATA_MASK;
src = t0;
res = (t0 >> count) | ((target_ulong)(eflags & CC_C) << (DATA_BITS - count));

193
target-i386/op_helper.c
View File

@ -116,7 +116,7 @@ void helper_write_eflags(target_ulong t0, uint32_t update_mask)
target_ulong helper_read_eflags(void)
{
uint32_t eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
eflags |= (DF & DF_MASK);
eflags |= env->eflags & ~(VM_MASK | RF_MASK);
return eflags;
@ -1718,7 +1718,7 @@ void helper_aaa(void)
int al, ah, af;
int eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
af = eflags & CC_A;
al = EAX & 0xff;
ah = (EAX >> 8) & 0xff;
@ -1743,7 +1743,7 @@ void helper_aas(void)
int al, ah, af;
int eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
af = eflags & CC_A;
al = EAX & 0xff;
ah = (EAX >> 8) & 0xff;
@ -1767,7 +1767,7 @@ void helper_daa(void)
int al, af, cf;
int eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
cf = eflags & CC_C;
af = eflags & CC_A;
al = EAX & 0xff;
@ -1795,7 +1795,7 @@ void helper_das(void)
int al, al1, af, cf;
int eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
cf = eflags & CC_C;
af = eflags & CC_A;
al = EAX & 0xff;
@ -1824,7 +1824,7 @@ void helper_das(void)
void helper_into(int next_eip_addend)
{
int eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
if (eflags & CC_O) {
raise_interrupt(EXCP04_INTO, 1, 0, next_eip_addend);
}
@ -1835,7 +1835,7 @@ void helper_cmpxchg8b(target_ulong a0)
uint64_t d;
int eflags;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
d = ldq(a0);
if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) {
stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX);
@ -1858,7 +1858,7 @@ void helper_cmpxchg16b(target_ulong a0)
if ((a0 & 0xf) != 0)
raise_exception(EXCP0D_GPF);
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
d0 = ldq(a0);
d1 = ldq(a0 + 8);
if (d0 == EAX && d1 == EDX) {
@ -3132,7 +3132,7 @@ target_ulong helper_lsl(target_ulong selector1)
int rpl, dpl, cpl, type;
selector = selector1 & 0xffff;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
if (load_segment(&e1, &e2, selector) != 0)
goto fail;
rpl = selector & 3;
@ -3174,7 +3174,7 @@ target_ulong helper_lar(target_ulong selector1)
int rpl, dpl, cpl, type;
selector = selector1 & 0xffff;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
if ((selector & 0xfffc) == 0)
goto fail;
if (load_segment(&e1, &e2, selector) != 0)
@ -3220,7 +3220,7 @@ void helper_verr(target_ulong selector1)
int rpl, dpl, cpl;
selector = selector1 & 0xffff;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
if ((selector & 0xfffc) == 0)
goto fail;
if (load_segment(&e1, &e2, selector) != 0)
@ -3253,7 +3253,7 @@ void helper_verw(target_ulong selector1)
int rpl, dpl, cpl;
selector = selector1 & 0xffff;
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
if ((selector & 0xfffc) == 0)
goto fail;
if (load_segment(&e1, &e2, selector) != 0)
@ -3543,7 +3543,7 @@ void helper_fcomi_ST0_FT0(void)
int ret;
ret = floatx_compare(ST0, FT0, &env->fp_status);
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
FORCE_RET();
@ -3555,7 +3555,7 @@ void helper_fucomi_ST0_FT0(void)
int ret;
ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
eflags = cc_table[CC_OP].compute_all();
eflags = helper_cc_compute_all(CC_OP);
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
FORCE_RET();
@ -5278,9 +5278,9 @@ void helper_emms(void)
}
/* XXX: suppress */
void helper_movq(uint64_t *d, uint64_t *s)
void helper_movq(void *d, void *s)
{
*d = *s;
*(uint64_t *)d = *(uint64_t *)s;
}
#define SHIFT 0
@ -5350,71 +5350,144 @@ static int compute_c_eflags(void)
return CC_SRC & CC_C;
}
CCTable cc_table[CC_OP_NB] = {
[CC_OP_DYNAMIC] = { /* should never happen */ },
uint32_t helper_cc_compute_all(int op)
{
switch (op) {
default: /* should never happen */ return 0;
[CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
case CC_OP_EFLAGS: return compute_all_eflags();
[CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
[CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
[CC_OP_MULL] = { compute_all_mull, compute_c_mull },
case CC_OP_MULB: return compute_all_mulb();
case CC_OP_MULW: return compute_all_mulw();
case CC_OP_MULL: return compute_all_mull();
[CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
[CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
[CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
case CC_OP_ADDB: return compute_all_addb();
case CC_OP_ADDW: return compute_all_addw();
case CC_OP_ADDL: return compute_all_addl();
[CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
[CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
[CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
case CC_OP_ADCB: return compute_all_adcb();
case CC_OP_ADCW: return compute_all_adcw();
case CC_OP_ADCL: return compute_all_adcl();
[CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
[CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
[CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
case CC_OP_SUBB: return compute_all_subb();
case CC_OP_SUBW: return compute_all_subw();
case CC_OP_SUBL: return compute_all_subl();
[CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
[CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
[CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
case CC_OP_SBBB: return compute_all_sbbb();
case CC_OP_SBBW: return compute_all_sbbw();
case CC_OP_SBBL: return compute_all_sbbl();
[CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
[CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
[CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
case CC_OP_LOGICB: return compute_all_logicb();
case CC_OP_LOGICW: return compute_all_logicw();
case CC_OP_LOGICL: return compute_all_logicl();
[CC_OP_INCB] = { compute_all_incb, compute_c_incl },
[CC_OP_INCW] = { compute_all_incw, compute_c_incl },
[CC_OP_INCL] = { compute_all_incl, compute_c_incl },
case CC_OP_INCB: return compute_all_incb();
case CC_OP_INCW: return compute_all_incw();
case CC_OP_INCL: return compute_all_incl();
[CC_OP_DECB] = { compute_all_decb, compute_c_incl },
[CC_OP_DECW] = { compute_all_decw, compute_c_incl },
[CC_OP_DECL] = { compute_all_decl, compute_c_incl },
case CC_OP_DECB: return compute_all_decb();
case CC_OP_DECW: return compute_all_decw();
case CC_OP_DECL: return compute_all_decl();
[CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
[CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
[CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
case CC_OP_SHLB: return compute_all_shlb();
case CC_OP_SHLW: return compute_all_shlw();
case CC_OP_SHLL: return compute_all_shll();
[CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
[CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
[CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
case CC_OP_SARB: return compute_all_sarb();
case CC_OP_SARW: return compute_all_sarw();
case CC_OP_SARL: return compute_all_sarl();
#ifdef TARGET_X86_64
[CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
case CC_OP_MULQ: return compute_all_mulq();
[CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
case CC_OP_ADDQ: return compute_all_addq();
[CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
case CC_OP_ADCQ: return compute_all_adcq();
[CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
case CC_OP_SUBQ: return compute_all_subq();
[CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
case CC_OP_SBBQ: return compute_all_sbbq();
[CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
case CC_OP_LOGICQ: return compute_all_logicq();
[CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
case CC_OP_INCQ: return compute_all_incq();
[CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
case CC_OP_DECQ: return compute_all_decq();
[CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
case CC_OP_SHLQ: return compute_all_shlq();
[CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
case CC_OP_SARQ: return compute_all_sarq();
#endif
};
}
}
uint32_t helper_cc_compute_c(int op)
{
switch (op) {
default: /* should never happen */ return 0;
case CC_OP_EFLAGS: return compute_c_eflags();
case CC_OP_MULB: return compute_c_mull();
case CC_OP_MULW: return compute_c_mull();
case CC_OP_MULL: return compute_c_mull();
case CC_OP_ADDB: return compute_c_addb();
case CC_OP_ADDW: return compute_c_addw();
case CC_OP_ADDL: return compute_c_addl();
case CC_OP_ADCB: return compute_c_adcb();
case CC_OP_ADCW: return compute_c_adcw();
case CC_OP_ADCL: return compute_c_adcl();
case CC_OP_SUBB: return compute_c_subb();
case CC_OP_SUBW: return compute_c_subw();
case CC_OP_SUBL: return compute_c_subl();
case CC_OP_SBBB: return compute_c_sbbb();
case CC_OP_SBBW: return compute_c_sbbw();
case CC_OP_SBBL: return compute_c_sbbl();
case CC_OP_LOGICB: return compute_c_logicb();
case CC_OP_LOGICW: return compute_c_logicw();
case CC_OP_LOGICL: return compute_c_logicl();
case CC_OP_INCB: return compute_c_incl();
case CC_OP_INCW: return compute_c_incl();
case CC_OP_INCL: return compute_c_incl();
case CC_OP_DECB: return compute_c_incl();
case CC_OP_DECW: return compute_c_incl();
case CC_OP_DECL: return compute_c_incl();
case CC_OP_SHLB: return compute_c_shlb();
case CC_OP_SHLW: return compute_c_shlw();
case CC_OP_SHLL: return compute_c_shll();
case CC_OP_SARB: return compute_c_sarl();
case CC_OP_SARW: return compute_c_sarl();
case CC_OP_SARL: return compute_c_sarl();
#ifdef TARGET_X86_64
case CC_OP_MULQ: return compute_c_mull();
case CC_OP_ADDQ: return compute_c_addq();
case CC_OP_ADCQ: return compute_c_adcq();
case CC_OP_SUBQ: return compute_c_subq();
case CC_OP_SBBQ: return compute_c_sbbq();
case CC_OP_LOGICQ: return compute_c_logicq();
case CC_OP_INCQ: return compute_c_incl();
case CC_OP_DECQ: return compute_c_incl();
case CC_OP_SHLQ: return compute_c_shlq();
case CC_OP_SARQ: return compute_c_sarl();
#endif
}
}

416
target-i386/ops_sse_header.h
View File

@ -25,99 +25,106 @@
#define SUFFIX _xmm
#endif
DEF_HELPER(void, glue(helper_psrlw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psraw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psllw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psrld, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psrad, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pslld, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psrlq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psllq, SUFFIX), (Reg *d, Reg *s))
#define dh_alias_Reg ptr
#define dh_alias_XMMReg ptr
#define dh_alias_MMXReg ptr
#define dh_ctype_Reg Reg *
#define dh_ctype_XMMReg XMMReg *
#define dh_ctype_MMXReg MMXReg *
DEF_HELPER_2(glue(psrlw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psraw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psllw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psrld, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psrad, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pslld, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psrlq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psllq, SUFFIX), void, Reg, Reg)
#if SHIFT == 1
DEF_HELPER(void, glue(helper_psrldq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pslldq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER_2(glue(psrldq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pslldq, SUFFIX), void, Reg, Reg)
#endif
#define SSE_HELPER_B(name, F)\
DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
#define SSE_HELPER_W(name, F)\
DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
#define SSE_HELPER_L(name, F)\
DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
#define SSE_HELPER_Q(name, F)\
DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
SSE_HELPER_B(helper_paddb, FADD)
SSE_HELPER_W(helper_paddw, FADD)
SSE_HELPER_L(helper_paddl, FADD)
SSE_HELPER_Q(helper_paddq, FADD)
SSE_HELPER_B(paddb, FADD)
SSE_HELPER_W(paddw, FADD)
SSE_HELPER_L(paddl, FADD)
SSE_HELPER_Q(paddq, FADD)
SSE_HELPER_B(helper_psubb, FSUB)
SSE_HELPER_W(helper_psubw, FSUB)
SSE_HELPER_L(helper_psubl, FSUB)
SSE_HELPER_Q(helper_psubq, FSUB)
SSE_HELPER_B(psubb, FSUB)
SSE_HELPER_W(psubw, FSUB)
SSE_HELPER_L(psubl, FSUB)
SSE_HELPER_Q(psubq, FSUB)
SSE_HELPER_B(helper_paddusb, FADDUB)
SSE_HELPER_B(helper_paddsb, FADDSB)
SSE_HELPER_B(helper_psubusb, FSUBUB)
SSE_HELPER_B(helper_psubsb, FSUBSB)
SSE_HELPER_B(paddusb, FADDUB)
SSE_HELPER_B(paddsb, FADDSB)
SSE_HELPER_B(psubusb, FSUBUB)
SSE_HELPER_B(psubsb, FSUBSB)
SSE_HELPER_W(helper_paddusw, FADDUW)
SSE_HELPER_W(helper_paddsw, FADDSW)
SSE_HELPER_W(helper_psubusw, FSUBUW)
SSE_HELPER_W(helper_psubsw, FSUBSW)
SSE_HELPER_W(paddusw, FADDUW)
SSE_HELPER_W(paddsw, FADDSW)
SSE_HELPER_W(psubusw, FSUBUW)
SSE_HELPER_W(psubsw, FSUBSW)
SSE_HELPER_B(helper_pminub, FMINUB)
SSE_HELPER_B(helper_pmaxub, FMAXUB)
SSE_HELPER_B(pminub, FMINUB)
SSE_HELPER_B(pmaxub, FMAXUB)
SSE_HELPER_W(helper_pminsw, FMINSW)
SSE_HELPER_W(helper_pmaxsw, FMAXSW)
SSE_HELPER_W(pminsw, FMINSW)
SSE_HELPER_W(pmaxsw, FMAXSW)
SSE_HELPER_Q(helper_pand, FAND)
SSE_HELPER_Q(helper_pandn, FANDN)
SSE_HELPER_Q(helper_por, FOR)
SSE_HELPER_Q(helper_pxor, FXOR)
SSE_HELPER_Q(pand, FAND)
SSE_HELPER_Q(pandn, FANDN)
SSE_HELPER_Q(por, FOR)
SSE_HELPER_Q(pxor, FXOR)
SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
SSE_HELPER_B(pcmpgtb, FCMPGTB)
SSE_HELPER_W(pcmpgtw, FCMPGTW)
SSE_HELPER_L(pcmpgtl, FCMPGTL)
SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
SSE_HELPER_B(pcmpeqb, FCMPEQ)
SSE_HELPER_W(pcmpeqw, FCMPEQ)
SSE_HELPER_L(pcmpeql, FCMPEQ)
SSE_HELPER_W(helper_pmullw, FMULLW)
SSE_HELPER_W(pmullw, FMULLW)
#if SHIFT == 0
SSE_HELPER_W(helper_pmulhrw, FMULHRW)
SSE_HELPER_W(pmulhrw, FMULHRW)
#endif
SSE_HELPER_W(helper_pmulhuw, FMULHUW)
SSE_HELPER_W(helper_pmulhw, FMULHW)
SSE_HELPER_W(pmulhuw, FMULHUW)
SSE_HELPER_W(pmulhw, FMULHW)
SSE_HELPER_B(helper_pavgb, FAVG)
SSE_HELPER_W(helper_pavgw, FAVG)
SSE_HELPER_B(pavgb, FAVG)
SSE_HELPER_W(pavgw, FAVG)
DEF_HELPER(void, glue(helper_pmuludq, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmaddwd, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER_2(glue(pmuludq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmaddwd, SUFFIX), void, Reg, Reg)
DEF_HELPER(void, glue(helper_psadbw, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_maskmov, SUFFIX) , (Reg *d, Reg *s, target_ulong a0))
DEF_HELPER(void, glue(helper_movl_mm_T0, SUFFIX) , (Reg *d, uint32_t val))
DEF_HELPER_2(glue(psadbw, SUFFIX), void, Reg, Reg)
DEF_HELPER_3(glue(maskmov, SUFFIX), void, Reg, Reg, tl)
DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32)
#ifdef TARGET_X86_64
DEF_HELPER(void, glue(helper_movq_mm_T0, SUFFIX) , (Reg *d, uint64_t val))
DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64)
#endif
#if SHIFT == 0
DEF_HELPER(void, glue(helper_pshufw, SUFFIX) , (Reg *d, Reg *s, int order))
DEF_HELPER_3(glue(pshufw, SUFFIX), void, Reg, Reg, int)
#else
DEF_HELPER(void, helper_shufps, (Reg *d, Reg *s, int order))
DEF_HELPER(void, helper_shufpd, (Reg *d, Reg *s, int order))
DEF_HELPER(void, glue(helper_pshufd, SUFFIX) , (Reg *d, Reg *s, int order))
DEF_HELPER(void, glue(helper_pshuflw, SUFFIX) , (Reg *d, Reg *s, int order))
DEF_HELPER(void, glue(helper_pshufhw, SUFFIX) , (Reg *d, Reg *s, int order))
DEF_HELPER_3(shufps, void, Reg, Reg, int)
DEF_HELPER_3(shufpd, void, Reg, Reg, int)
DEF_HELPER_3(glue(pshufd, SUFFIX), void, Reg, Reg, int)
DEF_HELPER_3(glue(pshuflw, SUFFIX), void, Reg, Reg, int)
DEF_HELPER_3(glue(pshufhw, SUFFIX), void, Reg, Reg, int)
#endif
#if SHIFT == 1
@ -125,10 +132,10 @@ DEF_HELPER(void, glue(helper_pshufhw, SUFFIX) , (Reg *d, Reg *s, int order))
/* XXX: not accurate */
#define SSE_HELPER_S(name, F)\
DEF_HELPER(void, helper_ ## name ## ps , (Reg *d, Reg *s)) \
DEF_HELPER(void, helper_ ## name ## ss , (Reg *d, Reg *s)) \
DEF_HELPER(void, helper_ ## name ## pd , (Reg *d, Reg *s)) \
DEF_HELPER(void, helper_ ## name ## sd , (Reg *d, Reg *s))
DEF_HELPER_2(name ## ps , void, Reg, Reg) \
DEF_HELPER_2(name ## ss , void, Reg, Reg) \
DEF_HELPER_2(name ## pd , void, Reg, Reg) \
DEF_HELPER_2(name ## sd , void, Reg, Reg)
SSE_HELPER_S(add, FPU_ADD)
SSE_HELPER_S(sub, FPU_SUB)
@ -139,60 +146,60 @@ SSE_HELPER_S(max, FPU_MAX)
SSE_HELPER_S(sqrt, FPU_SQRT)
DEF_HELPER(void, helper_cvtps2pd, (Reg *d, Reg *s))
DEF_HELPER(void, helper_cvtpd2ps, (Reg *d, Reg *s))
DEF_HELPER(void, helper_cvtss2sd, (Reg *d, Reg *s))
DEF_HELPER(void, helper_cvtsd2ss, (Reg *d, Reg *s))
DEF_HELPER(void, helper_cvtdq2ps, (Reg *d, Reg *s))
DEF_HELPER(void, helper_cvtdq2pd, (Reg *d, Reg *s))
DEF_HELPER(void, helper_cvtpi2ps, (XMMReg *d, MMXReg *s))
DEF_HELPER(void, helper_cvtpi2pd, (XMMReg *d, MMXReg *s))
DEF_HELPER(void, helper_cvtsi2ss, (XMMReg *d, uint32_t val))
DEF_HELPER(void, helper_cvtsi2sd, (XMMReg *d, uint32_t val))
DEF_HELPER_2(cvtps2pd, void, Reg, Reg)
DEF_HELPER_2(cvtpd2ps, void, Reg, Reg)
DEF_HELPER_2(cvtss2sd, void, Reg, Reg)
DEF_HELPER_2(cvtsd2ss, void, Reg, Reg)
DEF_HELPER_2(cvtdq2ps, void, Reg, Reg)
DEF_HELPER_2(cvtdq2pd, void, Reg, Reg)
DEF_HELPER_2(cvtpi2ps, void, XMMReg, MMXReg)
DEF_HELPER_2(cvtpi2pd, void, XMMReg, MMXReg)
DEF_HELPER_2(cvtsi2ss, void, XMMReg, i32)
DEF_HELPER_2(cvtsi2sd, void, XMMReg, i32)
#ifdef TARGET_X86_64
DEF_HELPER(void, helper_cvtsq2ss, (XMMReg *d, uint64_t val))
DEF_HELPER(void, helper_cvtsq2sd, (XMMReg *d, uint64_t val))
DEF_HELPER_2(cvtsq2ss, void, XMMReg, i64)
DEF_HELPER_2(cvtsq2sd, void, XMMReg, i64)
#endif
DEF_HELPER(void, helper_cvtps2dq, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_cvtpd2dq, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_cvtps2pi, (MMXReg *d, XMMReg *s))
DEF_HELPER(void, helper_cvtpd2pi, (MMXReg *d, XMMReg *s))
DEF_HELPER(int32_t, helper_cvtss2si, (XMMReg *s))
DEF_HELPER(int32_t, helper_cvtsd2si, (XMMReg *s))
DEF_HELPER_2(cvtps2dq, void, XMMReg, XMMReg)
DEF_HELPER_2(cvtpd2dq, void, XMMReg, XMMReg)
DEF_HELPER_2(cvtps2pi, void, MMXReg, XMMReg)
DEF_HELPER_2(cvtpd2pi, void, MMXReg, XMMReg)
DEF_HELPER_1(cvtss2si, s32, XMMReg)
DEF_HELPER_1(cvtsd2si, s32, XMMReg)
#ifdef TARGET_X86_64
DEF_HELPER(int64_t, helper_cvtss2sq, (XMMReg *s))
DEF_HELPER(int64_t, helper_cvtsd2sq, (XMMReg *s))
DEF_HELPER_1(cvtss2sq, s64, XMMReg)
DEF_HELPER_1(cvtsd2sq, s64, XMMReg)
#endif
DEF_HELPER(void, helper_cvttps2dq, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_cvttpd2dq, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_cvttps2pi, (MMXReg *d, XMMReg *s))
DEF_HELPER(void, helper_cvttpd2pi, (MMXReg *d, XMMReg *s))
DEF_HELPER(int32_t, helper_cvttss2si, (XMMReg *s))
DEF_HELPER(int32_t, helper_cvttsd2si, (XMMReg *s))
DEF_HELPER_2(cvttps2dq, void, XMMReg, XMMReg)
DEF_HELPER_2(cvttpd2dq, void, XMMReg, XMMReg)
DEF_HELPER_2(cvttps2pi, void, MMXReg, XMMReg)
DEF_HELPER_2(cvttpd2pi, void, MMXReg, XMMReg)
DEF_HELPER_1(cvttss2si, s32, XMMReg)
DEF_HELPER_1(cvttsd2si, s32, XMMReg)
#ifdef TARGET_X86_64
DEF_HELPER(int64_t, helper_cvttss2sq, (XMMReg *s))
DEF_HELPER(int64_t, helper_cvttsd2sq, (XMMReg *s))
DEF_HELPER_1(cvttss2sq, s64, XMMReg)
DEF_HELPER_1(cvttsd2sq, s64, XMMReg)
#endif
DEF_HELPER(void, helper_rsqrtps, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_rsqrtss, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_rcpps, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_rcpss, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_haddps, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_haddpd, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_hsubps, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_hsubpd, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_addsubps, (XMMReg *d, XMMReg *s))
DEF_HELPER(void, helper_addsubpd, (XMMReg *d, XMMReg *s))
DEF_HELPER_2(rsqrtps, void, XMMReg, XMMReg)
DEF_HELPER_2(rsqrtss, void, XMMReg, XMMReg)
DEF_HELPER_2(rcpps, void, XMMReg, XMMReg)
DEF_HELPER_2(rcpss, void, XMMReg, XMMReg)
DEF_HELPER_2(haddps, void, XMMReg, XMMReg)
DEF_HELPER_2(haddpd, void, XMMReg, XMMReg)
DEF_HELPER_2(hsubps, void, XMMReg, XMMReg)
DEF_HELPER_2(hsubpd, void, XMMReg, XMMReg)
DEF_HELPER_2(addsubps, void, XMMReg, XMMReg)
DEF_HELPER_2(addsubpd, void, XMMReg, XMMReg)
#define SSE_HELPER_CMP(name, F)\
DEF_HELPER(void, helper_ ## name ## ps , (Reg *d, Reg *s)) \
DEF_HELPER(void, helper_ ## name ## ss , (Reg *d, Reg *s)) \
DEF_HELPER(void, helper_ ## name ## pd , (Reg *d, Reg *s)) \
DEF_HELPER(void, helper_ ## name ## sd , (Reg *d, Reg *s))
DEF_HELPER_2( name ## ps , void, Reg, Reg) \
DEF_HELPER_2( name ## ss , void, Reg, Reg) \
DEF_HELPER_2( name ## pd , void, Reg, Reg) \
DEF_HELPER_2( name ## sd , void, Reg, Reg)
SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
SSE_HELPER_CMP(cmplt, FPU_CMPLT)
@ -203,125 +210,124 @@ SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
SSE_HELPER_CMP(cmpord, FPU_CMPORD)
DEF_HELPER(void, helper_ucomiss, (Reg *d, Reg *s))
DEF_HELPER(void, helper_comiss, (Reg *d, Reg *s))
DEF_HELPER(void, helper_ucomisd, (Reg *d, Reg *s))
DEF_HELPER(void, helper_comisd, (Reg *d, Reg *s))
DEF_HELPER(uint32_t, helper_movmskps, (Reg *s))
DEF_HELPER(uint32_t, helper_movmskpd, (Reg *s))
DEF_HELPER_2(ucomiss, void, Reg, Reg)
DEF_HELPER_2(comiss, void, Reg, Reg)
DEF_HELPER_2(ucomisd, void, Reg, Reg)
DEF_HELPER_2(comisd, void, Reg, Reg)
DEF_HELPER_1(movmskps, i32, Reg)
DEF_HELPER_1(movmskpd, i32, Reg)
#endif
DEF_HELPER(uint32_t, glue(helper_pmovmskb, SUFFIX), (Reg *s))
DEF_HELPER(void, glue(helper_packsswb, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_packuswb, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_packssdw, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER_1(glue(pmovmskb, SUFFIX), i32, Reg)
DEF_HELPER_2(glue(packsswb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(packuswb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(packssdw, SUFFIX), void, Reg, Reg)
#define UNPCK_OP(base_name, base) \
DEF_HELPER(void, glue(helper_punpck ## base_name ## bw, SUFFIX) , (Reg *d, Reg *s)) \
DEF_HELPER(void, glue(helper_punpck ## base_name ## wd, SUFFIX) , (Reg *d, Reg *s)) \
DEF_HELPER(void, glue(helper_punpck ## base_name ## dq, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER_2(glue(punpck ## base_name ## bw, SUFFIX) , void, Reg, Reg) \
DEF_HELPER_2(glue(punpck ## base_name ## wd, SUFFIX) , void, Reg, Reg) \
DEF_HELPER_2(glue(punpck ## base_name ## dq, SUFFIX) , void, Reg, Reg)
UNPCK_OP(l, 0)
UNPCK_OP(h, 1)
#if SHIFT == 1
DEF_HELPER(void, glue(helper_punpcklqdq, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_punpckhqdq, SUFFIX) , (Reg *d, Reg *s))
DEF_HELPER_2(glue(punpcklqdq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(punpckhqdq, SUFFIX), void, Reg, Reg)
#endif
/* 3DNow! float ops */
#if SHIFT == 0
DEF_HELPER(void, helper_pi2fd, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pi2fw, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pf2id, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pf2iw, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfacc, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfadd, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfcmpeq, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfcmpge, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfcmpgt, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfmax, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfmin, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfmul, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfnacc, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfpnacc, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfrcp, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfrsqrt, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfsub, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pfsubr, (MMXReg *d, MMXReg *s))
DEF_HELPER(void, helper_pswapd, (MMXReg *d, MMXReg *s))
DEF_HELPER_2(pi2fd, void, MMXReg, MMXReg)
DEF_HELPER_2(pi2fw, void, MMXReg, MMXReg)
DEF_HELPER_2(pf2id, void, MMXReg, MMXReg)
DEF_HELPER_2(pf2iw, void, MMXReg, MMXReg)
DEF_HELPER_2(pfacc, void, MMXReg, MMXReg)
DEF_HELPER_2(pfadd, void, MMXReg, MMXReg)
DEF_HELPER_2(pfcmpeq, void, MMXReg, MMXReg)
DEF_HELPER_2(pfcmpge, void, MMXReg, MMXReg)
DEF_HELPER_2(pfcmpgt, void, MMXReg, MMXReg)
DEF_HELPER_2(pfmax, void, MMXReg, MMXReg)
DEF_HELPER_2(pfmin, void, MMXReg, MMXReg)
DEF_HELPER_2(pfmul, void, MMXReg, MMXReg)
DEF_HELPER_2(pfnacc, void, MMXReg, MMXReg)
DEF_HELPER_2(pfpnacc, void, MMXReg, MMXReg)
DEF_HELPER_2(pfrcp, void, MMXReg, MMXReg)
DEF_HELPER_2(pfrsqrt, void, MMXReg, MMXReg)
DEF_HELPER_2(pfsub, void, MMXReg, MMXReg)
DEF_HELPER_2(pfsubr, void, MMXReg, MMXReg)
DEF_HELPER_2(pswapd, void, MMXReg, MMXReg)
#endif
/* SSSE3 op helpers */
DEF_HELPER(void, glue(helper_phaddw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_phaddd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_phaddsw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_phsubw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_phsubd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_phsubsw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pabsb, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pabsw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pabsd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmaddubsw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmulhrsw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pshufb, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psignb, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psignw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_psignd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_palignr, SUFFIX), (Reg *d, Reg *s, int32_t shift))
DEF_HELPER_2(glue(phaddw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(phaddd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(phaddsw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(phsubw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(phsubd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(phsubsw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pabsb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pabsw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pabsd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmaddubsw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmulhrsw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pshufb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psignb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psignw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(psignd, SUFFIX), void, Reg, Reg)
DEF_HELPER_3(glue(palignr, SUFFIX), void, Reg, Reg, s32)
/* SSE4.1 op helpers */
#if SHIFT == 1
DEF_HELPER(void, glue(helper_pblendvb, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_blendvps, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_blendvpd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_ptest, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovsxbw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovsxbd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovsxbq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovsxwd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovsxwq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovsxdq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovzxbw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovzxbd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovzxbq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovzxwd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovzxwq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmovzxdq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmuldq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pcmpeqq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_packusdw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pminsb, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pminsd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pminuw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pminud, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmaxsb, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmaxsd, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmaxuw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmaxud, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pmulld, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_phminposuw, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_roundps, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
DEF_HELPER(void, glue(helper_roundpd, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
DEF_HELPER(void, glue(helper_roundss, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
DEF_HELPER(void, glue(helper_roundsd, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
DEF_HELPER(void, glue(helper_blendps, SUFFIX), (Reg *d, Reg *s, uint32_t imm))
DEF_HELPER(void, glue(helper_blendpd, SUFFIX), (Reg *d, Reg *s, uint32_t imm))
DEF_HELPER(void, glue(helper_pblendw, SUFFIX), (Reg *d, Reg *s, uint32_t imm))
DEF_HELPER(void, glue(helper_dpps, SUFFIX), (Reg *d, Reg *s, uint32_t mask))
DEF_HELPER(void, glue(helper_dppd, SUFFIX), (Reg *d, Reg *s, uint32_t mask))
DEF_HELPER(void, glue(helper_mpsadbw, SUFFIX), (Reg *d, Reg *s, uint32_t off))
DEF_HELPER_2(glue(pblendvb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(blendvps, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(blendvpd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(ptest, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovsxbw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovsxbd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovsxbq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovsxwd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovsxwq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovsxdq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovzxbw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovzxbd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovzxbq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovzxwd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovzxwq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmovzxdq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmuldq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pcmpeqq, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(packusdw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pminsb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pminsd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pminuw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pminud, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmaxsb, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmaxsd, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmaxuw, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmaxud, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(pmulld, SUFFIX), void, Reg, Reg)
DEF_HELPER_2(glue(phminposuw, SUFFIX), void, Reg, Reg)
DEF_HELPER_3(glue(roundps, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(roundpd, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(roundss, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(roundsd, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(blendps, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(blendpd, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(pblendw, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(dpps, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(dppd, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(mpsadbw, SUFFIX), void, Reg, Reg, i32)
#endif
/* SSE4.2 op helpers */
#if SHIFT == 1
DEF_HELPER(void, glue(helper_pcmpgtq, SUFFIX), (Reg *d, Reg *s))
DEF_HELPER(void, glue(helper_pcmpestri, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
DEF_HELPER(void, glue(helper_pcmpestrm, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
DEF_HELPER(void, glue(helper_pcmpistri, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
DEF_HELPER(void, glue(helper_pcmpistrm, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
DEF_HELPER(target_ulong, helper_crc32,
(uint32_t crc1, target_ulong msg, uint32_t len))
DEF_HELPER(target_ulong, helper_popcnt, (target_ulong n, uint32_t type))
DEF_HELPER_2(glue(pcmpgtq, SUFFIX), void, Reg, Reg)
DEF_HELPER_3(glue(pcmpestri, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(pcmpestrm, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(pcmpistri, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(glue(pcmpistrm, SUFFIX), void, Reg, Reg, i32)
DEF_HELPER_3(crc32, tl, i32, tl, i32)
DEF_HELPER_2(popcnt, tl, tl, i32)
#endif
#undef SHIFT

1009
target-i386/translate.c
View File

File diff suppressed because it is too large Load Diff

182
target-m68k/helpers.h
View File

@ -1,138 +1,54 @@
#ifndef DEF_HELPER
#define DEF_HELPER(name, ret, args) ret glue(helper_,name) args;
#endif
#include "def-helper.h"
#ifdef GEN_HELPER
#define DEF_HELPER_0_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(void) \
{ \
tcg_gen_helper_0_0(helper_##name); \
}
#define DEF_HELPER_0_1(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv arg1) \
{ \
tcg_gen_helper_0_1(helper_##name, arg1); \
}
#define DEF_HELPER_0_2(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv arg1, TCGv arg2) \
{ \
tcg_gen_helper_0_2(helper_##name, arg1, arg2); \
}
#define DEF_HELPER_0_3(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name( \
TCGv arg1, TCGv arg2, TCGv arg3) \
{ \
tcg_gen_helper_0_3(helper_##name, arg1, arg2, arg3); \
}
#define DEF_HELPER_1_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret) \
{ \
tcg_gen_helper_1_0(helper_##name, ret); \
}
#define DEF_HELPER_1_1(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, TCGv arg1) \
{ \
tcg_gen_helper_1_1(helper_##name, ret, arg1); \
}
#define DEF_HELPER_1_2(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, TCGv arg1, TCGv arg2) \
{ \
tcg_gen_helper_1_2(helper_##name, ret, arg1, arg2); \
}
#define DEF_HELPER_1_3(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, \
TCGv arg1, TCGv arg2, TCGv arg3) \
{ \
tcg_gen_helper_1_3(helper_##name, ret, arg1, arg2, arg3); \
}
#define DEF_HELPER_1_4(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret, \
TCGv arg1, TCGv arg2, TCGv arg3, TCGv arg4) \
{ \
tcg_gen_helper_1_4(helper_##name, ret, arg1, arg2, arg3, arg4); \
}
#else /* !GEN_HELPER */
#define DEF_HELPER_0_0 DEF_HELPER
#define DEF_HELPER_0_1 DEF_HELPER
#define DEF_HELPER_0_2 DEF_HELPER
#define DEF_HELPER_0_3 DEF_HELPER
#define DEF_HELPER_1_0 DEF_HELPER
#define DEF_HELPER_1_1 DEF_HELPER
#define DEF_HELPER_1_2 DEF_HELPER
#define DEF_HELPER_1_3 DEF_HELPER
#define DEF_HELPER_1_4 DEF_HELPER
#define HELPER(x) glue(helper_,x)
#endif
DEF_HELPER_1(bitrev, i32, i32)
DEF_HELPER_1(ff1, i32, i32)
DEF_HELPER_2(sats, i32, i32, i32)
DEF_HELPER_2(divu, void, env, i32)
DEF_HELPER_2(divs, void, env, i32)
DEF_HELPER_3(addx_cc, i32, env, i32, i32)
DEF_HELPER_3(subx_cc, i32, env, i32, i32)
DEF_HELPER_3(shl_cc, i32, env, i32, i32)
DEF_HELPER_3(shr_cc, i32, env, i32, i32)
DEF_HELPER_3(sar_cc, i32, env, i32, i32)
DEF_HELPER_2(xflag_lt, i32, i32, i32)
DEF_HELPER_2(set_sr, void, env, i32)
DEF_HELPER_3(movec, void, env, i32, i32)
DEF_HELPER_1_1(bitrev, uint32_t, (uint32_t))
DEF_HELPER_1_1(ff1, uint32_t, (uint32_t))
DEF_HELPER_1_2(sats, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_0_2(divu, void, (CPUState *, uint32_t))
DEF_HELPER_0_2(divs, void, (CPUState *, uint32_t))
DEF_HELPER_1_3(addx_cc, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(subx_cc, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(shl_cc, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(shr_cc, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(sar_cc, uint32_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_2(xflag_lt, uint32_t, (uint32_t, uint32_t))
DEF_HELPER_0_2(set_sr, void, (CPUState *, uint32_t))
DEF_HELPER_0_3(movec, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_2(f64_to_i32, f32, env, f64)
DEF_HELPER_2(f64_to_f32, f32, env, f64)
DEF_HELPER_2(i32_to_f64, f64, env, i32)
DEF_HELPER_2(f32_to_f64, f64, env, f32)
DEF_HELPER_2(iround_f64, f64, env, f64)
DEF_HELPER_2(itrunc_f64, f64, env, f64)
DEF_HELPER_2(sqrt_f64, f64, env, f64)
DEF_HELPER_1(abs_f64, f64, f64)
DEF_HELPER_1(chs_f64, f64, f64)
DEF_HELPER_3(add_f64, f64, env, f64, f64)
DEF_HELPER_3(sub_f64, f64, env, f64, f64)
DEF_HELPER_3(mul_f64, f64, env, f64, f64)
DEF_HELPER_3(div_f64, f64, env, f64, f64)
DEF_HELPER_3(sub_cmp_f64, f64, env, f64, f64)
DEF_HELPER_2(compare_f64, i32, env, f64)
DEF_HELPER_1_2(f64_to_i32, float32, (CPUState *, float64))
DEF_HELPER_1_2(f64_to_f32, float32, (CPUState *, float64))
DEF_HELPER_1_2(i32_to_f64, float64, (CPUState *, uint32_t))
DEF_HELPER_1_2(f32_to_f64, float64, (CPUState *, float32))
DEF_HELPER_1_2(iround_f64, float64, (CPUState *, float64))
DEF_HELPER_1_2(itrunc_f64, float64, (CPUState *, float64))
DEF_HELPER_1_2(sqrt_f64, float64, (CPUState *, float64))
DEF_HELPER_1_1(abs_f64, float64, (float64))
DEF_HELPER_1_1(chs_f64, float64, (float64))
DEF_HELPER_1_3(add_f64, float64, (CPUState *, float64, float64))
DEF_HELPER_1_3(sub_f64, float64, (CPUState *, float64, float64))
DEF_HELPER_1_3(mul_f64, float64, (CPUState *, float64, float64))
DEF_HELPER_1_3(div_f64, float64, (CPUState *, float64, float64))
DEF_HELPER_1_3(sub_cmp_f64, float64, (CPUState *, float64, float64))
DEF_HELPER_1_2(compare_f64, uint32_t, (CPUState *, float64))
DEF_HELPER_3(mac_move, void, env, i32, i32)
DEF_HELPER_3(macmulf, i64, env, i32, i32)
DEF_HELPER_3(macmuls, i64, env, i32, i32)
DEF_HELPER_3(macmulu, i64, env, i32, i32)
DEF_HELPER_2(macsats, void, env, i32)
DEF_HELPER_2(macsatu, void, env, i32)
DEF_HELPER_2(macsatf, void, env, i32)
DEF_HELPER_2(mac_set_flags, void, env, i32)
DEF_HELPER_2(set_macsr, void, env, i32)
DEF_HELPER_2(get_macf, i32, env, i64)
DEF_HELPER_1(get_macs, i32, i64)
DEF_HELPER_1(get_macu, i32, i64)
DEF_HELPER_2(get_mac_extf, i32, env, i32)
DEF_HELPER_2(get_mac_exti, i32, env, i32)
DEF_HELPER_3(set_mac_extf, void, env, i32, i32)
DEF_HELPER_3(set_mac_exts, void, env, i32, i32)
DEF_HELPER_3(set_mac_extu, void, env, i32, i32)
DEF_HELPER_0_3(mac_move, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(macmulf, uint64_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(macmuls, uint64_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_3(macmulu, uint64_t, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_0_2(macsats, void, (CPUState *, uint32_t))
DEF_HELPER_0_2(macsatu, void, (CPUState *, uint32_t))
DEF_HELPER_0_2(macsatf, void, (CPUState *, uint32_t))
DEF_HELPER_0_2(mac_set_flags, void, (CPUState *, uint32_t))
DEF_HELPER_0_2(set_macsr, void, (CPUState *, uint32_t))
DEF_HELPER_1_2(get_macf, uint32_t, (CPUState *, uint64_t))
DEF_HELPER_1_1(get_macs, uint32_t, (uint64_t))
DEF_HELPER_1_1(get_macu, uint32_t, (uint64_t))
DEF_HELPER_1_2(get_mac_extf, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_1_2(get_mac_exti, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_0_3(set_mac_extf, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_0_3(set_mac_exts, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_0_3(set_mac_extu, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_2(flush_flags, void, env, i32)
DEF_HELPER_1(raise_exception, void, i32)
DEF_HELPER_0_2(flush_flags, void, (CPUState *, uint32_t))
DEF_HELPER_0_1(raise_exception, void, (uint32_t))
#undef DEF_HELPER
#undef DEF_HELPER_0_0
#undef DEF_HELPER_0_1
#undef DEF_HELPER_0_2
#undef DEF_HELPER_0_3
#undef DEF_HELPER_1_0
#undef DEF_HELPER_1_1
#undef DEF_HELPER_1_2
#undef DEF_HELPER_1_3
#undef DEF_HELPER_1_4
#undef GEN_HELPER
#undef DEF_HELPER
#include "def-helper.h"

363
target-m68k/translate.c
View File

@ -32,37 +32,32 @@
#include "tcg-op.h"
#include "qemu-log.h"
#include "helpers.h"
#define GEN_HELPER 1
#include "helpers.h"
//#define DEBUG_DISPATCH 1
/* Fake floating point. */
#define TCG_TYPE_F32 TCG_TYPE_I32
#define TCG_TYPE_F64 TCG_TYPE_I64
#define tcg_gen_mov_f64 tcg_gen_mov_i64
#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
#define gen_helper_pack_32_f32 tcg_gen_mov_i32
#define gen_helper_pack_f32_32 tcg_gen_mov_i32
#define DEFO32(name, offset) static TCGv QREG_##name;
#define DEFO64(name, offset) static TCGv QREG_##name;
#define DEFF64(name, offset) static TCGv QREG_##name;
#define DEFO64(name, offset) static TCGv_i64 QREG_##name;
#define DEFF64(name, offset) static TCGv_i64 QREG_##name;
#include "qregs.def"
#undef DEFO32
#undef DEFO64
#undef DEFF64
static TCGv cpu_env;
static TCGv_ptr cpu_env;
static char cpu_reg_names[3*8*3 + 5*4];
static TCGv cpu_dregs[8];
static TCGv cpu_aregs[8];
static TCGv cpu_fregs[8];
static TCGv cpu_macc[4];
static TCGv_i64 cpu_fregs[8];
static TCGv_i64 cpu_macc[4];
#define DREG(insn, pos) cpu_dregs[((insn) >> (pos)) & 7]
#define AREG(insn, pos) cpu_aregs[((insn) >> (pos)) & 7]
@ -71,7 +66,7 @@ static TCGv cpu_macc[4];
#define QREG_SP cpu_aregs[7]
static TCGv NULL_QREG;
#define IS_NULL_QREG(t) (GET_TCGV(t) == GET_TCGV(NULL_QREG))
#define IS_NULL_QREG(t) (TCGV_EQUAL(t, NULL_QREG))
/* Used to distinguish stores from bad addressing modes. */
static TCGv store_dummy;
@ -82,43 +77,42 @@ void m68k_tcg_init(void)
char *p;
int i;
#define DEFO32(name, offset) QREG_##name = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, offsetof(CPUState, offset), #name);
#define DEFO64(name, offset) QREG_##name = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0, offsetof(CPUState, offset), #name);
#define DEFO32(name, offset) QREG_##name = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, offset), #name);
#define DEFO64(name, offset) QREG_##name = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUState, offset), #name);
#define DEFF64(name, offset) DEFO64(name, offset)
#include "qregs.def"
#undef DEFO32
#undef DEFO64
#undef DEFF64
cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
p = cpu_reg_names;
for (i = 0; i < 8; i++) {
sprintf(p, "D%d", i);
cpu_dregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
cpu_dregs[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUM68KState, dregs[i]), p);
p += 3;
sprintf(p, "A%d", i);
cpu_aregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
cpu_aregs[i] = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUM68KState, aregs[i]), p);
p += 3;
sprintf(p, "F%d", i);
cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_F64, TCG_AREG0,
cpu_fregs[i] = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUM68KState, fregs[i]), p);
p += 3;
}
for (i = 0; i < 4; i++) {
sprintf(p, "ACC%d", i);
cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0,
cpu_macc[i] = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUM68KState, macc[i]), p);
p += 5;
}
NULL_QREG = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, -4, "NULL");
store_dummy = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, -8, "NULL");
NULL_QREG = tcg_global_mem_new(TCG_AREG0, -4, "NULL");
store_dummy = tcg_global_mem_new(TCG_AREG0, -8, "NULL");
#define DEF_HELPER(name, ret, args) \
tcg_register_helper(HELPER(name), #name);
#define GEN_HELPER 2
#include "helpers.h"
}
@ -142,7 +136,8 @@ typedef struct DisasContext {
struct TranslationBlock *tb;
int singlestep_enabled;
int is_mem;
TCGv mactmp;
TCGv_i64 mactmp;
int done_mac;
} DisasContext;
#define DISAS_JUMP_NEXT 4
@ -181,15 +176,6 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
/* FIXME: Remove this. */
#define gen_im32(val) tcg_const_i32(val)
#define QMODE_I32 TCG_TYPE_I32
#define QMODE_I64 TCG_TYPE_I64
#define QMODE_F32 TCG_TYPE_F32
#define QMODE_F64 TCG_TYPE_F64
static inline TCGv gen_new_qreg(int mode)
{
return tcg_temp_new(mode);
}
/* Generate a load from the specified address. Narrow values are
sign extended to full register width. */
static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)
@ -197,32 +183,23 @@ static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)
TCGv tmp;
int index = IS_USER(s);
s->is_mem = 1;
tmp = tcg_temp_new_i32();
switch(opsize) {
case OS_BYTE:
tmp = gen_new_qreg(QMODE_I32);
if (sign)
tcg_gen_qemu_ld8s(tmp, addr, index);
else
tcg_gen_qemu_ld8u(tmp, addr, index);
break;
case OS_WORD:
tmp = gen_new_qreg(QMODE_I32);
if (sign)
tcg_gen_qemu_ld16s(tmp, addr, index);
else
tcg_gen_qemu_ld16u(tmp, addr, index);
break;
case OS_LONG:
tmp = gen_new_qreg(QMODE_I32);
tcg_gen_qemu_ld32u(tmp, addr, index);
break;
case OS_SINGLE:
tmp = gen_new_qreg(QMODE_F32);
tcg_gen_qemu_ldf32(tmp, addr, index);
break;
case OS_DOUBLE:
tmp = gen_new_qreg(QMODE_F64);
tcg_gen_qemu_ldf64(tmp, addr, index);
tcg_gen_qemu_ld32u(tmp, addr, index);
break;
default:
qemu_assert(0, "bad load size");
@ -231,6 +208,17 @@ static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)
return tmp;
}
static inline TCGv_i64 gen_load64(DisasContext * s, TCGv addr)
{
TCGv_i64 tmp;
int index = IS_USER(s);
s->is_mem = 1;
tmp = tcg_temp_new_i64();
tcg_gen_qemu_ldf64(tmp, addr, index);
gen_throws_exception = gen_last_qop;
return tmp;
}
/* Generate a store. */
static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
{
@ -244,13 +232,8 @@ static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
tcg_gen_qemu_st16(val, addr, index);
break;
case OS_LONG:
tcg_gen_qemu_st32(val, addr, index);
break;
case OS_SINGLE:
tcg_gen_qemu_stf32(val, addr, index);
break;
case OS_DOUBLE:
tcg_gen_qemu_stf64(val, addr, index);
tcg_gen_qemu_st32(val, addr, index);
break;
default:
qemu_assert(0, "bad store size");
@ -258,6 +241,14 @@ static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val)
gen_throws_exception = gen_last_qop;
}
static inline void gen_store64(DisasContext *s, TCGv addr, TCGv_i64 val)
{
int index = IS_USER(s);
s->is_mem = 1;
tcg_gen_qemu_stf64(val, addr, index);
gen_throws_exception = gen_last_qop;
}
typedef enum {
EA_STORE,
EA_LOADU,
@ -340,7 +331,7 @@ static TCGv gen_lea_indexed(DisasContext *s, int opsize, TCGv base)
} else {
bd = 0;
}
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
if ((ext & 0x44) == 0) {
/* pre-index */
add = gen_addr_index(ext, tmp);
@ -396,7 +387,7 @@ static TCGv gen_lea_indexed(DisasContext *s, int opsize, TCGv base)
}
} else {
/* brief extension word format */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
add = gen_addr_index(ext, tmp);
if (!IS_NULL_QREG(base)) {
tcg_gen_add_i32(tmp, add, base);
@ -461,21 +452,19 @@ static void gen_partset_reg(int opsize, TCGv reg, TCGv val)
switch (opsize) {
case OS_BYTE:
tcg_gen_andi_i32(reg, reg, 0xffffff00);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_ext8u_i32(tmp, val);
tcg_gen_or_i32(reg, reg, tmp);
break;
case OS_WORD:
tcg_gen_andi_i32(reg, reg, 0xffff0000);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_ext16u_i32(tmp, val);
tcg_gen_or_i32(reg, reg, tmp);
break;
case OS_LONG:
tcg_gen_mov_i32(reg, val);
break;
case OS_SINGLE:
gen_helper_pack_32_f32(reg, val);
tcg_gen_mov_i32(reg, val);
break;
default:
qemu_assert(0, "Bad operand size");
@ -490,25 +479,22 @@ static inline TCGv gen_extend(TCGv val, int opsize, int sign)
switch (opsize) {
case OS_BYTE:
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
if (sign)
tcg_gen_ext8s_i32(tmp, val);
else
tcg_gen_ext8u_i32(tmp, val);
break;
case OS_WORD:
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
if (sign)
tcg_gen_ext16s_i32(tmp, val);
else
tcg_gen_ext16u_i32(tmp, val);
break;
case OS_LONG:
tmp = val;
break;
case OS_SINGLE:
tmp = gen_new_qreg(QMODE_F32);
gen_helper_pack_f32_32(tmp, val);
tmp = val;
break;
default:
qemu_assert(0, "Bad operand size");
@ -534,12 +520,12 @@ static TCGv gen_lea(DisasContext *s, uint16_t insn, int opsize)
return AREG(insn, 0);
case 4: /* Indirect predecrememnt. */
reg = AREG(insn, 0);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_subi_i32(tmp, reg, opsize_bytes(opsize));
return tmp;
case 5: /* Indirect displacement. */
reg = AREG(insn, 0);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
ext = lduw_code(s->pc);
s->pc += 2;
tcg_gen_addi_i32(tmp, reg, (int16_t)ext);
@ -557,7 +543,7 @@ static TCGv gen_lea(DisasContext *s, uint16_t insn, int opsize)
offset = read_im32(s);
return gen_im32(offset);
case 2: /* pc displacement */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
offset = s->pc;
offset += ldsw_code(s->pc);
s->pc += 2;
@ -708,57 +694,57 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1)
case 1: /* F */
break;
case 2: /* HI (!C && !Z) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C | CCF_Z);
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 3: /* LS (C || Z) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C | CCF_Z);
tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
break;
case 4: /* CC (!C) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C);
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 5: /* CS (C) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C);
tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
break;
case 6: /* NE (!Z) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_Z);
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 7: /* EQ (Z) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_Z);
tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
break;
case 8: /* VC (!V) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_V);
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 9: /* VS (V) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_V);
tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
break;
case 10: /* PL (!N) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N);
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 11: /* MI (N) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N);
tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
break;
case 12: /* GE (!(N ^ V)) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
assert(CCF_V == (CCF_N >> 2));
tcg_gen_shri_i32(tmp, QREG_CC_DEST, 2);
tcg_gen_xor_i32(tmp, tmp, QREG_CC_DEST);
@ -766,7 +752,7 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1)
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 13: /* LT (N ^ V) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
assert(CCF_V == (CCF_N >> 2));
tcg_gen_shri_i32(tmp, QREG_CC_DEST, 2);
tcg_gen_xor_i32(tmp, tmp, QREG_CC_DEST);
@ -774,7 +760,7 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1)
tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
break;
case 14: /* GT (!(Z || (N ^ V))) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
assert(CCF_V == (CCF_N >> 2));
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N);
tcg_gen_shri_i32(tmp, tmp, 2);
@ -783,7 +769,7 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1)
tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
break;
case 15: /* LE (Z || (N ^ V)) */
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
assert(CCF_V == (CCF_N >> 2));
tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N);
tcg_gen_shri_i32(tmp, tmp, 2);
@ -912,7 +898,7 @@ DISAS_INSN(mulw)
sign = (insn & 0x100) != 0;
reg = DREG(insn, 9);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
if (sign)
tcg_gen_ext16s_i32(tmp, reg);
else
@ -946,8 +932,8 @@ DISAS_INSN(divw)
gen_helper_divu(cpu_env, tcg_const_i32(1));
}
tmp = gen_new_qreg(QMODE_I32);
src = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
src = tcg_temp_new();
tcg_gen_ext16u_i32(tmp, QREG_DIV1);
tcg_gen_shli_i32(src, QREG_DIV2, 16);
tcg_gen_or_i32(reg, tmp, src);
@ -998,7 +984,7 @@ DISAS_INSN(addsub)
add = (insn & 0x4000) != 0;
reg = DREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
if (insn & 0x100) {
SRC_EA(tmp, OS_LONG, 0, &addr);
src = reg;
@ -1049,16 +1035,16 @@ DISAS_INSN(bitop_reg)
op = (insn >> 6) & 3;
SRC_EA(src1, opsize, 0, op ? &addr: NULL);
src2 = DREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
gen_flush_flags(s);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
if (opsize == OS_BYTE)
tcg_gen_andi_i32(tmp, src2, 7);
else
tcg_gen_andi_i32(tmp, src2, 31);
src2 = tmp;
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_shr_i32(tmp, src1, src2);
tcg_gen_andi_i32(tmp, tmp, 1);
tcg_gen_shli_i32(tmp, tmp, 2);
@ -1098,7 +1084,7 @@ static void gen_push(DisasContext *s, TCGv val)
{
TCGv tmp;
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_subi_i32(tmp, QREG_SP, 4);
gen_store(s, OS_LONG, tmp, val);
tcg_gen_mov_i32(QREG_SP, tmp);
@ -1120,7 +1106,7 @@ DISAS_INSN(movem)
gen_addr_fault(s);
return;
}
addr = gen_new_qreg(QMODE_I32);
addr = tcg_temp_new();
tcg_gen_mov_i32(addr, tmp);
is_load = ((insn & 0x0400) != 0);
for (i = 0; i < 16; i++, mask >>= 1) {
@ -1173,7 +1159,7 @@ DISAS_INSN(bitop_im)
bitnum &= 31;
mask = 1 << bitnum;
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
assert (CCF_Z == (1 << 2));
if (bitnum > 2)
tcg_gen_shri_i32(tmp, src1, bitnum - 2);
@ -1214,7 +1200,7 @@ DISAS_INSN(arith_im)
op = (insn >> 9) & 7;
SRC_EA(src1, OS_LONG, 0, (op == 6) ? NULL : &addr);
im = read_im32(s);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
switch (op) {
case 0: /* ori */
tcg_gen_ori_i32(dest, src1, im);
@ -1350,7 +1336,7 @@ static TCGv gen_get_ccr(DisasContext *s)
TCGv dest;
gen_flush_flags(s);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
tcg_gen_shli_i32(dest, QREG_CC_X, 4);
tcg_gen_or_i32(dest, dest, QREG_CC_DEST);
return dest;
@ -1372,7 +1358,7 @@ DISAS_INSN(neg)
TCGv src1;
reg = DREG(insn, 0);
src1 = gen_new_qreg(QMODE_I32);
src1 = tcg_temp_new();
tcg_gen_mov_i32(src1, reg);
tcg_gen_neg_i32(reg, src1);
s->cc_op = CC_OP_SUB;
@ -1398,7 +1384,7 @@ static void gen_set_sr(DisasContext *s, uint16_t insn, int ccr_only)
s->cc_op = CC_OP_FLAGS;
if ((insn & 0x38) == 0)
{
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
reg = DREG(insn, 0);
tcg_gen_andi_i32(QREG_CC_DEST, reg, 0xf);
tcg_gen_shri_i32(tmp, reg, 4);
@ -1438,8 +1424,8 @@ DISAS_INSN(swap)
TCGv src2;
TCGv reg;
src1 = gen_new_qreg(QMODE_I32);
src2 = gen_new_qreg(QMODE_I32);
src1 = tcg_temp_new();
src2 = tcg_temp_new();
reg = DREG(insn, 0);
tcg_gen_shli_i32(src1, reg, 16);
tcg_gen_shri_i32(src2, reg, 16);
@ -1467,7 +1453,7 @@ DISAS_INSN(ext)
reg = DREG(insn, 0);
op = (insn >> 6) & 7;
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
if (op == 3)
tcg_gen_ext16s_i32(tmp, reg);
else
@ -1518,7 +1504,7 @@ DISAS_INSN(tas)
TCGv src1;
TCGv addr;
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
SRC_EA(src1, OS_BYTE, 1, &addr);
gen_logic_cc(s, src1);
tcg_gen_ori_i32(dest, src1, 0x80);
@ -1542,7 +1528,7 @@ DISAS_INSN(mull)
}
reg = DREG(ext, 12);
SRC_EA(src1, OS_LONG, 0, NULL);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
tcg_gen_mul_i32(dest, src1, reg);
tcg_gen_mov_i32(reg, dest);
/* Unlike m68k, coldfire always clears the overflow bit. */
@ -1558,7 +1544,7 @@ DISAS_INSN(link)
offset = ldsw_code(s->pc);
s->pc += 2;
reg = AREG(insn, 0);
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_subi_i32(tmp, QREG_SP, 4);
gen_store(s, OS_LONG, tmp, reg);
if ((insn & 7) != 7)
@ -1572,7 +1558,7 @@ DISAS_INSN(unlk)
TCGv reg;
TCGv tmp;
src = gen_new_qreg(QMODE_I32);
src = tcg_temp_new();
reg = AREG(insn, 0);
tcg_gen_mov_i32(src, reg);
tmp = gen_load(s, OS_LONG, src, 0);
@ -1623,7 +1609,7 @@ DISAS_INSN(addsubq)
val = (insn >> 9) & 7;
if (val == 0)
val = 8;
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
tcg_gen_mov_i32(dest, src1);
if ((insn & 0x38) == 0x08) {
/* Don't update condition codes if the destination is an
@ -1732,7 +1718,7 @@ DISAS_INSN(or)
TCGv addr;
reg = DREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
if (insn & 0x100) {
SRC_EA(src, OS_LONG, 0, &addr);
tcg_gen_or_i32(dest, src, reg);
@ -1806,7 +1792,7 @@ DISAS_INSN(cmp)
}
SRC_EA(src, opsize, 1, NULL);
reg = DREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
tcg_gen_sub_i32(dest, reg, src);
gen_update_cc_add(dest, src);
}
@ -1825,7 +1811,7 @@ DISAS_INSN(cmpa)
}
SRC_EA(src, opsize, 1, NULL);
reg = AREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
tcg_gen_sub_i32(dest, reg, src);
gen_update_cc_add(dest, src);
s->cc_op = CC_OP_SUB;
@ -1840,7 +1826,7 @@ DISAS_INSN(eor)
SRC_EA(src, OS_LONG, 0, &addr);
reg = DREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
tcg_gen_xor_i32(dest, src, reg);
gen_logic_cc(s, dest);
DEST_EA(insn, OS_LONG, dest, &addr);
@ -1854,7 +1840,7 @@ DISAS_INSN(and)
TCGv addr;
reg = DREG(insn, 9);
dest = gen_new_qreg(QMODE_I32);
dest = tcg_temp_new();
if (insn & 0x100) {
SRC_EA(src, OS_LONG, 0, &addr);
tcg_gen_and_i32(dest, src, reg);
@ -1949,7 +1935,7 @@ static TCGv gen_get_sr(DisasContext *s)
TCGv sr;
ccr = gen_get_ccr(s);
sr = gen_new_qreg(QMODE_I32);
sr = tcg_temp_new();
tcg_gen_andi_i32(sr, QREG_SR, 0xffe0);
tcg_gen_or_i32(sr, sr, ccr);
return sr;
@ -2117,11 +2103,14 @@ DISAS_INSN(trap)
DISAS_INSN(fpu)
{
uint16_t ext;
int32_t offset;
int opmode;
TCGv src;
TCGv dest;
TCGv res;
TCGv_i64 src;
TCGv_i64 dest;
TCGv_i64 res;
TCGv tmp32;
int round;
int set_dest;
int opsize;
ext = lduw_code(s->pc);
@ -2134,37 +2123,59 @@ DISAS_INSN(fpu)
goto undef;
case 3: /* fmove out */
src = FREG(ext, 7);
tmp32 = tcg_temp_new_i32();
/* fmove */
/* ??? TODO: Proper behavior on overflow. */
switch ((ext >> 10) & 7) {
case 0:
opsize = OS_LONG;
res = gen_new_qreg(QMODE_I32);
gen_helper_f64_to_i32(res, cpu_env, src);
gen_helper_f64_to_i32(tmp32, cpu_env, src);
break;
case 1:
opsize = OS_SINGLE;
res = gen_new_qreg(QMODE_F32);
gen_helper_f64_to_f32(res, cpu_env, src);
gen_helper_f64_to_f32(tmp32, cpu_env, src);
break;
case 4:
opsize = OS_WORD;
res = gen_new_qreg(QMODE_I32);
gen_helper_f64_to_i32(res, cpu_env, src);
break;
case 5:
opsize = OS_DOUBLE;
res = src;
gen_helper_f64_to_i32(tmp32, cpu_env, src);
break;
case 5: /* OS_DOUBLE */
tcg_gen_mov_i32(tmp32, AREG(insn, 0));
switch (insn >> 3) {
case 2:
case 3:
case 4:
tcg_gen_addi_i32(tmp32, tmp32, -8);
break;
case 5:
offset = ldsw_code(s->pc);
s->pc += 2;
tcg_gen_addi_i32(tmp32, tmp32, offset);
break;
default:
goto undef;
}
gen_store64(s, tmp32, src);
switch (insn >> 3) {
case 3:
tcg_gen_addi_i32(tmp32, tmp32, 8);
tcg_gen_mov_i32(AREG(insn, 0), tmp32);
break;
case 4:
tcg_gen_mov_i32(AREG(insn, 0), tmp32);
break;
}
tcg_temp_free_i32(tmp32);
return;
case 6:
opsize = OS_BYTE;
res = gen_new_qreg(QMODE_I32);
gen_helper_f64_to_i32(res, cpu_env, src);
gen_helper_f64_to_i32(tmp32, cpu_env, src);
break;
default:
goto undef;
}
DEST_EA(insn, opsize, res, NULL);
DEST_EA(insn, opsize, tmp32, NULL);
tcg_temp_free_i32(tmp32);
return;
case 4: /* fmove to control register. */
switch ((ext >> 10) & 7) {
@ -2182,7 +2193,7 @@ DISAS_INSN(fpu)
switch ((ext >> 10) & 7) {
case 4: /* FPCR */
/* Not implemented. Always return zero. */
res = gen_im32(0);
tmp32 = gen_im32(0);
break;
case 1: /* FPIAR */
case 2: /* FPSR */
@ -2191,7 +2202,7 @@ DISAS_INSN(fpu)
(ext >> 10) & 7);
goto undef;
}
DEST_EA(insn, OS_LONG, res, NULL);
DEST_EA(insn, OS_LONG, tmp32, NULL);
break;
case 6: /* fmovem */
case 7:
@ -2201,13 +2212,13 @@ DISAS_INSN(fpu)
int i;
if ((ext & 0x1f00) != 0x1000 || (ext & 0xff) == 0)
goto undef;
src = gen_lea(s, insn, OS_LONG);
if (IS_NULL_QREG(src)) {
tmp32 = gen_lea(s, insn, OS_LONG);
if (IS_NULL_QREG(tmp32)) {
gen_addr_fault(s);
return;
}
addr = gen_new_qreg(QMODE_I32);
tcg_gen_mov_i32(addr, src);
addr = tcg_temp_new_i32();
tcg_gen_mov_i32(addr, tmp32);
mask = 0x80;
for (i = 0; i < 8; i++) {
if (ext & mask) {
@ -2225,12 +2236,11 @@ DISAS_INSN(fpu)
}
mask >>= 1;
}
tcg_temp_free_i32(tmp32);
}
return;
}
if (ext & (1 << 14)) {
TCGv tmp;
/* Source effective address. */
switch ((ext >> 10) & 7) {
case 0: opsize = OS_LONG; break;
@ -2241,19 +2251,51 @@ DISAS_INSN(fpu)
default:
goto undef;
}
SRC_EA(tmp, opsize, 1, NULL);
if (opsize == OS_DOUBLE) {
src = tmp;
tmp32 = tcg_temp_new_i32();
tcg_gen_mov_i32(tmp32, AREG(insn, 0));
switch (insn >> 3) {
case 2:
case 3:
case 4:
tcg_gen_addi_i32(tmp32, tmp32, -8);
break;
case 5:
offset = ldsw_code(s->pc);
s->pc += 2;
tcg_gen_addi_i32(tmp32, tmp32, offset);
break;
case 7:
offset = ldsw_code(s->pc);
offset += s->pc - 2;
s->pc += 2;
tcg_gen_addi_i32(tmp32, tmp32, offset);
break;
default:
goto undef;
}
src = gen_load64(s, tmp32);
switch (insn >> 3) {
case 3:
tcg_gen_addi_i32(tmp32, tmp32, 8);
tcg_gen_mov_i32(AREG(insn, 0), tmp32);
break;
case 4:
tcg_gen_mov_i32(AREG(insn, 0), tmp32);
break;
}
tcg_temp_free_i32(tmp32);
} else {
src = gen_new_qreg(QMODE_F64);
SRC_EA(tmp32, opsize, 1, NULL);
src = tcg_temp_new_i64();
switch (opsize) {
case OS_LONG:
case OS_WORD:
case OS_BYTE:
gen_helper_i32_to_f64(src, cpu_env, tmp);
gen_helper_i32_to_f64(src, cpu_env, tmp32);
break;
case OS_SINGLE:
gen_helper_f32_to_f64(src, cpu_env, tmp);
gen_helper_f32_to_f64(src, cpu_env, tmp32);
break;
}
}
@ -2262,10 +2304,11 @@ DISAS_INSN(fpu)
src = FREG(ext, 10);
}
dest = FREG(ext, 7);
res = gen_new_qreg(QMODE_F64);
res = tcg_temp_new_i64();
if (opmode != 0x3a)
tcg_gen_mov_f64(res, dest);
round = 1;
set_dest = 1;
switch (opmode) {
case 0: case 0x40: case 0x44: /* fmove */
tcg_gen_mov_f64(res, src);
@ -2301,17 +2344,20 @@ DISAS_INSN(fpu)
break;
case 0x38: /* fcmp */
gen_helper_sub_cmp_f64(res, cpu_env, res, src);
dest = NULL_QREG;
set_dest = 0;
round = 0;
break;
case 0x3a: /* ftst */
tcg_gen_mov_f64(res, src);
dest = NULL_QREG;
set_dest = 0;
round = 0;
break;
default:
goto undef;
}
if (ext & (1 << 14)) {
tcg_temp_free_i64(src);
}
if (round) {
if (opmode & 0x40) {
if ((opmode & 0x4) != 0)
@ -2321,18 +2367,19 @@ DISAS_INSN(fpu)
}
}
if (round) {
TCGv tmp;
tmp = gen_new_qreg(QMODE_F32);
TCGv tmp = tcg_temp_new_i32();
gen_helper_f64_to_f32(tmp, cpu_env, res);
gen_helper_f32_to_f64(res, cpu_env, tmp);
tcg_temp_free_i32(tmp);
}
tcg_gen_mov_f64(QREG_FP_RESULT, res);
if (!IS_NULL_QREG(dest)) {
if (set_dest) {
tcg_gen_mov_f64(dest, res);
}
tcg_temp_free_i64(res);
return;
undef:
/* FIXME: Is this right for offset addressing modes? */
s->pc -= 2;
disas_undef_fpu(s, insn);
}
@ -2354,7 +2401,7 @@ DISAS_INSN(fbcc)
l1 = gen_new_label();
/* TODO: Raise BSUN exception. */
flag = gen_new_qreg(QMODE_I32);
flag = tcg_temp_new();
gen_helper_compare_f64(flag, cpu_env, QREG_FP_RESULT);
/* Jump to l1 if condition is true. */
switch (insn & 0xf) {
@ -2427,7 +2474,7 @@ DISAS_INSN(fsave)
static inline TCGv gen_mac_extract_word(DisasContext *s, TCGv val, int upper)
{
TCGv tmp = gen_new_qreg(QMODE_I32);
TCGv tmp = tcg_temp_new();
if (s->env->macsr & MACSR_FI) {
if (upper)
tcg_gen_andi_i32(tmp, val, 0xffff0000);
@ -2465,8 +2512,10 @@ DISAS_INSN(mac)
int dual;
TCGv saved_flags;
if (IS_NULL_QREG(s->mactmp))
s->mactmp = tcg_temp_new(TCG_TYPE_I64);
if (!s->done_mac) {
s->mactmp = tcg_temp_new_i64();
s->done_mac = 1;
}
ext = lduw_code(s->pc);
s->pc += 2;
@ -2480,7 +2529,7 @@ DISAS_INSN(mac)
if (insn & 0x30) {
/* MAC with load. */
tmp = gen_lea(s, insn, OS_LONG);
addr = gen_new_qreg(QMODE_I32);
addr = tcg_temp_new();
tcg_gen_and_i32(addr, tmp, QREG_MAC_MASK);
/* Load the value now to ensure correct exception behavior.
Perform writeback after reading the MAC inputs. */
@ -2502,7 +2551,7 @@ DISAS_INSN(mac)
if ((s->env->macsr & MACSR_OMC) != 0 && !dual) {
/* Skip the multiply if we know we will ignore it. */
l1 = gen_new_label();
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, QREG_MACSR, 1 << (acc + 8));
gen_op_jmp_nz32(tmp, l1);
}
@ -2532,7 +2581,7 @@ DISAS_INSN(mac)
if (dual) {
/* Save the overflow flag from the multiply. */
saved_flags = gen_new_qreg(QMODE_I32);
saved_flags = tcg_temp_new();
tcg_gen_mov_i32(saved_flags, QREG_MACSR);
} else {
saved_flags = NULL_QREG;
@ -2543,7 +2592,7 @@ DISAS_INSN(mac)
if ((s->env->macsr & MACSR_OMC) != 0 && dual) {
/* Skip the accumulate if the value is already saturated. */
l1 = gen_new_label();
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
gen_op_and32(tmp, QREG_MACSR, gen_im32(MACSR_PAV0 << acc));
gen_op_jmp_nz32(tmp, l1);
}
@ -2577,7 +2626,7 @@ DISAS_INSN(mac)
if ((s->env->macsr & MACSR_OMC) != 0) {
/* Skip the accumulate if the value is already saturated. */
l1 = gen_new_label();
tmp = gen_new_qreg(QMODE_I32);
tmp = tcg_temp_new();
gen_op_and32(tmp, QREG_MACSR, gen_im32(MACSR_PAV0 << acc));
gen_op_jmp_nz32(tmp, l1);
}
@ -2619,14 +2668,14 @@ DISAS_INSN(mac)
DISAS_INSN(from_mac)
{
TCGv rx;
TCGv acc;
TCGv_i64 acc;
int accnum;
rx = (insn & 8) ? AREG(insn, 0) : DREG(insn, 0);
accnum = (insn >> 9) & 3;
acc = MACREG(accnum);
if (s->env->macsr & MACSR_FI) {
gen_helper_get_macf(cpu_env, rx, acc);
gen_helper_get_macf(rx, cpu_env, acc);
} else if ((s->env->macsr & MACSR_OMC) == 0) {
tcg_gen_trunc_i64_i32(rx, acc);
} else if (s->env->macsr & MACSR_SU) {
@ -2688,7 +2737,7 @@ DISAS_INSN(macsr_to_ccr)
DISAS_INSN(to_mac)
{
TCGv acc;
TCGv_i64 acc;
TCGv val;
int accnum;
accnum = (insn >> 9) & 3;
@ -2938,7 +2987,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
dc->fpcr = env->fpcr;
dc->user = (env->sr & SR_S) == 0;
dc->is_mem = 0;
dc->mactmp = NULL_QREG;
dc->done_mac = 0;
lj = -1;
num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;

400
target-mips/helper.h
View File

@ -1,215 +1,218 @@
#ifndef DEF_HELPER
#define DEF_HELPER(ret, name, params) ret name params;
#endif
#include "def-helper.h"
DEF_HELPER(void, do_raise_exception_err, (int excp, int err))
DEF_HELPER(void, do_raise_exception, (int excp))
DEF_HELPER(void, do_interrupt_restart, (void))
/* FIXME: We should rename the helper functions and remove this hack. */
#undef HELPER
#define HELPER(name) do_##name
DEF_HELPER_2(raise_exception_err, void, i32, int)
DEF_HELPER_1(raise_exception, void, i32)
DEF_HELPER_0(interrupt_restart, void)
#ifdef TARGET_MIPS64
DEF_HELPER(target_ulong, do_ldl, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER(target_ulong, do_ldr, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER(void, do_sdl, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER(void, do_sdr, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER_3(ldl, tl, tl, tl, int)
DEF_HELPER_3(ldr, tl, tl, tl, int)
DEF_HELPER_3(sdl, void, tl, tl, int)
DEF_HELPER_3(sdr, void, tl, tl, int)
#endif
DEF_HELPER(target_ulong, do_lwl, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER(target_ulong, do_lwr, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER(void, do_swl, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER(void, do_swr, (target_ulong t0, target_ulong t1, int mem_idx))
DEF_HELPER_3(lwl, tl, tl, tl, int)
DEF_HELPER_3(lwr, tl, tl, tl, int)
DEF_HELPER_3(swl, void, tl, tl, int)
DEF_HELPER_3(swr, void, tl, tl, int)
DEF_HELPER(target_ulong, do_clo, (target_ulong t0))
DEF_HELPER(target_ulong, do_clz, (target_ulong t0))
DEF_HELPER_1(clo, tl, tl)
DEF_HELPER_1(clz, tl, tl)
#ifdef TARGET_MIPS64
DEF_HELPER(target_ulong, do_dclo, (target_ulong t0))
DEF_HELPER(target_ulong, do_dclz, (target_ulong t0))
DEF_HELPER(void, do_dmult, (target_ulong t0, target_ulong t1))
DEF_HELPER(void, do_dmultu, (target_ulong t0, target_ulong t1))
DEF_HELPER_1(dclo, tl, tl)
DEF_HELPER_1(dclz, tl, tl)
DEF_HELPER_2(dmult, void, tl, tl)
DEF_HELPER_2(dmultu, void, tl, tl)
#endif
DEF_HELPER(target_ulong, do_muls, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_mulsu, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_macc, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_maccu, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_msac, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_msacu, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_mulhi, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_mulhiu, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_mulshi, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_mulshiu, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_macchi, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_macchiu, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_msachi, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_msachiu, (target_ulong t0, target_ulong t1))
DEF_HELPER_2(muls, tl, tl, tl)
DEF_HELPER_2(mulsu, tl, tl, tl)
DEF_HELPER_2(macc, tl, tl, tl)
DEF_HELPER_2(maccu, tl, tl, tl)
DEF_HELPER_2(msac, tl, tl, tl)
DEF_HELPER_2(msacu, tl, tl, tl)
DEF_HELPER_2(mulhi, tl, tl, tl)
DEF_HELPER_2(mulhiu, tl, tl, tl)
DEF_HELPER_2(mulshi, tl, tl, tl)
DEF_HELPER_2(mulshiu, tl, tl, tl)
DEF_HELPER_2(macchi, tl, tl, tl)
DEF_HELPER_2(macchiu, tl, tl, tl)
DEF_HELPER_2(msachi, tl, tl, tl)
DEF_HELPER_2(msachiu, tl, tl, tl)
#ifndef CONFIG_USER_ONLY
/* CP0 helpers */
DEF_HELPER(target_ulong, do_mfc0_mvpcontrol, (void))
DEF_HELPER(target_ulong, do_mfc0_mvpconf0, (void))
DEF_HELPER(target_ulong, do_mfc0_mvpconf1, (void))
DEF_HELPER(target_ulong, do_mfc0_random, (void))
DEF_HELPER(target_ulong, do_mfc0_tcstatus, (void))
DEF_HELPER(target_ulong, do_mftc0_tcstatus, (void))
DEF_HELPER(target_ulong, do_mfc0_tcbind, (void))
DEF_HELPER(target_ulong, do_mftc0_tcbind, (void))
DEF_HELPER(target_ulong, do_mfc0_tcrestart, (void))
DEF_HELPER(target_ulong, do_mftc0_tcrestart, (void))
DEF_HELPER(target_ulong, do_mfc0_tchalt, (void))
DEF_HELPER(target_ulong, do_mftc0_tchalt, (void))
DEF_HELPER(target_ulong, do_mfc0_tccontext, (void))
DEF_HELPER(target_ulong, do_mftc0_tccontext, (void))
DEF_HELPER(target_ulong, do_mfc0_tcschedule, (void))
DEF_HELPER(target_ulong, do_mftc0_tcschedule, (void))
DEF_HELPER(target_ulong, do_mfc0_tcschefback, (void))
DEF_HELPER(target_ulong, do_mftc0_tcschefback, (void))
DEF_HELPER(target_ulong, do_mfc0_count, (void))
DEF_HELPER(target_ulong, do_mftc0_entryhi, (void))
DEF_HELPER(target_ulong, do_mftc0_status, (void))
DEF_HELPER(target_ulong, do_mfc0_lladdr, (void))
DEF_HELPER(target_ulong, do_mfc0_watchlo, (uint32_t sel))
DEF_HELPER(target_ulong, do_mfc0_watchhi, (uint32_t sel))
DEF_HELPER(target_ulong, do_mfc0_debug, (void))
DEF_HELPER(target_ulong, do_mftc0_debug, (void))
DEF_HELPER_0(mfc0_mvpcontrol, tl)
DEF_HELPER_0(mfc0_mvpconf0, tl)
DEF_HELPER_0(mfc0_mvpconf1, tl)
DEF_HELPER_0(mfc0_random, tl)
DEF_HELPER_0(mfc0_tcstatus, tl)
DEF_HELPER_0(mftc0_tcstatus, tl)
DEF_HELPER_0(mfc0_tcbind, tl)
DEF_HELPER_0(mftc0_tcbind, tl)
DEF_HELPER_0(mfc0_tcrestart, tl)
DEF_HELPER_0(mftc0_tcrestart, tl)
DEF_HELPER_0(mfc0_tchalt, tl)
DEF_HELPER_0(mftc0_tchalt, tl)
DEF_HELPER_0(mfc0_tccontext, tl)
DEF_HELPER_0(mftc0_tccontext, tl)
DEF_HELPER_0(mfc0_tcschedule, tl)
DEF_HELPER_0(mftc0_tcschedule, tl)
DEF_HELPER_0(mfc0_tcschefback, tl)
DEF_HELPER_0(mftc0_tcschefback, tl)
DEF_HELPER_0(mfc0_count, tl)
DEF_HELPER_0(mftc0_entryhi, tl)
DEF_HELPER_0(mftc0_status, tl)
DEF_HELPER_0(mfc0_lladdr, tl)
DEF_HELPER_1(mfc0_watchlo, tl, i32)
DEF_HELPER_1(mfc0_watchhi, tl, i32)
DEF_HELPER_0(mfc0_debug, tl)
DEF_HELPER_0(mftc0_debug, tl)
#ifdef TARGET_MIPS64
DEF_HELPER(target_ulong, do_dmfc0_tcrestart, (void))
DEF_HELPER(target_ulong, do_dmfc0_tchalt, (void))
DEF_HELPER(target_ulong, do_dmfc0_tccontext, (void))
DEF_HELPER(target_ulong, do_dmfc0_tcschedule, (void))
DEF_HELPER(target_ulong, do_dmfc0_tcschefback, (void))
DEF_HELPER(target_ulong, do_dmfc0_lladdr, (void))
DEF_HELPER(target_ulong, do_dmfc0_watchlo, (uint32_t sel))
DEF_HELPER_0(dmfc0_tcrestart, tl)
DEF_HELPER_0(dmfc0_tchalt, tl)
DEF_HELPER_0(dmfc0_tccontext, tl)
DEF_HELPER_0(dmfc0_tcschedule, tl)
DEF_HELPER_0(dmfc0_tcschefback, tl)
DEF_HELPER_0(dmfc0_lladdr, tl)
DEF_HELPER_1(dmfc0_watchlo, tl, i32)
#endif /* TARGET_MIPS64 */
DEF_HELPER(void, do_mtc0_index, (target_ulong t0))
DEF_HELPER(void, do_mtc0_mvpcontrol, (target_ulong t0))
DEF_HELPER(void, do_mtc0_vpecontrol, (target_ulong t0))
DEF_HELPER(void, do_mtc0_vpeconf0, (target_ulong t0))
DEF_HELPER(void, do_mtc0_vpeconf1, (target_ulong t0))
DEF_HELPER(void, do_mtc0_yqmask, (target_ulong t0))
DEF_HELPER(void, do_mtc0_vpeopt, (target_ulong t0))
DEF_HELPER(void, do_mtc0_entrylo0, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tcstatus, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tcstatus, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tcbind, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tcbind, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tcrestart, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tcrestart, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tchalt, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tchalt, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tccontext, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tccontext, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tcschedule, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tcschedule, (target_ulong t0))
DEF_HELPER(void, do_mtc0_tcschefback, (target_ulong t0))
DEF_HELPER(void, do_mttc0_tcschefback, (target_ulong t0))
DEF_HELPER(void, do_mtc0_entrylo1, (target_ulong t0))
DEF_HELPER(void, do_mtc0_context, (target_ulong t0))
DEF_HELPER(void, do_mtc0_pagemask, (target_ulong t0))
DEF_HELPER(void, do_mtc0_pagegrain, (target_ulong t0))
DEF_HELPER(void, do_mtc0_wired, (target_ulong t0))
DEF_HELPER(void, do_mtc0_srsconf0, (target_ulong t0))
DEF_HELPER(void, do_mtc0_srsconf1, (target_ulong t0))
DEF_HELPER(void, do_mtc0_srsconf2, (target_ulong t0))
DEF_HELPER(void, do_mtc0_srsconf3, (target_ulong t0))
DEF_HELPER(void, do_mtc0_srsconf4, (target_ulong t0))
DEF_HELPER(void, do_mtc0_hwrena, (target_ulong t0))
DEF_HELPER(void, do_mtc0_count, (target_ulong t0))
DEF_HELPER(void, do_mtc0_entryhi, (target_ulong t0))
DEF_HELPER(void, do_mttc0_entryhi, (target_ulong t0))
DEF_HELPER(void, do_mtc0_compare, (target_ulong t0))
DEF_HELPER(void, do_mtc0_status, (target_ulong t0))
DEF_HELPER(void, do_mttc0_status, (target_ulong t0))
DEF_HELPER(void, do_mtc0_intctl, (target_ulong t0))
DEF_HELPER(void, do_mtc0_srsctl, (target_ulong t0))
DEF_HELPER(void, do_mtc0_cause, (target_ulong t0))
DEF_HELPER(void, do_mtc0_ebase, (target_ulong t0))
DEF_HELPER(void, do_mtc0_config0, (target_ulong t0))
DEF_HELPER(void, do_mtc0_config2, (target_ulong t0))
DEF_HELPER(void, do_mtc0_watchlo, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mtc0_watchhi, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mtc0_xcontext, (target_ulong t0))
DEF_HELPER(void, do_mtc0_framemask, (target_ulong t0))
DEF_HELPER(void, do_mtc0_debug, (target_ulong t0))
DEF_HELPER(void, do_mttc0_debug, (target_ulong t0))
DEF_HELPER(void, do_mtc0_performance0, (target_ulong t0))
DEF_HELPER(void, do_mtc0_taglo, (target_ulong t0))
DEF_HELPER(void, do_mtc0_datalo, (target_ulong t0))
DEF_HELPER(void, do_mtc0_taghi, (target_ulong t0))
DEF_HELPER(void, do_mtc0_datahi, (target_ulong t0))
DEF_HELPER_1(mtc0_index, void, tl)
DEF_HELPER_1(mtc0_mvpcontrol, void, tl)
DEF_HELPER_1(mtc0_vpecontrol, void, tl)
DEF_HELPER_1(mtc0_vpeconf0, void, tl)
DEF_HELPER_1(mtc0_vpeconf1, void, tl)
DEF_HELPER_1(mtc0_yqmask, void, tl)
DEF_HELPER_1(mtc0_vpeopt, void, tl)
DEF_HELPER_1(mtc0_entrylo0, void, tl)
DEF_HELPER_1(mtc0_tcstatus, void, tl)
DEF_HELPER_1(mttc0_tcstatus, void, tl)
DEF_HELPER_1(mtc0_tcbind, void, tl)
DEF_HELPER_1(mttc0_tcbind, void, tl)
DEF_HELPER_1(mtc0_tcrestart, void, tl)
DEF_HELPER_1(mttc0_tcrestart, void, tl)
DEF_HELPER_1(mtc0_tchalt, void, tl)
DEF_HELPER_1(mttc0_tchalt, void, tl)
DEF_HELPER_1(mtc0_tccontext, void, tl)
DEF_HELPER_1(mttc0_tccontext, void, tl)
DEF_HELPER_1(mtc0_tcschedule, void, tl)
DEF_HELPER_1(mttc0_tcschedule, void, tl)
DEF_HELPER_1(mtc0_tcschefback, void, tl)
DEF_HELPER_1(mttc0_tcschefback, void, tl)
DEF_HELPER_1(mtc0_entrylo1, void, tl)
DEF_HELPER_1(mtc0_context, void, tl)
DEF_HELPER_1(mtc0_pagemask, void, tl)
DEF_HELPER_1(mtc0_pagegrain, void, tl)
DEF_HELPER_1(mtc0_wired, void, tl)
DEF_HELPER_1(mtc0_srsconf0, void, tl)
DEF_HELPER_1(mtc0_srsconf1, void, tl)
DEF_HELPER_1(mtc0_srsconf2, void, tl)
DEF_HELPER_1(mtc0_srsconf3, void, tl)
DEF_HELPER_1(mtc0_srsconf4, void, tl)
DEF_HELPER_1(mtc0_hwrena, void, tl)
DEF_HELPER_1(mtc0_count, void, tl)
DEF_HELPER_1(mtc0_entryhi, void, tl)
DEF_HELPER_1(mttc0_entryhi, void, tl)
DEF_HELPER_1(mtc0_compare, void, tl)
DEF_HELPER_1(mtc0_status, void, tl)
DEF_HELPER_1(mttc0_status, void, tl)
DEF_HELPER_1(mtc0_intctl, void, tl)
DEF_HELPER_1(mtc0_srsctl, void, tl)
DEF_HELPER_1(mtc0_cause, void, tl)
DEF_HELPER_1(mtc0_ebase, void, tl)
DEF_HELPER_1(mtc0_config0, void, tl)
DEF_HELPER_1(mtc0_config2, void, tl)
DEF_HELPER_2(mtc0_watchlo, void, tl, i32)
DEF_HELPER_2(mtc0_watchhi, void, tl, i32)
DEF_HELPER_1(mtc0_xcontext, void, tl)
DEF_HELPER_1(mtc0_framemask, void, tl)
DEF_HELPER_1(mtc0_debug, void, tl)
DEF_HELPER_1(mttc0_debug, void, tl)
DEF_HELPER_1(mtc0_performance0, void, tl)
DEF_HELPER_1(mtc0_taglo, void, tl)
DEF_HELPER_1(mtc0_datalo, void, tl)
DEF_HELPER_1(mtc0_taghi, void, tl)
DEF_HELPER_1(mtc0_datahi, void, tl)
/* MIPS MT functions */
DEF_HELPER(target_ulong, do_mftgpr, (uint32_t sel))
DEF_HELPER(target_ulong, do_mftlo, (uint32_t sel))
DEF_HELPER(target_ulong, do_mfthi, (uint32_t sel))
DEF_HELPER(target_ulong, do_mftacx, (uint32_t sel))
DEF_HELPER(target_ulong, do_mftdsp, (void))
DEF_HELPER(void, do_mttgpr, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mttlo, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mtthi, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mttacx, (target_ulong t0, uint32_t sel))
DEF_HELPER(void, do_mttdsp, (target_ulong t0))
DEF_HELPER(target_ulong, do_dmt, (target_ulong t0))
DEF_HELPER(target_ulong, do_emt, (target_ulong t0))
DEF_HELPER(target_ulong, do_dvpe, (target_ulong t0))
DEF_HELPER(target_ulong, do_evpe, (target_ulong t0))
DEF_HELPER_1(mftgpr, tl, i32);
DEF_HELPER_1(mftlo, tl, i32)
DEF_HELPER_1(mfthi, tl, i32)
DEF_HELPER_1(mftacx, tl, i32)
DEF_HELPER_0(mftdsp, tl)
DEF_HELPER_2(mttgpr, void, tl, i32)
DEF_HELPER_2(mttlo, void, tl, i32)
DEF_HELPER_2(mtthi, void, tl, i32)
DEF_HELPER_2(mttacx, void, tl, i32)
DEF_HELPER_1(mttdsp, void, tl)
DEF_HELPER_1(dmt, tl, tl)
DEF_HELPER_1(emt, tl, tl)
DEF_HELPER_1(dvpe, tl, tl)
DEF_HELPER_1(evpe, tl, tl)
#endif /* !CONFIG_USER_ONLY */
DEF_HELPER(void, do_fork, (target_ulong t0, target_ulong t1))
DEF_HELPER(target_ulong, do_yield, (target_ulong t0))
DEF_HELPER_2(fork, void, tl, tl)
DEF_HELPER_1(yield, tl, tl)
/* CP1 functions */
DEF_HELPER(target_ulong, do_cfc1, (uint32_t reg))
DEF_HELPER(void, do_ctc1, (target_ulong t0, uint32_t reg))
DEF_HELPER_1(cfc1, tl, i32)
DEF_HELPER_2(ctc1, void, tl, i32)
DEF_HELPER(uint64_t, do_float_cvtd_s, (uint32_t fst0))
DEF_HELPER(uint64_t, do_float_cvtd_w, (uint32_t wt0))
DEF_HELPER(uint64_t, do_float_cvtd_l, (uint64_t dt0))
DEF_HELPER(uint64_t, do_float_cvtl_d, (uint64_t fd0))
DEF_HELPER(uint64_t, do_float_cvtl_s, (uint32_t fst0))
DEF_HELPER(uint64_t, do_float_cvtps_pw, (uint64_t dt0))
DEF_HELPER(uint64_t, do_float_cvtpw_ps, (uint64_t fdt0))
DEF_HELPER(uint32_t, do_float_cvts_d, (uint64_t fd0))
DEF_HELPER(uint32_t, do_float_cvts_w, (uint32_t wt0))
DEF_HELPER(uint32_t, do_float_cvts_l, (uint64_t dt0))
DEF_HELPER(uint32_t, do_float_cvts_pl, (uint32_t wt0))
DEF_HELPER(uint32_t, do_float_cvts_pu, (uint32_t wth0))
DEF_HELPER(uint32_t, do_float_cvtw_s, (uint32_t fst0))
DEF_HELPER(uint32_t, do_float_cvtw_d, (uint64_t fd0))
DEF_HELPER_1(float_cvtd_s, i64, i32)
DEF_HELPER_1(float_cvtd_w, i64, i32)
DEF_HELPER_1(float_cvtd_l, i64, i64)
DEF_HELPER_1(float_cvtl_d, i64, i64)
DEF_HELPER_1(float_cvtl_s, i64, i32)
DEF_HELPER_1(float_cvtps_pw, i64, i64)
DEF_HELPER_1(float_cvtpw_ps, i64, i64)
DEF_HELPER_1(float_cvts_d, i32, i64)
DEF_HELPER_1(float_cvts_w, i32, i32)
DEF_HELPER_1(float_cvts_l, i32, i64)
DEF_HELPER_1(float_cvts_pl, i32, i32)
DEF_HELPER_1(float_cvts_pu, i32, i32)
DEF_HELPER_1(float_cvtw_s, i32, i32)
DEF_HELPER_1(float_cvtw_d, i32, i64)
DEF_HELPER(uint64_t, do_float_addr_ps, (uint64_t fdt0, uint64_t fdt1))
DEF_HELPER(uint64_t, do_float_mulr_ps, (uint64_t fdt0, uint64_t fdt1))
DEF_HELPER_2(float_addr_ps, i64, i64, i64)
DEF_HELPER_2(float_mulr_ps, i64, i64, i64)
#define FOP_PROTO(op) \
DEF_HELPER(uint64_t, do_float_ ## op ## l_s, (uint32_t fst0)) \
DEF_HELPER(uint64_t, do_float_ ## op ## l_d, (uint64_t fdt0)) \
DEF_HELPER(uint32_t, do_float_ ## op ## w_s, (uint32_t fst0)) \
DEF_HELPER(uint32_t, do_float_ ## op ## w_d, (uint64_t fdt0))
#define FOP_PROTO(op) \
DEF_HELPER_1(float_ ## op ## l_s, i64, i32) \
DEF_HELPER_1(float_ ## op ## l_d, i64, i64) \
DEF_HELPER_1(float_ ## op ## w_s, i32, i32) \
DEF_HELPER_1(float_ ## op ## w_d, i32, i64)
FOP_PROTO(round)
FOP_PROTO(trunc)
FOP_PROTO(ceil)
FOP_PROTO(floor)
#undef FOP_PROTO
#define FOP_PROTO(op) \
DEF_HELPER(uint32_t, do_float_ ## op ## _s, (uint32_t fst0)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _d, (uint64_t fdt0))
#define FOP_PROTO(op) \
DEF_HELPER_1(float_ ## op ## _s, i32, i32) \
DEF_HELPER_1(float_ ## op ## _d, i64, i64)
FOP_PROTO(sqrt)
FOP_PROTO(rsqrt)
FOP_PROTO(recip)
#undef FOP_PROTO
#define FOP_PROTO(op) \
DEF_HELPER(uint32_t, do_float_ ## op ## _s, (uint32_t fst0)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _d, (uint64_t fdt0)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _ps, (uint64_t fdt0))
#define FOP_PROTO(op) \
DEF_HELPER_1(float_ ## op ## _s, i32, i32) \
DEF_HELPER_1(float_ ## op ## _d, i64, i64) \
DEF_HELPER_1(float_ ## op ## _ps, i64, i64)
FOP_PROTO(abs)
FOP_PROTO(chs)
FOP_PROTO(recip1)
FOP_PROTO(rsqrt1)
#undef FOP_PROTO
#define FOP_PROTO(op) \
DEF_HELPER(uint32_t, do_float_ ## op ## _s, (uint32_t fst0, uint32_t fst2)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _d, (uint64_t fdt0, uint64_t fdt2)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _ps, (uint64_t fdt0, uint64_t fdt2))
#define FOP_PROTO(op) \
DEF_HELPER_2(float_ ## op ## _s, i32, i32, i32) \
DEF_HELPER_2(float_ ## op ## _d, i64, i64, i64) \
DEF_HELPER_2(float_ ## op ## _ps, i64, i64, i64)
FOP_PROTO(add)
FOP_PROTO(sub)
FOP_PROTO(mul)
@ -218,26 +221,23 @@ FOP_PROTO(recip2)
FOP_PROTO(rsqrt2)
#undef FOP_PROTO
#define FOP_PROTO(op) \
DEF_HELPER(uint32_t, do_float_ ## op ## _s, (uint32_t fst0, uint32_t fst1, \
uint32_t fst2)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _d, (uint64_t fdt0, uint64_t fdt1, \
uint64_t fdt2)) \
DEF_HELPER(uint64_t, do_float_ ## op ## _ps, (uint64_t fdt0, uint64_t fdt1, \
uint64_t fdt2))
#define FOP_PROTO(op) \
DEF_HELPER_3(float_ ## op ## _s, i32, i32, i32, i32) \
DEF_HELPER_3(float_ ## op ## _d, i64, i64, i64, i64) \
DEF_HELPER_3(float_ ## op ## _ps, i64, i64, i64, i64)
FOP_PROTO(muladd)
FOP_PROTO(mulsub)
FOP_PROTO(nmuladd)
FOP_PROTO(nmulsub)
#undef FOP_PROTO
#define FOP_PROTO(op) \
DEF_HELPER(void, do_cmp_d_ ## op, (uint64_t fdt0, uint64_t fdt1, int cc)) \
DEF_HELPER(void, do_cmpabs_d_ ## op, (uint64_t fdt0, uint64_t fdt1, int cc)) \
DEF_HELPER(void, do_cmp_s_ ## op, (uint32_t fst0, uint32_t fst1, int cc)) \
DEF_HELPER(void, do_cmpabs_s_ ## op, (uint32_t fst0, uint32_t fst1, int cc)) \
DEF_HELPER(void, do_cmp_ps_ ## op, (uint64_t fdt0, uint64_t fdt1, int cc)) \
DEF_HELPER(void, do_cmpabs_ps_ ## op, (uint64_t fdt0, uint64_t fdt1, int cc))
#define FOP_PROTO(op) \
DEF_HELPER_3(cmp_d_ ## op, void, i64, i64, int) \
DEF_HELPER_3(cmpabs_d_ ## op, void, i64, i64, int) \
DEF_HELPER_3(cmp_s_ ## op, void, i32, i32, int) \
DEF_HELPER_3(cmpabs_s_ ## op, void, i32, i32, int) \
DEF_HELPER_3(cmp_ps_ ## op, void, i64, i64, int) \
DEF_HELPER_3(cmpabs_ps_ ## op, void, i64, i64, int)
FOP_PROTO(f)
FOP_PROTO(un)
FOP_PROTO(eq)
@ -258,14 +258,20 @@ FOP_PROTO(ngt)
/* Special functions */
#ifndef CONFIG_USER_ONLY
DEF_HELPER(target_ulong, do_di, (void))
DEF_HELPER(target_ulong, do_ei, (void))
DEF_HELPER(void, do_eret, (void))
DEF_HELPER(void, do_deret, (void))
DEF_HELPER_0(tlbwi, void)
DEF_HELPER_0(tlbwr, void)
DEF_HELPER_0(tlbp, void)
DEF_HELPER_0(tlbr, void)
DEF_HELPER_0(di, tl)
DEF_HELPER_0(ei, tl)
DEF_HELPER_0(eret, void)
DEF_HELPER_0(deret, void)
#endif /* !CONFIG_USER_ONLY */
DEF_HELPER(target_ulong, do_rdhwr_cpunum, (void))
DEF_HELPER(target_ulong, do_rdhwr_synci_step, (void))
DEF_HELPER(target_ulong, do_rdhwr_cc, (void))
DEF_HELPER(target_ulong, do_rdhwr_ccres, (void))
DEF_HELPER(void, do_pmon, (int function))
DEF_HELPER(void, do_wait, (void))
DEF_HELPER_0(rdhwr_cpunum, tl)
DEF_HELPER_0(rdhwr_synci_step, tl)
DEF_HELPER_0(rdhwr_cc, tl)
DEF_HELPER_0(rdhwr_ccres, tl)
DEF_HELPER_1(pmon, void, int)
DEF_HELPER_0(wait, void)
#include "def-helper.h"

21
target-mips/op_helper.c
View File

@ -22,6 +22,7 @@
#include "host-utils.h"
#include "helper.h"
/*****************************************************************************/
/* Exceptions processing helpers */
@ -1659,6 +1660,26 @@ void r4k_do_tlbr (void)
(tlb->C1 << 3) | (tlb->PFN[1] >> 6);
}
void do_tlbwi(void)
{
env->tlb->do_tlbwi();
}
void do_tlbwr(void)
{
env->tlb->do_tlbwr();
}
void do_tlbp(void)
{
env->tlb->do_tlbp();
}
void do_tlbr(void)
{
env->tlb->do_tlbr();
}
/* Specials */
target_ulong do_di (void)
{

2016
target-mips/translate.c
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File diff suppressed because it is too large Load Diff

1
target-ppc/helper.c
View File

@ -29,6 +29,7 @@
#include "exec-all.h"
#include "helper_regs.h"
#include "qemu-common.h"
#include "helper.h"
//#define DEBUG_MMU
//#define DEBUG_BATS

38
target-ppc/helper.h
View File

@ -1,28 +1,28 @@
#ifndef DEF_HELPER
#define DEF_HELPER(ret, name, params) ret name params;
#endif
#include "def-helper.h"
DEF_HELPER(uint32_t, helper_fcmpo, (void))
DEF_HELPER(uint32_t, helper_fcmpu, (void))
DEF_HELPER_0(fcmpo, i32)
DEF_HELPER_0(fcmpu, i32)
DEF_HELPER(uint32_t, helper_load_cr, (void))
DEF_HELPER(void, helper_store_cr, (target_ulong, uint32_t))
DEF_HELPER_0(load_cr, tl)
DEF_HELPER_2(store_cr, void, tl, i32)
#if defined(TARGET_PPC64)
DEF_HELPER(uint64_t, helper_mulhd, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mulhdu, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_mulldo, (uint64_t, uint64_t))
DEF_HELPER_2(mulhd, i64, i64, i64)
DEF_HELPER_2(mulhdu, i64, i64, i64)
DEF_HELPER_2(mulldo, i64, i64, i64)
#endif
DEF_HELPER(target_ulong, helper_cntlzw, (target_ulong t))
DEF_HELPER(target_ulong, helper_popcntb, (target_ulong val))
DEF_HELPER(target_ulong, helper_sraw, (target_ulong, target_ulong))
DEF_HELPER_1(cntlzw, tl, tl)
DEF_HELPER_1(popcntb, tl, tl)
DEF_HELPER_2(sraw, tl, tl, tl)
#if defined(TARGET_PPC64)
DEF_HELPER(target_ulong, helper_cntlzd, (target_ulong t))
DEF_HELPER(target_ulong, helper_popcntb_64, (target_ulong val))
DEF_HELPER(target_ulong, helper_srad, (target_ulong, target_ulong))
DEF_HELPER_1(cntlzd, tl, tl)
DEF_HELPER_1(popcntb_64, tl, tl)
DEF_HELPER_2(srad, tl, tl, tl)
#endif
DEF_HELPER(uint32_t, helper_cntlsw32, (uint32_t))
DEF_HELPER(uint32_t, helper_cntlzw32, (uint32_t))
DEF_HELPER(uint32_t, helper_brinc, (uint32_t, uint32_t))
DEF_HELPER_1(cntlsw32, i32, i32)
DEF_HELPER_1(cntlzw32, i32, i32)
DEF_HELPER_2(brinc, tl, tl, tl)
#include "def-helper.h"

3
target-ppc/op_helper.c
View File

@ -19,6 +19,7 @@
*/
#include "exec.h"
#include "host-utils.h"
#include "helper.h"
#include "helper_regs.h"
#include "op_helper.h"
@ -62,7 +63,7 @@ void do_raise_exception (uint32_t exception)
/*****************************************************************************/
/* Registers load and stores */
uint32_t helper_load_cr (void)
target_ulong helper_load_cr (void)
{
return (env->crf[0] << 28) |
(env->crf[1] << 24) |

637
target-ppc/translate.c
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File diff suppressed because it is too large Load Diff

82
target-sh4/helper.h
View File

@ -1,46 +1,46 @@
#ifndef DEF_HELPER
#define DEF_HELPER(ret, name, params) ret name params;
#endif
#include "def-helper.h"
DEF_HELPER(void, helper_ldtlb, (void))
DEF_HELPER(void, helper_raise_illegal_instruction, (void))
DEF_HELPER(void, helper_raise_slot_illegal_instruction, (void))
DEF_HELPER(void, helper_debug, (void))
DEF_HELPER(void, helper_sleep, (uint32_t))
DEF_HELPER(void, helper_trapa, (uint32_t))
DEF_HELPER_0(ldtlb, void)
DEF_HELPER_0(raise_illegal_instruction, void)
DEF_HELPER_0(raise_slot_illegal_instruction, void)
DEF_HELPER_0(debug, void)
DEF_HELPER_1(sleep, void, i32)
DEF_HELPER_1(trapa, void, i32)
DEF_HELPER(uint32_t, helper_addv, (uint32_t, uint32_t))
DEF_HELPER(uint32_t, helper_addc, (uint32_t, uint32_t))
DEF_HELPER(uint32_t, helper_subv, (uint32_t, uint32_t))
DEF_HELPER(uint32_t, helper_subc, (uint32_t, uint32_t))
DEF_HELPER(uint32_t, helper_negc, (uint32_t))
DEF_HELPER(uint32_t, helper_div1, (uint32_t, uint32_t))
DEF_HELPER(void, helper_macl, (uint32_t, uint32_t))
DEF_HELPER(void, helper_macw, (uint32_t, uint32_t))
DEF_HELPER_2(addv, i32, i32, i32)
DEF_HELPER_2(addc, i32, i32, i32)
DEF_HELPER_2(subv, i32, i32, i32)
DEF_HELPER_2(subc, i32, i32, i32)
DEF_HELPER_1(negc, i32, i32)
DEF_HELPER_2(div1, i32, i32, i32)
DEF_HELPER_2(macl, void, i32, i32)
DEF_HELPER_2(macw, void, i32, i32)
DEF_HELPER(void, helper_ld_fpscr, (uint32_t))
DEF_HELPER_1(ld_fpscr, void, i32)
DEF_HELPER(uint32_t, helper_fabs_FT, (uint32_t))
DEF_HELPER(uint64_t, helper_fabs_DT, (uint64_t))
DEF_HELPER(uint32_t, helper_fadd_FT, (uint32_t, uint32_t))
DEF_HELPER(uint64_t, helper_fadd_DT, (uint64_t, uint64_t))
DEF_HELPER(uint64_t, helper_fcnvsd_FT_DT, (uint32_t))
DEF_HELPER(uint32_t, helper_fcnvds_DT_FT, (uint64_t))
DEF_HELPER_1(fabs_FT, i32, i32)
DEF_HELPER_1(fabs_DT, i64, i64)
DEF_HELPER_2(fadd_FT, i32, i32, i32)
DEF_HELPER_2(fadd_DT, i64, i64, i64)
DEF_HELPER_1(fcnvsd_FT_DT, i64, i32)
DEF_HELPER_1(fcnvds_DT_FT, i32, i64)
DEF_HELPER(void, helper_fcmp_eq_FT, (uint32_t, uint32_t))
DEF_HELPER(void, helper_fcmp_eq_DT, (uint64_t, uint64_t))
DEF_HELPER(void, helper_fcmp_gt_FT, (uint32_t, uint32_t))
DEF_HELPER(void, helper_fcmp_gt_DT, (uint64_t, uint64_t))
DEF_HELPER(uint32_t, helper_fdiv_FT, (uint32_t, uint32_t))
DEF_HELPER(uint64_t, helper_fdiv_DT, (uint64_t, uint64_t))
DEF_HELPER(uint32_t, helper_float_FT, (uint32_t))
DEF_HELPER(uint64_t, helper_float_DT, (uint32_t))
DEF_HELPER(uint32_t, helper_fmul_FT, (uint32_t, uint32_t))
DEF_HELPER(uint64_t, helper_fmul_DT, (uint64_t, uint64_t))
DEF_HELPER(uint32_t, helper_fneg_T, (uint32_t))
DEF_HELPER(uint32_t, helper_fsub_FT, (uint32_t, uint32_t))
DEF_HELPER(uint64_t, helper_fsub_DT, (uint64_t, uint64_t))
DEF_HELPER(uint32_t, helper_fsqrt_FT, (uint32_t))
DEF_HELPER(uint64_t, helper_fsqrt_DT, (uint64_t))
DEF_HELPER(uint32_t, helper_ftrc_FT, (uint32_t))
DEF_HELPER(uint32_t, helper_ftrc_DT, (uint64_t))
DEF_HELPER_2(fcmp_eq_FT, void, i32, i32)
DEF_HELPER_2(fcmp_eq_DT, void, i64, i64)
DEF_HELPER_2(fcmp_gt_FT, void, i32, i32)
DEF_HELPER_2(fcmp_gt_DT, void, i64, i64)
DEF_HELPER_2(fdiv_FT, i32, i32, i32)
DEF_HELPER_2(fdiv_DT, i64, i64, i64)
DEF_HELPER_1(float_FT, i32, i32)
DEF_HELPER_1(float_DT, i64, i32)
DEF_HELPER_2(fmul_FT, i32, i32, i32)
DEF_HELPER_2(fmul_DT, i64, i64, i64)
DEF_HELPER_1(fneg_T, i32, i32)
DEF_HELPER_2(fsub_FT, i32, i32, i32)
DEF_HELPER_2(fsub_DT, i64, i64, i64)
DEF_HELPER_1(fsqrt_FT, i32, i32)
DEF_HELPER_1(fsqrt_DT, i64, i64)
DEF_HELPER_1(ftrc_FT, i32, i32)
DEF_HELPER_1(ftrc_DT, i32, i64)
#include "def-helper.h"

1
target-sh4/op_helper.c
View File

@ -19,6 +19,7 @@
*/
#include <assert.h>
#include "exec.h"
#include "helper.h"
#ifndef CONFIG_USER_ONLY

536
target-sh4/translate.c
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File diff suppressed because it is too large Load Diff

210
target-sparc/helper.h
View File

@ -1,98 +1,88 @@
#ifndef DEF_HELPER
#define DEF_HELPER(ret, name, params) ret name params;
#endif
#include "def-helper.h"
#ifndef TARGET_SPARC64
DEF_HELPER(void, helper_rett, (void))
DEF_HELPER(void, helper_wrpsr, (target_ulong new_psr))
DEF_HELPER(target_ulong, helper_rdpsr, (void))
DEF_HELPER_0(rett, void)
DEF_HELPER_1(wrpsr, void, tl)
DEF_HELPER_0(rdpsr, tl)
#else
DEF_HELPER(void, helper_wrpstate, (target_ulong new_state))
DEF_HELPER(void, helper_done, (void))
DEF_HELPER(void, helper_retry, (void))
DEF_HELPER(void, helper_flushw, (void))
DEF_HELPER(void, helper_saved, (void))
DEF_HELPER(void, helper_restored, (void))
DEF_HELPER(target_ulong, helper_rdccr, (void))
DEF_HELPER(void, helper_wrccr, (target_ulong new_ccr))
DEF_HELPER(target_ulong, helper_rdcwp, (void))
DEF_HELPER(void, helper_wrcwp, (target_ulong new_cwp))
DEF_HELPER(target_ulong, helper_array8, (target_ulong pixel_addr, \
target_ulong cubesize))
DEF_HELPER(target_ulong, helper_alignaddr, (target_ulong addr, \
target_ulong offset))
DEF_HELPER(target_ulong, helper_popc, (target_ulong val))
DEF_HELPER(void, helper_ldda_asi, (target_ulong addr, int asi, int rd))
DEF_HELPER(void, helper_ldf_asi, (target_ulong addr, int asi, int size, int rd))
DEF_HELPER(void, helper_stf_asi, (target_ulong addr, int asi, int size, int rd))
DEF_HELPER(target_ulong, helper_cas_asi, (target_ulong addr, \
target_ulong val1, \
target_ulong val2, uint32_t asi))
DEF_HELPER(target_ulong, helper_casx_asi, (target_ulong addr, \
target_ulong val1, \
target_ulong val2, uint32_t asi))
DEF_HELPER(void, helper_set_softint, (uint64_t value))
DEF_HELPER(void, helper_clear_softint, (uint64_t value))
DEF_HELPER(void, helper_write_softint, (uint64_t value))
DEF_HELPER(void, helper_tick_set_count, (void *opaque, uint64_t count))
DEF_HELPER(uint64_t, helper_tick_get_count, (void *opaque))
DEF_HELPER(void, helper_tick_set_limit, (void *opaque, uint64_t limit))
DEF_HELPER_1(wrpstate, void, tl)
DEF_HELPER_0(done, void)
DEF_HELPER_0(retry, void)
DEF_HELPER_0(flushw, void)
DEF_HELPER_0(saved, void)
DEF_HELPER_0(restored, void)
DEF_HELPER_0(rdccr, tl)
DEF_HELPER_1(wrccr, void, tl)
DEF_HELPER_0(rdcwp, tl)
DEF_HELPER_1(wrcwp, void, tl)
DEF_HELPER_2(array8, tl, tl, tl)
DEF_HELPER_2(alignaddr, tl, tl, tl)
DEF_HELPER_1(popc, tl, tl)
DEF_HELPER_3(ldda_asi, void, tl, int, int)
DEF_HELPER_4(ldf_asi, void, tl, int, int, int)
DEF_HELPER_4(stf_asi, void, tl, int, int, int)
DEF_HELPER_4(cas_asi, tl, tl, tl, tl, i32)
DEF_HELPER_4(casx_asi, tl, tl, tl, tl, i32)
DEF_HELPER_1(set_softint, void, i64)
DEF_HELPER_1(clear_softint, void, i64)
DEF_HELPER_1(write_softint, void, i64)
DEF_HELPER_2(tick_set_count, void, ptr, i64)
DEF_HELPER_1(tick_get_count, i64, ptr)
DEF_HELPER_2(tick_set_limit, void, ptr, i64)
#endif
DEF_HELPER(void, helper_check_align, (target_ulong addr, uint32_t align))
DEF_HELPER(void, helper_debug, (void))
DEF_HELPER(void, helper_save, (void))
DEF_HELPER(void, helper_restore, (void))
DEF_HELPER(void, helper_flush, (target_ulong addr))
DEF_HELPER(target_ulong, helper_udiv, (target_ulong a, target_ulong b))
DEF_HELPER(target_ulong, helper_sdiv, (target_ulong a, target_ulong b))
DEF_HELPER(void, helper_stdf, (target_ulong addr, int mem_idx))
DEF_HELPER(void, helper_lddf, (target_ulong addr, int mem_idx))
DEF_HELPER(void, helper_ldqf, (target_ulong addr, int mem_idx))
DEF_HELPER(void, helper_stqf, (target_ulong addr, int mem_idx))
DEF_HELPER_2(check_align, void, tl, i32)
DEF_HELPER_0(debug, void)
DEF_HELPER_0(save, void)
DEF_HELPER_0(restore, void)
DEF_HELPER_1(flush, void, tl)
DEF_HELPER_2(udiv, tl, tl, tl)
DEF_HELPER_2(sdiv, tl, tl, tl)
DEF_HELPER_2(stdf, void, tl, int)
DEF_HELPER_2(lddf, void, tl, int)
DEF_HELPER_2(ldqf, void, tl, int)
DEF_HELPER_2(stqf, void, tl, int)
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
DEF_HELPER(uint64_t, helper_ld_asi, (target_ulong addr, int asi, int size, \
int sign))
DEF_HELPER(void, helper_st_asi, (target_ulong addr, uint64_t val, int asi, \
int size))
DEF_HELPER_4(ld_asi, i64, tl, int, int, int)
DEF_HELPER_4(st_asi, void, tl, i64, int, int)
#endif
DEF_HELPER(void, helper_ldfsr, (uint32_t new_fsr))
DEF_HELPER(void, helper_check_ieee_exceptions, (void))
DEF_HELPER(void, helper_clear_float_exceptions, (void))
DEF_HELPER(float32, helper_fabss, (float32 src))
DEF_HELPER(float32, helper_fsqrts, (float32 src))
DEF_HELPER(void, helper_fsqrtd, (void))
DEF_HELPER(void, helper_fcmps, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmpd, (void))
DEF_HELPER(void, helper_fcmpes, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmped, (void))
DEF_HELPER(void, helper_fsqrtq, (void))
DEF_HELPER(void, helper_fcmpq, (void))
DEF_HELPER(void, helper_fcmpeq, (void))
DEF_HELPER_1(ldfsr, void, i32)
DEF_HELPER_0(check_ieee_exceptions, void)
DEF_HELPER_0(clear_float_exceptions, void)
DEF_HELPER_1(fabss, f32, f32)
DEF_HELPER_1(fsqrts, f32, f32)
DEF_HELPER_0(fsqrtd, void)
DEF_HELPER_2(fcmps, void, f32, f32)
DEF_HELPER_0(fcmpd, void)
DEF_HELPER_2(fcmpes, void, f32, f32)
DEF_HELPER_0(fcmped, void)
DEF_HELPER_0(fsqrtq, void)
DEF_HELPER_0(fcmpq, void)
DEF_HELPER_0(fcmpeq, void)
#ifdef TARGET_SPARC64
DEF_HELPER(void, helper_ldxfsr, (uint64_t new_fsr))
DEF_HELPER(void, helper_fabsd, (void))
DEF_HELPER(void, helper_fcmps_fcc1, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmps_fcc2, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmps_fcc3, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmpd_fcc1, (void))
DEF_HELPER(void, helper_fcmpd_fcc2, (void))
DEF_HELPER(void, helper_fcmpd_fcc3, (void))
DEF_HELPER(void, helper_fcmpes_fcc1, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmpes_fcc2, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmpes_fcc3, (float32 src1, float32 src2))
DEF_HELPER(void, helper_fcmped_fcc1, (void))
DEF_HELPER(void, helper_fcmped_fcc2, (void))
DEF_HELPER(void, helper_fcmped_fcc3, (void))
DEF_HELPER(void, helper_fabsq, (void))
DEF_HELPER(void, helper_fcmpq_fcc1, (void))
DEF_HELPER(void, helper_fcmpq_fcc2, (void))
DEF_HELPER(void, helper_fcmpq_fcc3, (void))
DEF_HELPER(void, helper_fcmpeq_fcc1, (void))
DEF_HELPER(void, helper_fcmpeq_fcc2, (void))
DEF_HELPER(void, helper_fcmpeq_fcc3, (void))
DEF_HELPER_1(ldxfsr, void, i64)
DEF_HELPER_0(fabsd, void)
DEF_HELPER_2(fcmps_fcc1, void, f32, f32)
DEF_HELPER_2(fcmps_fcc2, void, f32, f32)
DEF_HELPER_2(fcmps_fcc3, void, f32, f32)
DEF_HELPER_0(fcmpd_fcc1, void)
DEF_HELPER_0(fcmpd_fcc2, void)
DEF_HELPER_0(fcmpd_fcc3, void)
DEF_HELPER_2(fcmpes_fcc1, void, f32, f32)
DEF_HELPER_2(fcmpes_fcc2, void, f32, f32)
DEF_HELPER_2(fcmpes_fcc3, void, f32, f32)
DEF_HELPER_0(fcmped_fcc1, void)
DEF_HELPER_0(fcmped_fcc2, void)
DEF_HELPER_0(fcmped_fcc3, void)
DEF_HELPER_0(fabsq, void)
DEF_HELPER_0(fcmpq_fcc1, void)
DEF_HELPER_0(fcmpq_fcc2, void)
DEF_HELPER_0(fcmpq_fcc3, void)
DEF_HELPER_0(fcmpeq_fcc1, void)
DEF_HELPER_0(fcmpeq_fcc2, void)
DEF_HELPER_0(fcmpeq_fcc3, void)
#endif
DEF_HELPER(void, raise_exception, (int tt))
#define F_HELPER_0_0(name) DEF_HELPER(void, helper_f ## name, (void))
DEF_HELPER_1(raise_exception, void, int)
#define F_HELPER_0_0(name) DEF_HELPER_0(f ## name, void)
#define F_HELPER_DQ_0_0(name) \
F_HELPER_0_0(name ## d); \
F_HELPER_0_0(name ## q)
@ -102,37 +92,37 @@ F_HELPER_DQ_0_0(sub);
F_HELPER_DQ_0_0(mul);
F_HELPER_DQ_0_0(div);
DEF_HELPER(float32, helper_fadds, (float32 src1, float32 src2))
DEF_HELPER(float32, helper_fsubs, (float32 src1, float32 src2))
DEF_HELPER(float32, helper_fmuls, (float32 src1, float32 src2))
DEF_HELPER(float32, helper_fdivs, (float32 src1, float32 src2))
DEF_HELPER_2(fadds, f32, f32, f32)
DEF_HELPER_2(fsubs, f32, f32, f32)
DEF_HELPER_2(fmuls, f32, f32, f32)
DEF_HELPER_2(fdivs, f32, f32, f32)
DEF_HELPER(void, helper_fsmuld, (float32 src1, float32 src2))
DEF_HELPER_2(fsmuld, void, f32, f32)
F_HELPER_0_0(dmulq);
DEF_HELPER(float32, helper_fnegs, (float32 src))
DEF_HELPER(void, helper_fitod, (int32_t src))
DEF_HELPER(void, helper_fitoq, (int32_t src))
DEF_HELPER_1(fnegs, f32, f32)
DEF_HELPER_1(fitod, void, s32)
DEF_HELPER_1(fitoq, void, s32)
DEF_HELPER(float32, helper_fitos, (int32_t src))
DEF_HELPER_1(fitos, f32, s32)
#ifdef TARGET_SPARC64
DEF_HELPER(void, helper_fnegd, (void))
DEF_HELPER(void, helper_fnegq, (void))
DEF_HELPER(uint32_t, helper_fxtos, (void))
DEF_HELPER_0(fnegd, void)
DEF_HELPER_0(fnegq, void)
DEF_HELPER_0(fxtos, i32)
F_HELPER_DQ_0_0(xto);
#endif
DEF_HELPER(float32, helper_fdtos, (void))
DEF_HELPER(void, helper_fstod, (float32 src))
DEF_HELPER(float32, helper_fqtos, (void))
DEF_HELPER(void, helper_fstoq, (float32 src))
DEF_HELPER_0(fdtos, f32)
DEF_HELPER_1(fstod, void, f32)
DEF_HELPER_0(fqtos, f32)
DEF_HELPER_1(fstoq, void, f32)
F_HELPER_0_0(qtod);
F_HELPER_0_0(dtoq);
DEF_HELPER(int32_t, helper_fstoi, (float32 src))
DEF_HELPER(int32_t, helper_fdtoi, (void))
DEF_HELPER(int32_t, helper_fqtoi, (void))
DEF_HELPER_1(fstoi, s32, f32)
DEF_HELPER_0(fdtoi, s32)
DEF_HELPER_0(fqtoi, s32)
#ifdef TARGET_SPARC64
DEF_HELPER(void, helper_fstox, (uint32_t src))
DEF_HELPER_1(fstox, void, i32)
F_HELPER_0_0(dtox);
F_HELPER_0_0(qtox);
F_HELPER_0_0(aligndata);
@ -148,9 +138,9 @@ F_HELPER_0_0(muld8ulx16);
F_HELPER_0_0(expand);
#define VIS_HELPER(name) \
F_HELPER_0_0(name##16); \
DEF_HELPER(uint32_t, helper_f ## name ## 16s, (uint32_t src1, uint32_t src2))\
DEF_HELPER_2(f ## name ## 16s, i32, i32, i32) \
F_HELPER_0_0(name##32); \
DEF_HELPER(uint32_t, helper_f ## name ## 32s, (uint32_t src1, uint32_t src2))
DEF_HELPER_2(f ## name ## 32s, i32, i32, i32)
VIS_HELPER(padd);
VIS_HELPER(psub);
@ -166,3 +156,5 @@ VIS_CMPHELPER(cmpne);
#undef F_HELPER_DQ_0_0
#undef VIS_HELPER
#undef VIS_CMPHELPER
#include "def-helper.h"

5
target-sparc/op_helper.c
View File

@ -55,6 +55,11 @@ void raise_exception(int tt)
cpu_loop_exit();
}
void HELPER(raise_exception)(int tt)
{
raise_exception(tt);
}
static inline void set_cwp(int new_cwp)
{
cpu_set_cwp(env, new_cwp);

1044
target-sparc/translate.c
View File

File diff suppressed because it is too large Load Diff

1482
tcg/tcg-op.h
View File

File diff suppressed because it is too large Load Diff

283
tcg/tcg.c
View File

@ -267,7 +267,8 @@ static inline void tcg_temp_alloc(TCGContext *s, int n)
tcg_abort();
}
TCGv tcg_global_reg_new(TCGType type, int reg, const char *name)
static inline int tcg_global_reg_new_internal(TCGType type, int reg,
const char *name)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
@ -289,13 +290,29 @@ TCGv tcg_global_reg_new(TCGType type, int reg, const char *name)
ts->name = name;
s->nb_globals++;
tcg_regset_set_reg(s->reserved_regs, reg);
return MAKE_TCGV(idx);
return idx;
}
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
{
int idx;
idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
{
int idx;
idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
return MAKE_TCGV_I64(idx);
}
#if TCG_TARGET_REG_BITS == 32
/* temporary hack to avoid register shortage for tcg_qemu_st64() */
TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
const char *name)
TCGv_i64 tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
const char *name)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
@ -325,12 +342,13 @@ TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
ts->name = strdup(buf);
s->nb_globals += 2;
return MAKE_TCGV(idx);
return MAKE_TCGV_I64(idx);
}
#endif
TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset,
const char *name)
static inline int tcg_global_mem_new_internal(TCGType type, int reg,
tcg_target_long offset,
const char *name)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
@ -386,10 +404,28 @@ TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset,
ts->name = name;
s->nb_globals++;
}
return MAKE_TCGV(idx);
return idx;
}
TCGv tcg_temp_new_internal(TCGType type, int temp_local)
TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
const char *name)
{
int idx;
idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
const char *name)
{
int idx;
idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
return MAKE_TCGV_I64(idx);
}
static inline int tcg_temp_new_internal(TCGType type, int temp_local)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
@ -437,14 +473,29 @@ TCGv tcg_temp_new_internal(TCGType type, int temp_local)
s->nb_temps++;
}
}
return MAKE_TCGV(idx);
return idx;
}
void tcg_temp_free(TCGv arg)
TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
{
int idx;
idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
{
int idx;
idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
return MAKE_TCGV_I64(idx);
}
static inline void tcg_temp_free_internal(int idx)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
int idx = GET_TCGV(arg);
int k;
assert(idx >= s->nb_globals && idx < s->nb_temps);
@ -458,35 +509,44 @@ void tcg_temp_free(TCGv arg)
s->first_free_temp[k] = idx;
}
TCGv tcg_const_i32(int32_t val)
void tcg_temp_free_i32(TCGv_i32 arg)
{
TCGv t0;
t0 = tcg_temp_new(TCG_TYPE_I32);
tcg_temp_free_internal(GET_TCGV_I32(arg));
}
void tcg_temp_free_i64(TCGv_i64 arg)
{
tcg_temp_free_internal(GET_TCGV_I64(arg));
}
TCGv_i32 tcg_const_i32(int32_t val)
{
TCGv_i32 t0;
t0 = tcg_temp_new_i32();
tcg_gen_movi_i32(t0, val);
return t0;
}
TCGv tcg_const_i64(int64_t val)
TCGv_i64 tcg_const_i64(int64_t val)
{
TCGv t0;
t0 = tcg_temp_new(TCG_TYPE_I64);
TCGv_i64 t0;
t0 = tcg_temp_new_i64();
tcg_gen_movi_i64(t0, val);
return t0;
}
TCGv tcg_const_local_i32(int32_t val)
TCGv_i32 tcg_const_local_i32(int32_t val)
{
TCGv t0;
t0 = tcg_temp_local_new(TCG_TYPE_I32);
TCGv_i32 t0;
t0 = tcg_temp_local_new_i32();
tcg_gen_movi_i32(t0, val);
return t0;
}
TCGv tcg_const_local_i64(int64_t val)
TCGv_i64 tcg_const_local_i64(int64_t val)
{
TCGv t0;
t0 = tcg_temp_local_new(TCG_TYPE_I64);
TCGv_i64 t0;
t0 = tcg_temp_local_new_i64();
tcg_gen_movi_i64(t0, val);
return t0;
}
@ -510,150 +570,128 @@ void tcg_register_helper(void *func, const char *name)
s->nb_helpers++;
}
static inline TCGType tcg_get_base_type(TCGContext *s, TCGv arg)
{
return s->temps[GET_TCGV(arg)].base_type;
}
static void tcg_gen_call_internal(TCGContext *s, TCGv func,
unsigned int flags,
unsigned int nb_rets, const TCGv *rets,
unsigned int nb_params, const TCGv *params)
{
int i;
*gen_opc_ptr++ = INDEX_op_call;
*gen_opparam_ptr++ = (nb_rets << 16) | (nb_params + 1);
for(i = 0; i < nb_rets; i++) {
*gen_opparam_ptr++ = GET_TCGV(rets[i]);
}
for(i = 0; i < nb_params; i++) {
*gen_opparam_ptr++ = GET_TCGV(params[i]);
}
*gen_opparam_ptr++ = GET_TCGV(func);
*gen_opparam_ptr++ = flags;
/* total parameters, needed to go backward in the instruction stream */
*gen_opparam_ptr++ = 1 + nb_rets + nb_params + 3;
}
#if TCG_TARGET_REG_BITS < 64
/* Note: we convert the 64 bit args to 32 bit and do some alignment
and endian swap. Maybe it would be better to do the alignment
and endian swap in tcg_reg_alloc_call(). */
void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags,
unsigned int nb_rets, const TCGv *rets,
unsigned int nb_params, const TCGv *args1)
void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
int sizemask, TCGArg ret, int nargs, TCGArg *args)
{
TCGv ret, *args2, rets_2[2], arg;
int j, i, call_type;
if (nb_rets == 1) {
ret = rets[0];
if (tcg_get_base_type(s, ret) == TCG_TYPE_I64) {
nb_rets = 2;
#ifdef TCG_TARGET_WORDS_BIGENDIAN
rets_2[0] = TCGV_HIGH(ret);
rets_2[1] = ret;
#else
rets_2[0] = ret;
rets_2[1] = TCGV_HIGH(ret);
#endif
rets = rets_2;
}
}
args2 = alloca((nb_params * 3) * sizeof(TCGv));
j = 0;
int call_type;
int i;
int real_args;
int nb_rets;
TCGArg *nparam;
*gen_opc_ptr++ = INDEX_op_call;
nparam = gen_opparam_ptr++;
call_type = (flags & TCG_CALL_TYPE_MASK);
for(i = 0; i < nb_params; i++) {
arg = args1[i];
if (tcg_get_base_type(s, arg) == TCG_TYPE_I64) {
if (ret != TCG_CALL_DUMMY_ARG) {
#if TCG_TARGET_REG_BITS < 64
if (sizemask & 1) {
#ifdef TCG_TARGET_WORDS_BIGENDIAN
*gen_opparam_ptr++ = ret + 1;
*gen_opparam_ptr++ = ret;
#else
*gen_opparam_ptr++ = ret;
*gen_opparam_ptr++ = ret + 1;
#endif
nb_rets = 2;
} else
#endif
{
*gen_opparam_ptr++ = ret;
nb_rets = 1;
}
} else {
nb_rets = 0;
}
real_args = 0;
for (i = 0; i < nargs; i++) {
#if TCG_TARGET_REG_BITS < 64
if (sizemask & (2 << i)) {
#ifdef TCG_TARGET_I386
/* REGPARM case: if the third parameter is 64 bit, it is
allocated on the stack */
if (j == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
call_type = TCG_CALL_TYPE_REGPARM_2;
flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
}
args2[j++] = arg;
args2[j++] = TCGV_HIGH(arg);
#else
#endif
#ifdef TCG_TARGET_CALL_ALIGN_ARGS
/* some targets want aligned 64 bit args */
if (j & 1) {
args2[j++] = TCG_CALL_DUMMY_ARG;
if (i & 1) {
*gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
}
#endif
#ifdef TCG_TARGET_WORDS_BIGENDIAN
args2[j++] = TCGV_HIGH(arg);
args2[j++] = arg;
*gen_opparam_ptr++ = args[i] + 1;
*gen_opparam_ptr++ = args[i];
#else
args2[j++] = arg;
args2[j++] = TCGV_HIGH(arg);
*gen_opparam_ptr++ = args[i];
*gen_opparam_ptr++ = args[i] + 1;
#endif
real_args += 2;
} else
#endif
} else {
args2[j++] = arg;
{
*gen_opparam_ptr++ = args[i];
real_args++;
}
}
tcg_gen_call_internal(s, func, flags,
nb_rets, rets, j, args2);
*gen_opparam_ptr++ = GET_TCGV_PTR(func);
*gen_opparam_ptr++ = flags;
*nparam = (nb_rets << 16) | (real_args + 1);
/* total parameters, needed to go backward in the instruction stream */
*gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
}
#else
void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags,
unsigned int nb_rets, const TCGv *rets,
unsigned int nb_params, const TCGv *args1)
{
tcg_gen_call_internal(s, func, flags,
nb_rets, rets, nb_params, args1);
}
#endif
#if TCG_TARGET_REG_BITS == 32
void tcg_gen_shifti_i64(TCGv ret, TCGv arg1,
void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
int c, int right, int arith)
{
if (c == 0) {
tcg_gen_mov_i32(ret, arg1);
tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
} else if (c >= 32) {
c -= 32;
if (right) {
if (arith) {
tcg_gen_sari_i32(ret, TCGV_HIGH(arg1), c);
tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
} else {
tcg_gen_shri_i32(ret, TCGV_HIGH(arg1), c);
tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
}
} else {
tcg_gen_shli_i32(TCGV_HIGH(ret), arg1, c);
tcg_gen_movi_i32(ret, 0);
tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
tcg_gen_movi_i32(TCGV_LOW(ret), 0);
}
} else {
TCGv t0, t1;
TCGv_i32 t0, t1;
t0 = tcg_temp_new(TCG_TYPE_I32);
t1 = tcg_temp_new(TCG_TYPE_I32);
t0 = tcg_temp_new_i32();
t1 = tcg_temp_new_i32();
if (right) {
tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
if (arith)
tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
else
else
tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
tcg_gen_shri_i32(ret, arg1, c);
tcg_gen_or_i32(ret, ret, t0);
tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
} else {
tcg_gen_shri_i32(t0, arg1, 32 - c);
tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
/* Note: ret can be the same as arg1, so we use t1 */
tcg_gen_shli_i32(t1, arg1, c);
tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
tcg_gen_mov_i32(ret, t1);
tcg_gen_mov_i32(TCGV_LOW(ret), t1);
}
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
}
}
#endif
@ -698,9 +736,14 @@ static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
return buf;
}
char *tcg_get_arg_str(TCGContext *s, char *buf, int buf_size, TCGv arg)
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
{
return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV(arg));
return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
}
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
{
return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
}
static int helper_cmp(const void *p1, const void *p2)

128
tcg/tcg.h
View File

@ -114,7 +114,11 @@ typedef tcg_target_ulong TCGArg;
expecially on targets with braindamaged ABIs (e.g. i386).
We use plain int by default to avoid this runtime overhead.
Users of tcg_gen_* don't need to know about any of this, and should
treat TCGv as an opaque type. */
treat TCGv as an opaque type.
In additon we do typechecking for different types of variables. TCGv_i32
and TCGv_i64 are 32/64-bit variables respectively. TCGv and TCGv_ptr
are aliases for target_ulong and host pointer sized values respectively.
*/
//#define DEBUG_TCGV 1
@ -123,28 +127,42 @@ typedef tcg_target_ulong TCGArg;
typedef struct
{
int n;
} TCGv;
} TCGv_i32;
#define MAKE_TCGV(i) __extension__ \
({ TCGv make_tcgv_tmp = {i}; make_tcgv_tmp;})
#define GET_TCGV(t) ((t).n)
typedef struct
{
int n;
} TCGv_i64;
#define MAKE_TCGV_I32(i) __extension__ \
({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
#define MAKE_TCGV_I64(i) __extension__ \
({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
#define GET_TCGV_I32(t) ((t).n)
#define GET_TCGV_I64(t) ((t).n)
#if TCG_TARGET_REG_BITS == 32
#define TCGV_HIGH(t) MAKE_TCGV(GET_TCGV(t) + 1)
#define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
#define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
#endif
#else /* !DEBUG_TCGV */
typedef int TCGv;
#define MAKE_TCGV(x) (x)
#define GET_TCGV(t) (t)
typedef int TCGv_i32;
typedef int TCGv_i64;
#define MAKE_TCGV_I32(x) (x)
#define MAKE_TCGV_I64(x) (x)
#define GET_TCGV_I32(t) (t)
#define GET_TCGV_I64(t) (t)
#if TCG_TARGET_REG_BITS == 32
#define TCGV_LOW(t) (t)
#define TCGV_HIGH(t) ((t) + 1)
#endif
#endif /* DEBUG_TCGV */
/* Dummy definition to avoid compiler warnings. */
#define TCGV_UNUSED(x) x = MAKE_TCGV(-1)
#define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
#define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
/* call flags */
#define TCG_CALL_TYPE_MASK 0x000f
@ -158,7 +176,7 @@ typedef int TCGv;
#define TCG_CALL_PURE 0x0010
/* used to align parameters */
#define TCG_CALL_DUMMY_TCGV MAKE_TCGV(-1)
#define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1)
#define TCG_CALL_DUMMY_ARG ((TCGArg)(-1))
typedef enum {
@ -301,22 +319,39 @@ int dyngen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);
void tcg_set_frame(TCGContext *s, int reg,
tcg_target_long start, tcg_target_long size);
TCGv tcg_global_reg_new(TCGType type, int reg, const char *name);
TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
const char *name);
TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset,
const char *name);
TCGv tcg_temp_new_internal(TCGType type, int temp_local);
static inline TCGv tcg_temp_new(TCGType type)
TCGv_i64 tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
const char *name);
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
const char *name);
TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
static inline TCGv_i32 tcg_temp_new_i32(void)
{
return tcg_temp_new_internal(type, 0);
return tcg_temp_new_internal_i32(0);
}
static inline TCGv tcg_temp_local_new(TCGType type)
static inline TCGv_i32 tcg_temp_local_new_i32(void)
{
return tcg_temp_new_internal(type, 1);
return tcg_temp_new_internal_i32(1);
}
void tcg_temp_free(TCGv arg);
char *tcg_get_arg_str(TCGContext *s, char *buf, int buf_size, TCGv arg);
void tcg_temp_free_i32(TCGv_i32 arg);
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
const char *name);
TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
static inline TCGv_i64 tcg_temp_new_i64(void)
{
return tcg_temp_new_internal_i64(0);
}
static inline TCGv_i64 tcg_temp_local_new_i64(void)
{
return tcg_temp_new_internal_i64(1);
}
void tcg_temp_free_i64(TCGv_i64 arg);
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
void tcg_dump_info(FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
@ -370,34 +405,45 @@ do {\
void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags,
unsigned int nb_rets, const TCGv *rets,
unsigned int nb_params, const TCGv *args1);
void tcg_gen_shifti_i64(TCGv ret, TCGv arg1,
int c, int right, int arith);
/* only used for debugging purposes */
void tcg_register_helper(void *func, const char *name);
#define TCG_HELPER(func) tcg_register_helper(func, #func)
const char *tcg_helper_get_name(TCGContext *s, void *func);
void tcg_dump_ops(TCGContext *s, FILE *outfile);
void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
TCGv tcg_const_i32(int32_t val);
TCGv tcg_const_i64(int64_t val);
TCGv tcg_const_local_i32(int32_t val);
TCGv tcg_const_local_i64(int64_t val);
#if TCG_TARGET_REG_BITS == 32
#define tcg_const_ptr tcg_const_i32
#define tcg_add_ptr tcg_add_i32
#define tcg_sub_ptr tcg_sub_i32
#define TCGv_ptr TCGv_i32
#define GET_TCGV_PTR GET_TCGV_I32
#define tcg_global_reg_new_ptr tcg_global_reg_new_i32
#define tcg_global_mem_new_ptr tcg_global_mem_new_i32
#define tcg_temp_new_ptr tcg_temp_new_i32
#define tcg_temp_free_ptr tcg_temp_free_i32
#else
#define tcg_const_ptr tcg_const_i64
#define tcg_add_ptr tcg_add_i64
#define tcg_sub_ptr tcg_sub_i64
#define TCGv_ptr TCGv_i64
#define GET_TCGV_PTR GET_TCGV_I64
#define tcg_global_reg_new_ptr tcg_global_reg_new_i64
#define tcg_global_mem_new_ptr tcg_global_mem_new_i64
#define tcg_temp_new_ptr tcg_temp_new_i64
#define tcg_temp_free_ptr tcg_temp_free_i64
#endif
void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
int sizemask, TCGArg ret, int nargs, TCGArg *args);
void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
int c, int right, int arith);
/* only used for debugging purposes */
void tcg_register_helper(void *func, const char *name);
const char *tcg_helper_get_name(TCGContext *s, void *func);
void tcg_dump_ops(TCGContext *s, FILE *outfile);
void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
TCGv_i32 tcg_const_i32(int32_t val);
TCGv_i64 tcg_const_i64(int64_t val);
TCGv_i32 tcg_const_local_i32(int32_t val);
TCGv_i64 tcg_const_local_i64(int64_t val);
void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
int label_index, long addend);
const TCGArg *tcg_gen_code_op(TCGContext *s, int opc, const TCGArg *args1,