From a7b69170254b15b5a40b318ed5559084ccfc466b Mon Sep 17 00:00:00 2001 From: Rajnesh Kanwal Date: Mon, 16 Oct 2023 12:17:31 +0100 Subject: [PATCH] target/riscv: Without H-mode mask all HS mode inturrupts in mie. Signed-off-by: Rajnesh Kanwal Reviewed-by: Alistair Francis Message-ID: <20231016111736.28721-2-rkanwal@rivosinc.com> Signed-off-by: Alistair Francis --- target/riscv/csr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 30cc21e979..4847b47a98 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -1525,7 +1525,7 @@ static RISCVException rmw_mie64(CPURISCVState *env, int csrno, env->mie = (env->mie & ~mask) | (new_val & mask); if (!riscv_has_ext(env, RVH)) { - env->mie &= ~((uint64_t)MIP_SGEIP); + env->mie &= ~((uint64_t)HS_MODE_INTERRUPTS); } return RISCV_EXCP_NONE;