Use the new concat_i32_i64 op for std and stda

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2008-09-21 14:49:09 +00:00
parent 36aa55dcd9
commit a7ec422912
3 changed files with 19 additions and 21 deletions

View File

@ -44,7 +44,6 @@ DEF_HELPER(void, helper_restore, (void))
DEF_HELPER(void, helper_flush, (target_ulong addr))
DEF_HELPER(target_ulong, helper_udiv, (target_ulong a, target_ulong b))
DEF_HELPER(target_ulong, helper_sdiv, (target_ulong a, target_ulong b))
DEF_HELPER(uint64_t, helper_pack64, (target_ulong high, target_ulong low))
DEF_HELPER(void, helper_stdf, (target_ulong addr, int mem_idx))
DEF_HELPER(void, helper_lddf, (target_ulong addr, int mem_idx))
DEF_HELPER(void, helper_ldqf, (target_ulong addr, int mem_idx))

View File

@ -2281,11 +2281,6 @@ target_ulong helper_sdiv(target_ulong a, target_ulong b)
}
}
uint64_t helper_pack64(target_ulong high, target_ulong low)
{
return ((uint64_t)high << 32) | (uint64_t)(low & 0xffffffff);
}
void helper_stdf(target_ulong addr, int mem_idx)
{
helper_check_align(addr, 7);

View File

@ -1715,13 +1715,14 @@ static inline void gen_ldda_asi(TCGv hi, TCGv addr, int insn, int rd)
static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd)
{
TCGv r_temp, r_asi, r_size;
TCGv r_low, r_asi, r_size;
r_temp = tcg_temp_new(TCG_TYPE_TL);
gen_movl_reg_TN(rd + 1, r_temp);
tcg_gen_helper_1_2(helper_pack64, cpu_tmp64, hi,
r_temp);
tcg_temp_free(r_temp);
gen_movl_reg_TN(rd + 1, cpu_tmp0);
r_low = tcg_temp_new(TCG_TYPE_I32);
tcg_gen_trunc_tl_i32(r_low, cpu_tmp0);
tcg_gen_trunc_tl_i32(cpu_tmp32, hi);
tcg_gen_concat_i32_i64(cpu_tmp64, r_low, cpu_tmp32);
tcg_temp_free(r_low);
r_asi = gen_get_asi(insn, addr);
r_size = tcg_const_i32(8);
tcg_gen_helper_0_4(helper_st_asi, addr, cpu_tmp64, r_asi, r_size);
@ -1817,12 +1818,14 @@ static inline void gen_ldda_asi(TCGv hi, TCGv addr, int insn, int rd)
static inline void gen_stda_asi(TCGv hi, TCGv addr, int insn, int rd)
{
TCGv r_temp, r_asi, r_size;
TCGv r_low, r_asi, r_size;
r_temp = tcg_temp_new(TCG_TYPE_TL);
gen_movl_reg_TN(rd + 1, r_temp);
tcg_gen_helper_1_2(helper_pack64, cpu_tmp64, hi, r_temp);
tcg_temp_free(r_temp);
gen_movl_reg_TN(rd + 1, cpu_tmp0);
r_low = tcg_temp_new(TCG_TYPE_I32);
tcg_gen_trunc_tl_i32(r_low, cpu_tmp0);
tcg_gen_trunc_tl_i32(cpu_tmp32, hi);
tcg_gen_concat_i32_i64(cpu_tmp64, r_low, cpu_tmp32);
tcg_temp_free(r_low);
r_asi = tcg_const_i32(GET_FIELD(insn, 19, 26));
r_size = tcg_const_i32(8);
tcg_gen_helper_0_4(helper_st_asi, addr, cpu_tmp64, r_asi, r_size);
@ -4482,10 +4485,11 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_helper_0_2(helper_check_align, cpu_addr,
r_const); // XXX remove
tcg_temp_free(r_const);
r_low = tcg_temp_new(TCG_TYPE_TL);
gen_movl_reg_TN(rd + 1, r_low);
tcg_gen_helper_1_2(helper_pack64, cpu_tmp64, cpu_val,
r_low);
gen_movl_reg_TN(rd + 1, cpu_tmp0);
r_low = tcg_temp_new(TCG_TYPE_I32);
tcg_gen_trunc_tl_i32(r_low, cpu_tmp0);
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_val);
tcg_gen_concat_i32_i64(cpu_tmp64, r_low, cpu_tmp32);
tcg_temp_free(r_low);
tcg_gen_qemu_st64(cpu_tmp64, cpu_addr, dc->mem_idx);
}