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target-mips/translate.c: Update OPC_SYNCI 

Update OPC_SYNCI with BS_STOP, in order to handle the instructions which saved
in the same TB of the store instruction.

Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
[leon.alrae@imgtec.com: update microMIPS SYNCI as well]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
This commit is contained in:
Dongxue Zhang 2014-07-29 21:48:10 +08:00 committed by Leon Alrae
parent a773cc7970
commit a83bddd60d
1 changed files with 6 additions and 1 deletions
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7
target-mips/translate.c
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@ -13190,6 +13190,9 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
gen_logic_imm(ctx, OPC_LUI, rs, -1, imm);
break;
case SYNCI:
/* Break the TB to be able to sync copied instructions
immediately */
ctx->bstate = BS_STOP;
break;
case BC2F:
case BC2T:
@ -16928,7 +16931,9 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx)
break;
case OPC_SYNCI:
check_insn(ctx, ISA_MIPS32R2);
/* Treat as NOP. */
/* Break the TB to be able to sync copied instructions
immediately */
ctx->bstate = BS_STOP;
break;
case OPC_BPOSGE32: /* MIPS DSP branch */
#if defined(TARGET_MIPS64)