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target/arm: Make A32/T32 use new fpstatus_ptr() API

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Make A32/T32 code use the new fpstatus_ptr() API:
 get_fpstatus_ptr(0) -> fpstatus_ptr(FPST_FPCR)
 get_fpstatus_ptr(1) -> fpstatus_ptr(FPST_STD)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200806104453.30393-3-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-08-06 11:44:51 +01:00
parent cdfb22bb73
commit a84d1d1316
3 changed files with 36 additions and 49 deletions
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28
target/arm/translate-neon.c.inc
View File

@ -181,7 +181,7 @@ static bool trans_VCMLA(DisasContext *s, arg_VCMLA *a)
}
opr_sz = (1 + a->q) * 8;
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
fn_gvec_ptr = a->size ? gen_helper_gvec_fcmlas : gen_helper_gvec_fcmlah;
tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
@ -218,7 +218,7 @@ static bool trans_VCADD(DisasContext *s, arg_VCADD *a)
}
opr_sz = (1 + a->q) * 8;
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
fn_gvec_ptr = a->size ? gen_helper_gvec_fcadds : gen_helper_gvec_fcaddh;
tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
@ -322,7 +322,7 @@ static bool trans_VCMLA_scalar(DisasContext *s, arg_VCMLA_scalar *a)
fn_gvec_ptr = (a->size ? gen_helper_gvec_fcmlas_idx
: gen_helper_gvec_fcmlah_idx);
opr_sz = (1 + a->q) * 8;
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
vfp_reg_offset(1, a->vm),
@ -358,7 +358,7 @@ static bool trans_VDOT_scalar(DisasContext *s, arg_VDOT_scalar *a)
fn_gvec = a->u ? gen_helper_gvec_udot_idx_b : gen_helper_gvec_sdot_idx_b;
opr_sz = (1 + a->q) * 8;
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
tcg_gen_gvec_3_ool(vfp_reg_offset(1, a->vd),
vfp_reg_offset(1, a->vn),
vfp_reg_offset(1, a->rm),
@ -1063,7 +1063,7 @@ static bool do_3same_fp(DisasContext *s, arg_3same *a, VFPGen3OpSPFn *fn,
return true;
}
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
TCGv_ptr fpstatus = fpstatus_ptr(FPST_STD);
for (pass = 0; pass < (a->q ? 4 : 2); pass++) {
tmp = neon_load_reg(a->vn, pass);
tmp2 = neon_load_reg(a->vm, pass);
@ -1091,7 +1091,7 @@ static bool do_3same_fp(DisasContext *s, arg_3same *a, VFPGen3OpSPFn *fn,
uint32_t rn_ofs, uint32_t rm_ofs, \
uint32_t oprsz, uint32_t maxsz) \
{ \
TCGv_ptr fpst = get_fpstatus_ptr(1); \
TCGv_ptr fpst = fpstatus_ptr(FPST_STD); \
tcg_gen_gvec_3_ptr(rd_ofs, rn_ofs, rm_ofs, fpst, \
oprsz, maxsz, 0, FUNC); \
tcg_temp_free_ptr(fpst); \
@ -1287,7 +1287,7 @@ static bool do_3same_fp_pair(DisasContext *s, arg_3same *a, VFPGen3OpSPFn *fn)
* early. Since Q is 0 there are always just two passes, so instead
* of a complicated loop over each pass we just unroll.
*/
fpstatus = get_fpstatus_ptr(1);
fpstatus = fpstatus_ptr(FPST_STD);
tmp = neon_load_reg(a->vn, 0);
tmp2 = neon_load_reg(a->vn, 1);
fn(tmp, tmp, tmp2, fpstatus);
@ -1790,7 +1790,7 @@ static bool do_fp_2sh(DisasContext *s, arg_2reg_shift *a,
return true;
}
fpstatus = get_fpstatus_ptr(1);
fpstatus = fpstatus_ptr(FPST_STD);
shiftv = tcg_const_i32(a->shift);
for (pass = 0; pass < (a->q ? 4 : 2); pass++) {
tmp = neon_load_reg(a->vm, pass);
@ -2591,7 +2591,7 @@ static bool trans_VMLS_2sc(DisasContext *s, arg_2scalar *a)
#define WRAP_FP_FN(WRAPNAME, FUNC) \
static void WRAPNAME(TCGv_i32 rd, TCGv_i32 rn, TCGv_i32 rm) \
{ \
TCGv_ptr fpstatus = get_fpstatus_ptr(1); \
TCGv_ptr fpstatus = fpstatus_ptr(FPST_STD); \
FUNC(rd, rn, rm, fpstatus); \
tcg_temp_free_ptr(fpstatus); \
}
@ -3480,7 +3480,7 @@ static bool trans_VCVT_F16_F32(DisasContext *s, arg_2misc *a)
return true;
}
fpst = get_fpstatus_ptr(true);
fpst = fpstatus_ptr(FPST_STD);
ahp = get_ahp_flag();
tmp = neon_load_reg(a->vm, 0);
gen_helper_vfp_fcvt_f32_to_f16(tmp, tmp, fpst, ahp);
@ -3528,7 +3528,7 @@ static bool trans_VCVT_F32_F16(DisasContext *s, arg_2misc *a)
return true;
}
fpst = get_fpstatus_ptr(true);
fpst = fpstatus_ptr(FPST_STD);
ahp = get_ahp_flag();
tmp3 = tcg_temp_new_i32();
tmp = neon_load_reg(a->vm, 0);
@ -3838,7 +3838,7 @@ static bool do_2misc_fp(DisasContext *s, arg_2misc *a,
return true;
}
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
for (pass = 0; pass < (a->q ? 4 : 2); pass++) {
TCGv_i32 tmp = neon_load_reg(a->vm, pass);
fn(tmp, tmp, fpst);
@ -3932,7 +3932,7 @@ static bool do_vrint(DisasContext *s, arg_2misc *a, int rmode)
return true;
}
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode, cpu_env);
for (pass = 0; pass < (a->q ? 4 : 2); pass++) {
@ -3993,7 +3993,7 @@ static bool do_vcvt(DisasContext *s, arg_2misc *a, int rmode, bool is_signed)
return true;
}
fpst = get_fpstatus_ptr(1);
fpst = fpstatus_ptr(FPST_STD);
tcg_shift = tcg_const_i32(0);
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode, cpu_env);

44
target/arm/translate-vfp.c.inc
View File

@ -359,7 +359,7 @@ static bool trans_VRINT(DisasContext *s, arg_VRINT *a)
return true;
}
fpst = get_fpstatus_ptr(0);
fpst = fpstatus_ptr(FPST_FPCR);
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rounding));
gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
@ -422,7 +422,7 @@ static bool trans_VCVT(DisasContext *s, arg_VCVT *a)
return true;
}
fpst = get_fpstatus_ptr(0);
fpst = fpstatus_ptr(FPST_FPCR);
tcg_shift = tcg_const_i32(0);
@ -1231,7 +1231,7 @@ static bool do_vfp_3op_sp(DisasContext *s, VFPGen3OpSPFn *fn,
f0 = tcg_temp_new_i32();
f1 = tcg_temp_new_i32();
fd = tcg_temp_new_i32();
fpst = get_fpstatus_ptr(0);
fpst = fpstatus_ptr(FPST_FPCR);
neon_load_reg32(f0, vn);
neon_load_reg32(f1, vm);
@ -1314,7 +1314,7 @@ static bool do_vfp_3op_dp(DisasContext *s, VFPGen3OpDPFn *fn,
f0 = tcg_temp_new_i64();
f1 = tcg_temp_new_i64();
fd = tcg_temp_new_i64();
fpst = get_fpstatus_ptr(0);
fpst = fpstatus_ptr(FPST_FPCR);
neon_load_reg64(f0, vn);
neon_load_reg64(f1, vm);
@ -1796,7 +1796,7 @@ static bool do_vfm_sp(DisasContext *s, arg_VFMA_sp *a, bool neg_n, bool neg_d)
/* VFNMA, VFNMS */
gen_helper_vfp_negs(vd, vd);
}
fpst = get_fpstatus_ptr(0);
fpst = fpstatus_ptr(FPST_FPCR);
gen_helper_vfp_muladds(vd, vn, vm, vd, fpst);
neon_store_reg32(vd, a->vd);
@ -1887,7 +1887,7 @@ static bool do_vfm_dp(DisasContext *s, arg_VFMA_dp *a, bool neg_n, bool neg_d)
/* VFNMA, VFNMS */
gen_helper_vfp_negd(vd, vd);
}
fpst = get_fpstatus_ptr(0);
fpst = fpstatus_ptr(FPST_FPCR);
gen_helper_vfp_muladdd(vd, vn, vm, vd, fpst);
neon_store_reg64(vd, a->vd);
@ -2171,7 +2171,7 @@ static bool trans_VCVT_f32_f16(DisasContext *s, arg_VCVT_f32_f16 *a)
return true;
}
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
ahp_mode = get_ahp_flag();
tmp = tcg_temp_new_i32();
/* The T bit tells us if we want the low or high 16 bits of Vm */
@ -2208,7 +2208,7 @@ static bool trans_VCVT_f64_f16(DisasContext *s, arg_VCVT_f64_f16 *a)
return true;
}
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
ahp_mode = get_ahp_flag();
tmp = tcg_temp_new_i32();
/* The T bit tells us if we want the low or high 16 bits of Vm */
@ -2237,7 +2237,7 @@ static bool trans_VCVT_f16_f32(DisasContext *s, arg_VCVT_f16_f32 *a)
return true;
}
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
ahp_mode = get_ahp_flag();
tmp = tcg_temp_new_i32();
@ -2274,7 +2274,7 @@ static bool trans_VCVT_f16_f64(DisasContext *s, arg_VCVT_f16_f64 *a)
return true;
}
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
ahp_mode = get_ahp_flag();
tmp = tcg_temp_new_i32();
vm = tcg_temp_new_i64();
@ -2304,7 +2304,7 @@ static bool trans_VRINTR_sp(DisasContext *s, arg_VRINTR_sp *a)
tmp = tcg_temp_new_i32();
neon_load_reg32(tmp, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
gen_helper_rints(tmp, tmp, fpst);
neon_store_reg32(tmp, a->vd);
tcg_temp_free_ptr(fpst);
@ -2336,7 +2336,7 @@ static bool trans_VRINTR_dp(DisasContext *s, arg_VRINTR_dp *a)
tmp = tcg_temp_new_i64();
neon_load_reg64(tmp, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
gen_helper_rintd(tmp, tmp, fpst);
neon_store_reg64(tmp, a->vd);
tcg_temp_free_ptr(fpst);
@ -2360,7 +2360,7 @@ static bool trans_VRINTZ_sp(DisasContext *s, arg_VRINTZ_sp *a)
tmp = tcg_temp_new_i32();
neon_load_reg32(tmp, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
tcg_rmode = tcg_const_i32(float_round_to_zero);
gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
gen_helper_rints(tmp, tmp, fpst);
@ -2397,7 +2397,7 @@ static bool trans_VRINTZ_dp(DisasContext *s, arg_VRINTZ_dp *a)
tmp = tcg_temp_new_i64();
neon_load_reg64(tmp, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
tcg_rmode = tcg_const_i32(float_round_to_zero);
gen_helper_set_rmode(tcg_rmode, tcg_rmode, fpst);
gen_helper_rintd(tmp, tmp, fpst);
@ -2424,7 +2424,7 @@ static bool trans_VRINTX_sp(DisasContext *s, arg_VRINTX_sp *a)
tmp = tcg_temp_new_i32();
neon_load_reg32(tmp, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
gen_helper_rints_exact(tmp, tmp, fpst);
neon_store_reg32(tmp, a->vd);
tcg_temp_free_ptr(fpst);
@ -2456,7 +2456,7 @@ static bool trans_VRINTX_dp(DisasContext *s, arg_VRINTX_dp *a)
tmp = tcg_temp_new_i64();
neon_load_reg64(tmp, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
gen_helper_rintd_exact(tmp, tmp, fpst);
neon_store_reg64(tmp, a->vd);
tcg_temp_free_ptr(fpst);
@ -2535,7 +2535,7 @@ static bool trans_VCVT_int_sp(DisasContext *s, arg_VCVT_int_sp *a)
vm = tcg_temp_new_i32();
neon_load_reg32(vm, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
if (a->s) {
/* i32 -> f32 */
gen_helper_vfp_sitos(vm, vm, fpst);
@ -2571,7 +2571,7 @@ static bool trans_VCVT_int_dp(DisasContext *s, arg_VCVT_int_dp *a)
vm = tcg_temp_new_i32();
vd = tcg_temp_new_i64();
neon_load_reg32(vm, a->vm);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
if (a->s) {
/* i32 -> f64 */
gen_helper_vfp_sitod(vd, vm, fpst);
@ -2637,7 +2637,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VCVT_fix_sp *a)
vd = tcg_temp_new_i32();
neon_load_reg32(vd, a->vd);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
shift = tcg_const_i32(frac_bits);
/* Switch on op:U:sx bits */
@ -2702,7 +2702,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a)
vd = tcg_temp_new_i64();
neon_load_reg64(vd, a->vd);
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
shift = tcg_const_i32(frac_bits);
/* Switch on op:U:sx bits */
@ -2755,7 +2755,7 @@ static bool trans_VCVT_sp_int(DisasContext *s, arg_VCVT_sp_int *a)
return true;
}
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
vm = tcg_temp_new_i32();
neon_load_reg32(vm, a->vm);
@ -2797,7 +2797,7 @@ static bool trans_VCVT_dp_int(DisasContext *s, arg_VCVT_dp_int *a)
return true;
}
fpst = get_fpstatus_ptr(false);
fpst = fpstatus_ptr(FPST_FPCR);
vm = tcg_temp_new_i64();
vd = tcg_temp_new_i32();
neon_load_reg64(vm, a->vm);

13
target/arm/translate.c
View File

@ -1094,19 +1094,6 @@ static inline void gen_hlt(DisasContext *s, int imm)
unallocated_encoding(s);
}
static TCGv_ptr get_fpstatus_ptr(int neon)
{
TCGv_ptr statusptr = tcg_temp_new_ptr();
int offset;
if (neon) {
offset = offsetof(CPUARMState, vfp.standard_fp_status);
} else {
offset = offsetof(CPUARMState, vfp.fp_status);
}
tcg_gen_addi_ptr(statusptr, cpu_env, offset);
return statusptr;
}
static inline long vfp_reg_offset(bool dp, unsigned reg)
{
if (dp) {