From a8b37120d459a7fdd353f08e9ccb75178086c6cc Mon Sep 17 00:00:00 2001 From: LIU Zhiwei Date: Wed, 11 Aug 2021 22:46:12 +0800 Subject: [PATCH] target/riscv: Don't wrongly override isa version For some cpu, the isa version has already been set in cpu init function. Thus only override the isa version when isa version is not set, or users set different isa version explicitly by cpu parameters. Signed-off-by: LIU Zhiwei Reviewed-by: Bin Meng Message-id: 20210811144612.68674-1-zhiwei_liu@c-sky.com Signed-off-by: Alistair Francis --- target/riscv/cpu.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 991a6bb760..1a2b03d579 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -392,9 +392,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) RISCVCPU *cpu = RISCV_CPU(dev); CPURISCVState *env = &cpu->env; RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev); - int priv_version = PRIV_VERSION_1_11_0; - int bext_version = BEXT_VERSION_0_93_0; - int vext_version = VEXT_VERSION_0_07_1; + int priv_version = 0; target_ulong target_misa = env->misa; Error *local_err = NULL; @@ -417,9 +415,11 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } } - set_priv_version(env, priv_version); - set_bext_version(env, bext_version); - set_vext_version(env, vext_version); + if (priv_version) { + set_priv_version(env, priv_version); + } else if (!env->priv_ver) { + set_priv_version(env, PRIV_VERSION_1_11_0); + } if (cpu->cfg.mmu) { set_feature(env, RISCV_FEATURE_MMU); @@ -497,6 +497,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) target_misa |= RVH; } if (cpu->cfg.ext_b) { + int bext_version = BEXT_VERSION_0_93_0; target_misa |= RVB; if (cpu->cfg.bext_spec) { @@ -515,6 +516,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) set_bext_version(env, bext_version); } if (cpu->cfg.ext_v) { + int vext_version = VEXT_VERSION_0_07_1; target_misa |= RVV; if (!is_power_of_2(cpu->cfg.vlen)) { error_setg(errp,