accel/tcg: Add x86_64 load_atom_extract_al16_or_al8
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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/*
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* SPDX-License-Identifier: GPL-2.0-or-later
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* Atomic extract 64 from 128-bit, x86_64 version.
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*
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* Copyright (C) 2023 Linaro, Ltd.
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*/
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#ifndef X86_64_LOAD_EXTRACT_AL16_AL8_H
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#define X86_64_LOAD_EXTRACT_AL16_AL8_H
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#ifdef CONFIG_INT128_TYPE
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#include "host/cpuinfo.h"
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/**
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* load_atom_extract_al16_or_al8:
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* @pv: host address
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* @s: object size in bytes, @s <= 8.
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*
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* Load @s bytes from @pv, when pv % s != 0. If [p, p+s-1] does not
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* cross an 16-byte boundary then the access must be 16-byte atomic,
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* otherwise the access must be 8-byte atomic.
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*/
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static inline uint64_t ATTRIBUTE_ATOMIC128_OPT
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load_atom_extract_al16_or_al8(void *pv, int s)
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{
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uintptr_t pi = (uintptr_t)pv;
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__int128_t *ptr_align = (__int128_t *)(pi & ~7);
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int shr = (pi & 7) * 8;
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Int128Alias r;
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/*
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* ptr_align % 16 is now only 0 or 8.
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* If the host supports atomic loads with VMOVDQU, then always use that,
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* making the branch highly predictable. Otherwise we must use VMOVDQA
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* when ptr_align % 16 == 0 for 16-byte atomicity.
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*/
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if ((cpuinfo & CPUINFO_ATOMIC_VMOVDQU) || (pi & 8)) {
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asm("vmovdqu %1, %0" : "=x" (r.i) : "m" (*ptr_align));
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} else {
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asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr_align));
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}
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return int128_getlo(int128_urshift(r.s, shr));
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}
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#else
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/* Fallback definition that must be optimized away, or error. */
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uint64_t QEMU_ERROR("unsupported atomic")
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load_atom_extract_al16_or_al8(void *pv, int s);
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#endif
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#endif /* X86_64_LOAD_EXTRACT_AL16_AL8_H */
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