From a8c1a75343940fdc9d47e6a9b7723476bb5e1774 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Thu, 14 Jul 2016 16:43:42 +0300 Subject: [PATCH] hw/mips: fix PCI bus initialization Delay the host-bridge 'realization' until the PCI root bus is attached. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Tested-by: Mark Cave-Ayland Acked-by: Leon Alrae Tested-by: Leon Alrae --- hw/mips/gt64xxx_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 3f4523df22..4811843ab6 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1167,7 +1167,6 @@ PCIBus *gt64120_register(qemu_irq *pic) DeviceState *dev; dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); - qdev_init_nofail(dev); d = GT64120_PCI_HOST_BRIDGE(dev); phb = PCI_HOST_BRIDGE(dev); memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX); @@ -1178,6 +1177,7 @@ PCIBus *gt64120_register(qemu_irq *pic) &d->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); + qdev_init_nofail(dev); memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci");