hw/net/stellaris_enet: Correctly implement the TR and THR registers
Packet transmission for the stellaris ethernet controller can be triggered in one of two ways: * by setting a threshold value in the THR register; when the FIFO fill level reaches the threshold, the h/w starts transmitting. Software has to finish filling the FIFO before the transmit process completes to avoid a (silent) underrun * by software writing to the TR register to explicitly trigger transmission Since QEMU transmits packets instantaneously (from the guest's point of view), implement "transmit based on threshold" with our existing mechanism of "transmit as soon as we have the whole packet", with the additional wrinkle that we don't transmit if the packet size is below the specified threshold, and implement "transmit by specific request" properly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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@ -109,6 +109,15 @@ static inline bool stellaris_txpacket_complete(stellaris_enet_state *s)
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return s->tx_fifo_len >= framelen;
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}
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/* Return true if the TX FIFO threshold is enabled and the FIFO
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* has filled enough to reach it.
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*/
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static inline bool stellaris_tx_thr_reached(stellaris_enet_state *s)
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{
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return (s->thr < 0x3f &&
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(s->tx_fifo_len >= 4 * (s->thr * 8 + 1)));
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}
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/* Send the packet currently in the TX FIFO */
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static void stellaris_enet_send(stellaris_enet_state *s)
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{
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@ -309,7 +318,7 @@ static void stellaris_enet_write(void *opaque, hwaddr offset,
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s->tx_fifo[s->tx_fifo_len++] = value >> 24;
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}
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if (stellaris_txpacket_complete(s)) {
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if (stellaris_tx_thr_reached(s) && stellaris_txpacket_complete(s)) {
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stellaris_enet_send(s);
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}
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break;
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@ -338,9 +347,13 @@ static void stellaris_enet_write(void *opaque, hwaddr offset,
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case 0x2c: /* MTXD */
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s->mtxd = value & 0xff;
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break;
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case 0x38: /* TR */
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if (value & 1) {
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stellaris_enet_send(s);
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}
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break;
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case 0x30: /* MRXD */
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case 0x34: /* NP */
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case 0x38: /* TR */
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/* Ignored. */
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case 0x3c: /* Undocuented: Timestamp? */
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/* Ignored. */
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