apic: Reevaluate pending interrupts on LVT_LINT0 changes
When the guest modifies the LVT_LINT0 register, we need to check if some pending PIC interrupt can now be delivered. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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parent
3db3659bf6
commit
a94820ddc3
18
hw/apic.c
18
hw/apic.c
@ -532,6 +532,15 @@ static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode,
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apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode);
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}
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static bool apic_check_pic(APICCommonState *s)
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{
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if (!apic_accept_pic_intr(&s->busdev.qdev) || !pic_get_output(isa_pic)) {
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return false;
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}
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apic_deliver_pic_intr(&s->busdev.qdev, 1);
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return true;
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}
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int apic_get_interrupt(DeviceState *d)
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{
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APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
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@ -559,9 +568,7 @@ int apic_get_interrupt(DeviceState *d)
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apic_sync_vapic(s, SYNC_TO_VAPIC);
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/* re-inject if there is still a pending PIC interrupt */
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if (apic_accept_pic_intr(&s->busdev.qdev) && pic_get_output(isa_pic)) {
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apic_deliver_pic_intr(&s->busdev.qdev, 1);
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}
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apic_check_pic(s);
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apic_update_irq(s);
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@ -804,8 +811,11 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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int n = index - 0x32;
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s->lvt[n] = val;
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if (n == APIC_LVT_TIMER)
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if (n == APIC_LVT_TIMER) {
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apic_timer_update(s, qemu_get_clock_ns(vm_clock));
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} else if (n == APIC_LVT_LINT0 && apic_check_pic(s)) {
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apic_update_irq(s);
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}
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}
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break;
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case 0x38:
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