OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

grackle: move PCI IO (ISA) memory region into the grackle device 

This simplifies the Old World machine to simply mapping the ISA memory region
into the main address space.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland 2018-03-06 22:01:57 +00:00 committed by David Gibson
parent a773e64a8f
commit a94e5f998b
2 changed files with 9 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
hw/pci-host/grackle.c
View File

@ -41,6 +41,7 @@ typedef struct GrackleState {
qemu_irq irqs[4];
MemoryRegion pci_mmio;
MemoryRegion pci_hole;
MemoryRegion pci_io;
} GrackleState;
/* Don't know if this matches real hardware, but it agrees with OHW. */
@ -76,7 +77,7 @@ static void grackle_realize(DeviceState *dev, Error **errp)
pci_grackle_map_irq,
s,
&s->pci_mmio,
get_system_io(),
&s->pci_io,
0, 4, TYPE_PCI_BUS);
pci_create_simple(phb->bus, 0, "grackle");
@ -90,6 +91,9 @@ static void grackle_init(Object *obj)
PCIHostState *phb = PCI_HOST_BRIDGE(obj);
memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
"pci-isa-mmio", 0x00200000);
memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio,
0x80000000ULL, 0x7e000000ULL);
@ -106,6 +110,7 @@ static void grackle_init(Object *obj)
sysbus_init_mmio(sbd, &phb->conf_mem);
sysbus_init_mmio(sbd, &phb->data_mem);
sysbus_init_mmio(sbd, &s->pci_hole);
sysbus_init_mmio(sbd, &s->pci_io);
}
static void grackle_pci_realize(PCIDevice *d, Error **errp)

9
hw/ppc/mac_oldworld.c
View File

@ -91,7 +91,6 @@ static void ppc_heathrow_init(MachineState *machine)
int linux_boot, i;
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
MemoryRegion *isa = g_new(MemoryRegion, 1);
uint32_t kernel_base, initrd_base, cmdline_base = 0;
int32_t kernel_size, initrd_size;
PCIBus *pci_bus;
@ -225,11 +224,6 @@ static void ppc_heathrow_init(MachineState *machine)
}
}
/* Register 2 MB of ISA IO space */
memory_region_init_alias(isa, NULL, "isa_mmio",
get_system_io(), 0, 0x00200000);
memory_region_add_subregion(sysmem, 0xfe000000, isa);
/* XXX: we register only 1 output pin for heathrow PIC */
pic_dev = qdev_create(NULL, TYPE_HEATHROW);
qdev_init_nofail(pic_dev);
@ -276,6 +270,9 @@ static void ppc_heathrow_init(MachineState *machine)
/* PCI hole */
memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
sysbus_mmio_get_region(s, 2));
/* Register 2 MB of ISA IO space */
memory_region_add_subregion(get_system_memory(), 0xfe000000,
sysbus_mmio_get_region(s, 3));
pci_bus = PCI_HOST_BRIDGE(dev)->bus;