From a957a88416ecbec51e147cba9fe89b93f6646b3b Mon Sep 17 00:00:00 2001 From: Jiaxi Chen Date: Fri, 3 Mar 2023 14:59:10 +0800 Subject: [PATCH] target/i386: Add support for AVX-IFMA in CPUID enumeration AVX-IFMA is a new instruction in the latest Intel platform Sierra Forest. This instruction packed multiplies unsigned 52-bit integers and adds the low/high 52-bit products to Qword Accumulators. The bit definition: CPUID.(EAX=7,ECX=1):EAX[bit 23] Add CPUID definition for AVX-IFMA. Signed-off-by: Jiaxi Chen Signed-off-by: Tao Su Reviewed-by: Xiaoyao Li Message-Id: <20230303065913.1246327-4-tao1.su@linux.intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 841c407d6d..8eb2ee5045 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -879,7 +879,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { NULL, NULL, "fzrm", "fsrs", "fsrc", NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, "amx-fp16", NULL, NULL, + NULL, "amx-fp16", NULL, "avx-ifma", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7deb37eca5..1f72d11e0c 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -917,6 +917,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, #define CPUID_7_1_EAX_FSRC (1U << 12) /* Support Tile Computational Operations on FP16 Numbers */ #define CPUID_7_1_EAX_AMX_FP16 (1U << 21) +/* Support for VPMADD52[H,L]UQ */ +#define CPUID_7_1_EAX_AVX_IFMA (1U << 23) /* XFD Extend Feature Disabled */ #define CPUID_D_1_EAX_XFD (1U << 4)